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公开(公告)号:US20220262797A1
公开(公告)日:2022-08-18
申请号:US17511923
申请日:2021-10-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Deok Han Bae , Ju Hun Park , Myung Yoon Um , Ye Ji Lee , Yoon Young Jung
IPC: H01L27/092 , H01L29/417 , H01L23/528 , H01L29/423 , H01L29/786 , H01L29/06
Abstract: A semiconductor device includes a substrate having a first power supply region, a second power supply region, and a cell region therein. The cell region extends between the first power supply region and the second power supply region. A first active region and a second active region are provided, which extend side-by-side within the cell region. A first power supply wiring is provided, which extends in the first direction within the first power supply region. A first source/drain contact is provided, which connects the first active region and the second active region. A second source/drain contact is provided, which connects the first active region and the first power supply wiring. The first source/drain contact includes a first recess portion disposed inside an intermediate region between the first active region and the second active region.
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公开(公告)号:US11362211B2
公开(公告)日:2022-06-14
申请号:US17137850
申请日:2020-12-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sang Young Kim , Deok Han Bae , Byung Chan Ryu , Da Un Jeon
IPC: H01L29/78 , H01L21/768 , H01L23/485 , H01L29/49
Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.
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公开(公告)号:US10347726B2
公开(公告)日:2019-07-09
申请号:US15844960
申请日:2017-12-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Deok Han Bae , Hyung Jong Lee , Hyun Jin Kim
IPC: H01L27/12 , H01L29/06 , H01L29/66 , H01L29/78 , H01L27/088 , H01L27/092 , H01L29/417
Abstract: A semiconductor device includes a source/drain region in a fin-type active pattern, a gate structure adjacent to the source/drain region, and an insulating layer on the source/drain region and the gate structure. A shared contact plug penetrates through the insulating layer and includes a first lower portion connected to the source/drain region, a second lower portion connected to the gate structure, and an upper portion connected to upper surfaces of the first lower portion and the second lower portion. A plug spacer film is between the insulating layer and at least one of the first lower portion and the second lower portion and includes a material different from a material of the insulating layer.
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公开(公告)号:US12009397B2
公开(公告)日:2024-06-11
申请号:US17539772
申请日:2021-12-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Deok Han Bae , Ju Hun Park , Myung Yoon Um
IPC: H01L29/417 , H01L27/092 , H01L29/06 , H01L29/423 , H01L29/78 , H01L29/786
CPC classification number: H01L29/41775 , H01L27/0924 , H01L29/0665 , H01L29/41733 , H01L29/41791 , H01L29/42392 , H01L29/7851 , H01L29/786
Abstract: A semiconductor device including a field insulating layer, a part of which protrudes upwardly in a vertical direction on an element isolation region between a first active region and a second active region may be provided.
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公开(公告)号:US11901422B2
公开(公告)日:2024-02-13
申请号:US17224269
申请日:2021-04-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Deok Han Bae , Hyung Jong Lee , Hyun Jin Kim
IPC: H01L27/08 , H01L27/092 , H01L29/417 , H01L29/66 , H01L29/78 , H01L27/088 , H01L29/06 , H01L27/12 , H01L21/8234 , H10B10/00 , H01L27/02
CPC classification number: H01L29/41775 , H01L21/823475 , H01L27/0886 , H01L27/0924 , H01L27/1211 , H01L29/0649 , H01L29/41791 , H01L29/66795 , H01L29/785 , H10B10/12 , H01L21/823425 , H01L27/0207
Abstract: A semiconductor device includes a source/drain region in a fin-type active pattern, a gate structure adjacent to the source/drain region, and an insulating layer on the source/drain region and the gate structure. A shared contact plug penetrates through the insulating layer and includes a first lower portion connected to the source/drain region, a second lower portion connected to the gate structure, and an upper portion connected to upper surfaces of the first lower portion and the second lower portion. A plug spacer film is between the insulating layer and at least one of the first lower portion and the second lower portion and includes a material different from a material of the insulating layer.
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公开(公告)号:US11575014B2
公开(公告)日:2023-02-07
申请号:US17227848
申请日:2021-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Deok Han Bae , Sung Min Kim , Ju Hun Park , Myung Yoon Um , Jong Mil Youn
IPC: H01L29/417 , H01L29/40 , H01L29/06 , H01L29/66
Abstract: A semiconductor device is provided. The semiconductor device includes a substrate comprising an element isolation region and an active region defined by the element isolation region, a fin-type pattern on the active region, the fin-type pattern extending in a first horizontal direction, a gate electrode on the fin-type pattern, the gate electrode extending in a second horizontal direction that crosses the first horizontal direction, a capping pattern on the gate electrode, a source/drain region on at least one side of the gate electrode, a source/drain contact on the source/drain region and electrically connected to the source/drain region, and a filling insulating layer on the source/drain contact, the filling insulating layer having a top surface at a same level as a top surface of the capping pattern, and including a material containing a carbon (C) atom.
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公开(公告)号:US10886404B2
公开(公告)日:2021-01-05
申请号:US16514067
申请日:2019-07-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sang Young Kim , Deok Han Bae , Byung Chan Ryu , Da Un Jeon
IPC: H01L29/78 , H01L21/768 , H01L23/485 , H01L29/49
Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.
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公开(公告)号:US10141447B2
公开(公告)日:2018-11-27
申请号:US15841515
申请日:2017-12-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jong Ho You , Deok Han Bae , Sang Young Kim
IPC: H01L29/786 , H01L23/535 , H01L27/092 , H01L29/08 , H01L29/45 , H01L29/16 , H01L29/417 , H01L29/161
Abstract: A semiconductor device includes an active fin extended in a first direction on a substrate. A gate structure extends in a second direction, wherein the gate structure intersects the active fin and covers an upper portion of the active fin. A source/drain region is positioned on the active fin adjacent to the gate structure. A silicide layer is on the source/drain region. A contact plug is connected to the source/drain region. A void is present between the silicide layer and the contact plug.
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公开(公告)号:US20180286957A1
公开(公告)日:2018-10-04
申请号:US15844960
申请日:2017-12-18
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Deok Han Bae , Hyung Jong Lee , Hyun Jin Kim
IPC: H01L29/417 , H01L29/78 , H01L29/06 , H01L27/088
CPC classification number: H01L29/41775 , H01L21/823425 , H01L21/823475 , H01L27/0207 , H01L27/0886 , H01L27/0924 , H01L27/1104 , H01L27/1211 , H01L29/0649 , H01L29/41791 , H01L29/66795 , H01L29/785
Abstract: A semiconductor device includes a source/drain region in a fin-type active pattern, a gate structure adjacent to the source/drain region, and an insulating layer on the source/drain region and the gate structure. A shared contact plug penetrates through the insulating layer and includes a first lower portion connected to the source/drain region, a second lower portion connected to the gate structure, and an upper portion connected to upper surfaces of the first lower portion and the second lower portion. A plug spacer film is between the insulating layer and at least one of the first lower portion and the second lower portion and includes a material different from a material of the insulating layer.
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