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    THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    13.
    发明公开
    THREE-DIMENSIONAL SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20230170398A1

    公开(公告)日：2023-06-01

    申请号：US17834527

    申请日：2022-06-07

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungil Park ,  Jae Hyun Park ,  Daewon Ha

    IPC: H01L29/49 ,  H01L29/12 ,  H01L29/423

    CPC classification number: H01L29/4925 ,  H01L29/12 ,  H01L29/42312

    Abstract: Disclosed are a three-dimensional semiconductor device and a method of fabricating the same. The semiconductor device includes: a first active region on a substrate, the first active region including a pair of lower source/drain regions and a lower channel structure; a second active region on the first active region, the second active region including a pair of upper source/drain regions and an upper channel structure; and a gate electrode on the lower and upper channel structures. The gate electrode includes: first and second metal structures, which are respectively provided adjacent bottom and top surfaces of semiconductor layers of the lower and upper channel structures.

    Semiconductor device and method of fabricating the same
    14.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US11335679B2

    公开(公告)日：2022-05-17

    申请号：US16825030

    申请日：2020-03-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Jae Hyun Park ,  Heonjong Shin

    IPC: H01L27/088 ,  H01L29/78 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/768

    Abstract: Disclosed are a semiconductor device and a method of fabricating the same. The semiconductor device includes first and second gate patterns that are spaced apart from each other in a first direction on a substrate and extend in the first direction, a separation pattern that is disposed between and being in direct contact with the first and second gate patterns and extends in a second direction intersecting the first direction, a third gate pattern that is spaced apart in the second direction from the first gate pattern and extends in the first direction, and an interlayer dielectric layer disposed between the first gate pattern and the third gate pattern. The separation pattern includes a material different from a material of the interlayer dielectric layer. A bottom surface of the separation pattern has an uneven structure.

    Three-dimensional semiconductor device and method of fabricating the same
    20.
    发明授权
    Three-dimensional semiconductor device and method of fabricating the same 有权

    公开(公告)号：US12218133B2

    公开(公告)日：2025-02-04

    申请号：US17805261

    申请日：2022-06-03

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sungil Park ,  Jae Hyun Park ,  Daewon Ha ,  Kyuman Hwang

    IPC: H01L29/78 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

    Abstract: Provided is a three-dimensional semiconductor device and its fabrication method. The semiconductor device includes a first active region on a substrate and including a plurality of lower channel patterns and a plurality of lower source/drain patterns that are alternately arranged along a first direction, a second active region on the first active region and including a plurality of upper channel patterns and a plurality of upper source/drain patterns that are alternately arranged along the first direction, a first gate electrode on a first lower channel pattern of the lower channel patterns and on a first upper channel pattern of the upper channel patterns, and a second gate electrode on a second lower channel pattern of the lower channel patterns and on a second upper channel pattern of the upper channel patterns. The second gate electrode may include lower and upper gate electrodes with an isolation pattern interposed therebetween.

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