公开(公告)号：US10685890B2

公开(公告)日：2020-06-16

申请号：US16279118

申请日：2019-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongyoun Kim ,  Seokhyun Lee

IPC: H01L21/66 ,  H01L23/498 ,  H01L23/31 ,  H01L25/10 ,  H01L21/48 ,  H01L23/538

Abstract: A semiconductor package including a redistribution substrate, and a semiconductor chip mounted on the redistribution substrate, the semiconductor chip having a conductive pad on one surface thereof may be provided. The redistribution substrate may include a first passivation pattern on the conductive pad, the first passivation pattern exposing a portion of the conductive pad, and a redistribution pattern covering the portion of the conductive pad exposed by the first passivation pattern and surrounding the first passivation pattern.

公开(公告)号：US20200111738A1

公开(公告)日：2020-04-09

申请号：US16703233

申请日：2019-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokhyun Lee ,  Kyung Suk Oh

IPC: H01L23/522 ,  H01L23/498 ,  H01L23/538 ,  H01L21/768 ,  H01L23/00 ,  H01L23/367

Abstract: A semiconductor package including a package substrate, a semiconductor chip on a first surface of the package substrate, a connection substrate on the package substrate and spaced apart from and surrounding the semiconductor chip, the connection substrate including a plurality of conductive connection structures penetrating therethrough, a plurality of first connecting elements between the semiconductor chip and the package substrate and electrically connecting the semiconductor chip to the package substrate, a plurality of second connecting elements between the connection substrate and the package substrate and electrically connecting the connection substrate to package substrate, a mold layer encapsulating the semiconductor chip and the connection substrate, and an upper redistribution pattern on the mold layer and the semiconductor chip and electrically connected to a corresponding one of the plurality of conductive connection structures may be provided.

公开(公告)号：US10522471B2

公开(公告)日：2019-12-31

申请号：US16010872

申请日：2018-06-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyoung Lim Suk ,  Seokhyun Lee

IPC: H01L23/495 ,  H01L23/538 ,  H01L23/14 ,  H01L23/00 ,  H01L25/10 ,  H01L25/00 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L21/683 ,  H01L23/498

Abstract: Insulating layers of a redistribution layer of a semiconductor package may be formed as a polymer film having inorganic fillers formed therein. The inorganic fillers may trap reactive materials to inhibit and/or substantially prevent the metal conductors, such as chip pads of the semiconductor chip being packaged, from being damaged by the reactive material. As a result, the reliability and the durability of the semiconductor package may be improved.

公开(公告)号：US12300625B2

公开(公告)日：2025-05-13

申请号：US17828799

申请日：2022-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minjung Kim ,  Dongkyu Kim ,  Jongyoun Kim ,  Seokhyun Lee ,  Jaegwon Jang

IPC: H01L23/538 ,  H01L25/18 ,  H01L23/00

Abstract: A semiconductor package includes a substrate; and a first semiconductor device and a second semiconductor device that are provided on the substrate. The substrate includes a first dielectric layer and a second dielectric layer provided on the first dielectric layer, a plurality of signal lines provided between the first dielectric layer and the second dielectric layer and connecting the first semiconductor device to the second semiconductor device, and a conductive pad and a conductive plate provided on the second dielectric layer. The conductive pad overlaps the first semiconductor device or the second semiconductor device. The conductive plate overlaps the signal lines.

公开(公告)号：US12170251B2

公开(公告)日：2024-12-17

申请号：US17317368

申请日：2021-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyoung Lim Suk ,  Seokhyun Lee ,  Jaegwon Jang

IPC: H01L23/538 ,  H01L21/48 ,  H01L21/56 ,  H01L21/683 ,  H01L23/00 ,  H01L23/31 ,  H01L25/10

Abstract: Disclosed is a semiconductor package comprising a redistribution substrate that has a first trench that extends through a top surface of the redistribution substrate, a first semiconductor chip on the redistribution substrate, a capacitor chip on a bottom surface of the first semiconductor chip, and an under-fill layer on the bottom surface of the first semiconductor chip. The redistribution substrate includes a plurality of dielectric layers vertically stacked, a plurality of redistribution patterns in each of the dielectric layers, and a plurality of dummy redistribution patterns in the first trench. The dummy redistribution patterns vertically overlap the first semiconductor chip. An uppermost surface of the dummy redistribution pattern is located at a level higher than a level of a bottom surface of the first trench.

公开(公告)号：US20240323417A1

公开(公告)日：2024-09-26

申请号：US18676783

申请日：2024-05-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokhyun Lee ,  Taesung Kim

IPC: H04N19/423 ,  H04N19/137 ,  H04N19/159 ,  H04N19/186 ,  H04N19/593 ,  H04N19/91

CPC classification number: H04N19/423 ,  H04N19/137 ,  H04N19/159 ,  H04N19/186 ,  H04N19/593 ,  H04N19/91

Abstract: A video decoding apparatus includes a first buffer storing input data received from an entropy decoder, a first motion compensation processor extracting motion compensation reference data based on the input data, and store the motion compensation reference data in a pixel cache, a second buffer, and a controller. The input data comprises one of first data including motion information and second data including intra prediction information. The controller controls the second buffer to store the motion compensation reference data stored in the pixel cache when the input data is the first data, and controls the second buffer to store the second data stored in the first buffer when the input data is the second data.

公开(公告)号：US20240063129A1

公开(公告)日：2024-02-22

申请号：US18299927

申请日：2023-04-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok Geun Ahn ,  Seokhyun Lee ,  Yanggyoo Jung ,  Hwanyoung Choi

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31 ,  H10B80/00

CPC classification number: H01L23/5383 ,  H01L23/5385 ,  H01L23/49816 ,  H01L24/16 ,  H01L23/3157 ,  H01L23/5384 ,  H10B80/00 ,  H01L2224/16227

Abstract: A semiconductor package includes a package substrate, an interposer substrate on the package substrate, first connection bumps between the package substrate and the interposer substrate, first and second semiconductor chips on the interposer substrate, second connection bumps between the interposer substrate and the first and second semiconductor chips, and an upper molding layer on the interposer substrate and at least partially surrounding the first semiconductor chip and the second semiconductor chip. The interposer substrate includes a plurality of sub-interposers horizontally spaced apart from each other and each including through electrodes, a lower molding layer in a space between the sub-interposers, and a redistribution layer electrically connected to the through electrodes on the sub-interposers and the lower molding layer. A sum of areas of the sub-interposers is less than a sum of areas of the first and second semiconductor chips.

公开(公告)号：US11626354B2

公开(公告)日：2023-04-11

申请号：US17341510

申请日：2021-06-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokhyun Lee

IPC: H01L23/495 ,  H01L23/522 ,  H01L23/532 ,  H01L21/768 ,  H01L49/02

Abstract: A redistribution substrate includes a first conductive pattern including a first lower pad and a second lower pad, the first and second lower pads being within a first insulating layer, a second conductive pattern including a first upper pad and a second upper pad, the first and second upper pads being on the first insulating layer, a first via connecting the first lower pad and the first upper pad to each other in the first insulating layer, a second via connecting the second lower pad and the second upper pad to each other in the first insulating layer, and a capacitor between the first lower pad and the first via.

公开(公告)号：US11616051B2

公开(公告)日：2023-03-28

申请号：US17239956

申请日：2021-04-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongkyu Kim ,  Seokhyun Lee ,  Yeonho Jang ,  Jaegwon Jang

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A semiconductor package device includes a first semiconductor package, a second semiconductor package, and first connection terminals between the first and second semiconductor packages. The first semiconductor package includes a lower redistribution substrate, a semiconductor chip, and an upper redistribution substrate vertically spaced apart from the lower redistribution substrate across the semiconductor chip. The upper redistribution substrate includes a dielectric layer, redistribution patterns vertically stacked in the dielectric layer and each including line and via parts, and bonding pads on uppermost redistribution patterns. The bonding pads are exposed from the dielectric layer and in contact with the first connection terminals. A diameter of each bonding pad decreases in a first direction from a central portion at a top surface of the upper redistribution substrate to an outer portion at the top surface thereof. A thickness of each bonding pad increases in the first direction.

公开(公告)号：US11610785B2

公开(公告)日：2023-03-21

申请号：US17331751

申请日：2021-05-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seokhyun Lee ,  Kyoung Lim Suk ,  Ae-Nee Jang ,  Jaegwon Jang

IPC: H01L21/56 ,  H01L23/485 ,  H01L23/498 ,  H01L21/60 ,  H01L23/00

Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, an external connection member on the semiconductor chip, and a dielectric film between the semiconductor chip and the external connection member. The semiconductor chip includes a substrate, a front-end-of-line structure on the substrate, and a back-end-of-line structure on the front-end-of-line structure. The back-end-of-line structure includes metal layers stacked on the front-end-of-line structure, a first dielectric layer on the uppermost metal layer and including a contact hole that vertically overlaps a pad of an uppermost metal layer, a redistribution line on the first dielectric layer and including a contact part in the contact hole and electrically connected to the pad, a pad part, and a line part that electrically connects the contact part to the pad part, and an upper dielectric layer on the redistribution line.