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    Methods of manufacturing a magnetoresistive random access memory device
    12.
    发明授权
    Methods of manufacturing a magnetoresistive random access memory device 有权
    制造磁阻随机存取存储器件的方法

    公开(公告)号：US09577183B2

    公开(公告)日：2017-02-21

    申请号：US14611717

    申请日：2015-02-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyoung-Sun Kim ,  Woo-Jin Kim ,  Ken Tokashiki

    IPC: H01L43/12 ,  H01L27/22

    CPC classification number: H01L43/12 ,  G11C11/161 ,  H01L27/228

    Abstract: In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed.

    Abstract translation: 在制造MRAM器件的方法中，在基片上形成下电极。 第一磁性层，隧道势垒层和第二磁性层依次形成在下部电极层上。 在第二磁性层上形成蚀刻掩模。 执行其中第一离子束和第二离子束同时发射到衬底上的离子束蚀刻工艺，以形成包括第一磁性层图案，隧道层图案和第二磁性层图案的MTJ结构 磁性层，隧道势垒层和第二磁性层，在执行离子束蚀刻处理之后，MTJ结构没有剩余副产物。

    System on chip, bus interface and method of operating the same
    13.
    发明授权
    System on chip, bus interface and method of operating the same 有权
    片上系统，总线接口及操作方法

    公开(公告)号：US09489009B2

    公开(公告)日：2016-11-08

    申请号：US14486434

    申请日：2014-09-15

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hee-Seong Lee ,  Woo-Jin Kim ,  Nak Hee Seong

    IPC: H04B7/005 ,  G06F1/12 ,  G06F1/32

    CPC classification number: G06F13/1689 ,  G06F1/12 ,  G06F1/324 ,  G06F13/36 ,  G06F13/4068 ,  G06F13/42 ,  Y02D10/126 ,  Y02D10/151

    Abstract: A mobile system includes a first interface configured to transmit a payload in synchronization with a first clock signal through a first channel at a first transfer rate; and a second interface that includes: a payload storage connected to the first channel and configured to receive the payload from the first channel; and a payload receiver connected to the payload storage and configured to receive the payload from the payload storage in synchronization with a second clock at a second transfer rate through a second channel. A length of the second channel is shorter than a length of the first channel, and the first clock signal is asynchronous with the second clock signal.

    Abstract translation: 移动系统包括：第一接口，被配置为以第一传输速率通过第一信道与第一时钟信号同步发送有效载荷; 以及第二接口，其包括：连接到所述第一信道并被配置为从所述第一信道接收所述有效载荷的有效载荷存储器; 以及有效载荷接收器，其连接到所述有效载荷存储器并且被配置为以与所述第二信道的第二传送速率的第二时钟同步地从所述有效负载存储器接收所述有效载荷 第二通道的长度小于第一通道的长度，并且第一时钟信号与第二时钟信号是异步的。

    Method of manufacturing magnetoresistive random access memory device
    14.
    发明授权
    Method of manufacturing magnetoresistive random access memory device 有权

    公开(公告)号：US11417833B2

    公开(公告)日：2022-08-16

    申请号：US17008744

    申请日：2020-09-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Woo-Jin Kim ,  Shin-Hee Han

    IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L43/10

    Abstract: A MRAM device includes a first insulating interlayer on a substrate including a cell region and a peripheral region, lower electrode contacts extending through the first insulating interlayer of the cell region, a first structure on each of the lower electrode contacts, the first structure including a lower electrode, a magnetic tunnel junction structure, and an upper electrode sequentially stacked, and a capping layer covering surfaces of the first insulating interlayer and the first structure in the cell and peripheral regions, wherein an upper surface of the capping layer on the first insulating interlayer in the peripheral region is higher than an upper surface of the capping layer on the first insulating interlayer between the first structures in the cell region.

    Magnetoresistive random access memory device
    16.
    发明授权
    Magnetoresistive random access memory device 有权

    公开(公告)号：US10797228B2

    公开(公告)日：2020-10-06

    申请号：US16366136

    申请日：2019-03-27

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Woo-Jin Kim ,  Shin-Hee Han

    IPC: H01L29/82 ,  H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L43/10

    Abstract: A MRAM device includes a first insulating interlayer on a substrate including a cell region and a peripheral region, lower electrode contacts extending through the first insulating interlayer of the cell region, a first structure on each of the lower electrode contacts, the first structure including a lower electrode, a magnetic tunnel junction structure, and an upper electrode sequentially stacked, and a capping layer covering surfaces of the first insulating interlayer and the first structure in the cell and peripheral regions, wherein an upper surface of the capping layer on the first insulating interlayer in the peripheral region is higher than an upper surface of the capping layer on the first insulating interlayer between the first structures in the cell region.

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