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公开(公告)号：US20250030430A1
公开(公告)日：2025-01-23
申请号：US18666180
申请日：2024-05-16
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Heewook Shin , Jaehyuk Lee , Junho Boo , Seunghoon Lee , Youngjae Cho , Michael Choi , Jinwook Burm , Gilcho Ahn
IPC: H03M1/06
Abstract: Provided is an analog-to-digital converter and a voltage offset correction method thereof. The analog-to-digital converter may include a digital-to-analog converter (DAC) configured to generate a first comparison voltage, a comparison circuit configured to output a first comparison result signal based on a result of comparing the first comparison voltage with a second comparison voltage, and a control circuit configured to control the DAC and output an output signal, wherein the DAC may include a correction circuit configured to generate a correction voltage by selectively switching switches connected to terminals to which a plurality of reference voltages are applied, and correct a voltage offset of the comparison circuit based on the correction voltage.
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公开(公告)号：US20240405782A1
公开(公告)日：2024-12-05
申请号：US18797157
申请日：2024-08-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Byungwoo Koo , Sangpil Nam , Sunghan Do , Junsang Park , Jungho Lee , Youngjae Cho , Michael Choi
Abstract: An apparatus configured to transmit and receive a radio frequency (RF) signal is provided. The apparatus includes a digital-to-analog converter (DAC) configured to convert a digital signal into an analog signal, a power amplifier configured to amplify the analog signal, and an antenna configured to output, as the RF signal, the amplified analog signal to the outside. The DAC includes a current cell matrix including a plurality of current cells configured to generate the analog signal, a plurality of normal paths configured to control the plurality of current cells to be turned on or off, based on the digital signal, and a plurality of alternative paths configured to selectively consume power, based on a pattern of the digital signal.
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公开(公告)号：US11606101B2
公开(公告)日：2023-03-14
申请号：US17406193
申请日：2021-08-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoungjun Moon , Dongryeol Oh , Younghyo Park , Youngjae Cho , Michael Choi
Abstract: An analog-to-digital converter (ADC) includes a coarse ADC that receives an analog input voltage, generates a first digital signal based on the analog input voltage using a successive approximation register (SAR) method, and outputs a residual voltage remaining after the first digital signal is generated. The ADC further includes an amplifier that receives the residual voltage and a test voltage, generates a residual current by amplifying the residual voltage by a predetermined gain, and generates a test current by amplifying the test voltage by the gain. The ADC further includes a fine ADC that receives the residual current and generates a second digital signal based on the residual current using the SAR method, and an auxiliary path that receives the test current and generates a gain correction signal based on the test current. The gain of the amplifier is adjusted based on the gain correction signal.
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公开(公告)号：US11581896B2
公开(公告)日：2023-02-14
申请号：US17474501
申请日：2021-09-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoungjun Moon , Dongryeol Oh , Youngjae Cho , Michael Choi
Abstract: An analog-to-digital converter includes: a voltage-current converter receiving an analog input voltage, generating a first digital signal from the analog input voltage, and outputting a residual current remaining after the first digital signal; a current-time converter converting the residual current into a current time in a time domain; and a time-digital converter receiving the residual time, and generating a second digital signal from the residual time, wherein the first digital signal and the second digital signal are sequences of digital codes representing respective signal levels of the analog input voltage.
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Patent Agency Ranking
公开(公告)号：US20210409033A1
公开(公告)日：2021-12-30
申请号：US17474501
申请日：2021-09-14
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoungjun Moon , Dongryeol Oh , Youngjae Cho , Michael Choi
Abstract: An analog-to-digital converter includes: a voltage-current converter receiving an analog input voltage, generating a first digital signal from the analog input voltage, and outputting a residual current remaining after the first digital signal; a current-time converter converting the residual current into a current time in a time domain; and a time-digital converter receiving the residual time, and generating a second digital signal from the residual time, wherein the first digital signal and the second digital signal are sequences of digital codes representing respective signal levels of the analog input voltage.
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公开(公告)号：US11867757B2
公开(公告)日：2024-01-09
申请号：US17465337
申请日：2021-09-02
Applicant: Samsung Electronics Co., Ltd.
Inventor： Heejune Lee , Jinwoo Park , Younghyo Park , Eunhye Oh , Sungno Lee , Youngjae Cho , Michael Choi
IPC: G01R31/317 , H03M1/10
CPC classification number: G01R31/31725 , G01R31/31724 , H03M1/1071
Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.
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公开(公告)号：US11539902B2
公开(公告)日：2022-12-27
申请号：US17060345
申请日：2020-10-01
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sangpil Nam , Kyunghoon Lee , Jungho Lee , Youngjae Cho , Michael Choi
IPC: H04N5/357 , H04N5/3745 , H04N5/235 , H04N5/378
Abstract: A flicker detection circuit is provided. The flicker detection circuit may include a flicker detection correlated double sampling (FD CDS) circuit including first to sixth switches turned on or off based on a control signal, and first to fourth capacitors, the FD CDS circuit being configured to receive a flicker pixel signal output from at least one pixel, summate with an output offset signal, and amplify the summation based on a gain to form a flicker detection signal; and an analog-to-digital converter (ADC) configured to quantize the flicker detection signal.
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公开(公告)号：US20220206062A1
公开(公告)日：2022-06-30
申请号：US17471763
申请日：2021-09-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Eunhye Oh , Hyochul Shin , Jinwoo Park , Sungno Lee , Younghyo Park , Yongki Lee , Heejune Lee , Youngjae Cho , Michael Choi
Abstract: A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.
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公开(公告)号：US11190202B2
公开(公告)日：2021-11-30
申请号：US17000665
申请日：2020-08-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kyoungjun Moon , Dongryeol Oh , Youngjae Cho , Michael Choi
Abstract: An analog-to-digital converter includes: a voltage-current converter receiving an analog input voltage, generating a first digital signal from the analog input voltage, and outputting a residual current remaining after the first digital signal; a current-time converter converting the residual current into a current time in a time domain; and a time-digital converter receiving the residual time, and generating a second digital signal from the residual time, wherein the first digital signal and the second digital signal are sequences of digital codes representing respective signal levels of the analog input voltage.
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