公开(公告)号：US20100164090A1

公开(公告)日：2010-07-01

申请号：US12647500

申请日：2009-12-27

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: H01L23/49 ,  B23K31/00 ,  H01L23/498

CPC classification number: H01L25/50 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/0401 ,  H01L2224/0579 ,  H01L2224/05799 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/81903 ,  H01L2224/83851 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2924/00

Abstract: A semiconductor package apparatus includes a first semiconductor chip bonded onto a substrate of which metal wire turning upward; and a second semiconductor chip conductively bonded onto the first semiconductor chip in a vertical direction such that a metal wire of the second semiconductor chip and the metal wire of the first semiconductor chip have facing points. The semiconductor package apparatus includes a third semiconductor chip conductively bonded onto the first semiconductor chip in the vertical direction to be disposed horizontally with the second semiconductor chip such that a metal wire of the third semiconductor chip and the metal wire of the first semiconductor chip have facing points.

Abstract translation: 一种半导体封装装置，包括：接合在金属线向上方转动的基板上的第一半导体芯片; 以及第二半导体芯片，其在垂直方向上导电地接合到第一半导体芯片上，使得第二半导体芯片的金属线和第一半导体芯片的金属线具有面对点。 半导体封装装置包括：第三半导体芯片，其在垂直方向上导电地接合到第一半导体芯片上，以与第二半导体芯片水平配置，使得第三半导体芯片的金属线和第一半导体芯片的金属线具有面对 积分

公开(公告)号：US20100112807A1

公开(公告)日：2010-05-06

申请号：US12608052

申请日：2009-10-29

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: H01L21/768 ,  H01L21/31

CPC classification number: H01L21/02063 ,  H01L21/76814

Abstract: A method of forming a metal wiring of a semiconductor device, and devices thereof. A method of forming a metal wiring, and devices thereof, may maximize semiconductor yield by substantially removing oxide on and/or over a trench and/or by substantially removing a by-product that may remain on and/or over a surface of a wafer. A method of forming a metal wiring of a semiconductor may include forming a dielectric layer on and/or over a metal wiring. A method of forming a metal wiring of a semiconductor may include forming a contact hole, which may expose a partial surface of metal wiring, on and/or over a dielectric layer. A method of forming a metal wiring of a semiconductor may include performing an oxide removing process on and/or over an inner side of a contact hole, and/or performing a by-product removing process on and/or over an inner side wall of a trench.

Abstract translation: 一种形成半导体器件的金属布线的方法及其装置。 形成金属布线的方法及其装置可通过基本上除去沟槽上和/或沟槽上的氧化物和/或通过基本上除去可能保留在晶片表面上和/或上方的副产物而使半导体产量最大化 。 形成半导体的金属布线的方法可以包括在金属布线上和/或上方形成电介质层。 形成半导体的金属布线的方法可以包括在电介质层上和/或上方形成可能暴露金属布线的部分表面的接触孔。 形成半导体的金属布线的方法可以包括在接触孔的内侧上和/或上方对接触孔的内侧进行氧化物去除处理，和/或在内侧壁上和/ 一个沟槽

公开(公告)号：US07659603B2

公开(公告)日：2010-02-09

申请号：US11846897

申请日：2007-08-29

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: H01L29/06 ,  H01L27/108

CPC classification number: H01L24/24 ,  H01L24/82 ,  H01L25/0655 ,  H01L25/18 ,  H01L2224/24227 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/14

Abstract: A semiconductor device includes a substrate formed with a predetermined trench, a plurality of devices fixed into the trench, an etch stop layer on an entire surface of the substrate including the devices while selectively exposing the devices, an interlayer dielectric layer on the etch stop layer, in which the interlayer dielectric layer includes a predetermined via hole and a predetermined trench, and a via plug and a metal line formed on the interlayer dielectric layer while filling the via hole and the trench.

Abstract translation: 半导体器件包括形成有预定沟槽的衬底，固定到沟槽中的多个器件，在包括器件的衬底的整个表面上的蚀刻停止层，同时选择性地暴露器件;蚀刻停止层上的层间介电层 其中层间介电层包括预定的通孔和预定沟槽，以及在填充通孔和沟槽的同时在层间电介质层上形成的通孔塞和金属线。

公开(公告)号：US20090134439A1

公开(公告)日：2009-05-28

申请号：US12323014

申请日：2008-11-25

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: H01L31/0232 ,  H01L21/00

CPC classification number: H01L27/14634 ,  H01L27/14636

Abstract: A CMOS Image Sensor (CIS) that minimizes light loss and achieves maximized performance. The CIS includes a plurality of metal wirings provided on and/or over a semiconductor substrate and surrounded, respectively, by a dielectric layer, a silicon layer deposited on and/or over the plurality of metal wirings, a photodiode and a plurality of transistors provided at the silicon layer, a color filter formed on and/or over the transistors, and via-contacts penetrated through the silicon layer, the photodiode being connected to the plurality of metal wirings by the via-contacts and gap-fillers. The photodiodes and the transistors are formed after forming the metal line.

Abstract translation: CMOS图像传感器（CIS），可最大限度地减少光损耗并实现最大的性能。 CIS包括设置在半导体衬底之上和/或上面的多个金属布线，分别由电介质层，沉积在多个金属布线上和/或上面的硅层，光电二极管和多个晶体管组成 在硅层处，形成在晶体管上和/或上面的滤色器，以及穿过硅层的通孔接触，光电二极管通过通孔接点和间隙填料连接到多个金属布线。 在形成金属线之后形成光电二极管和晶体管。

公开(公告)号：US20090136724A1

公开(公告)日：2009-05-28

申请号：US12253252

申请日：2008-10-17

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: B32B3/26 ,  H01L21/311 ,  H01L21/304

CPC classification number: H01L21/32136 ,  H01L21/76807 ,  H01L21/76843 ,  H01L21/76862 ,  Y10T428/24851

Abstract: Embodiments relate to a semiconductor device and to a method of fabricating a semiconductor device. According to embodiments, reliability may be enhanced by removing oxide from a barrier metal surface. According to embodiments, a method may include forming an insulating layer on and/or over a metal layer formed on and/or over a substrate, forming a via hole by etching the insulating layer to expose the metal layer, forming a trench by etching a portion of the insulating layer in an area having the via hole formed therein, forming a barrier metal layer on and/or over the insulating layer including the trench and the via hole, performing plasma processing on the barrier metal layer, and forming a seed Cu layer on the barrier metal layer.

Abstract translation: 实施例涉及半导体器件和制造半导体器件的方法。 根据实施例，可以通过从阻挡金属表面去除氧化物来增强可靠性。 根据实施例，一种方法可以包括在形成在衬底上和/或衬底上的金属层上和/或上方形成绝缘层，通过蚀刻绝缘层以形成通孔以暴露金属层，通过蚀刻形成沟槽 在其中形成有通孔的区域中的绝缘层的一部分，在包括沟槽和通孔的绝缘层上和/或之上形成阻挡金属层，对阻挡金属层进行等离子体处理，并形成种子Cu 层在阻挡金属层上。

公开(公告)号：US20090065684A1

公开(公告)日：2009-03-12

申请号：US12203183

申请日：2008-09-03

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: G01J3/50 ,  H01L31/02

CPC classification number: H01L27/14621 ,  H01L27/14623

Abstract: An image sensor and a method for fabricating the same having enhanced sensivity. The image sensor enhances sensitivity and minimizes optical loss by isolating color filters from each other using a metal that has superior light reflection properties while having no effect on the color filters during deposition of the metal.

Abstract translation: 一种具有增强的感光度的图像传感器及其制造方法。 图像传感器通过使用具有优异的光反射性能的金属彼此隔离滤色器来增强灵敏度并使光损失最小化，同时在金属沉积期间对滤色器没有影响。

公开(公告)号：US20080174582A1

公开(公告)日：2008-07-24

申请号：US11987249

申请日：2007-11-28

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: G06F3/038

CPC classification number: G09G3/2927 ,  G09G3/2022 ,  G09G2360/16

Abstract: In driving a plasma display device, a driving time is accumulatively calculated, and the number of subfields to which a main reset waveform for initializing every discharge cell is supplied in a first frame in which the accumulative driving time is longer than a reference time is larger than the number of subfields to which the main reset waveform is supplied in a second frame in which the accumulative driving time is shorter than the reference time. By increasing the number of subfields to which the main reset waveform is supplied in a single frame with an increase in the accumulative driving time of the plasma display device, a discharge delay can be reduced by using priming particles formed by a main reset.

Abstract translation: 在驱动等离子体显示装置时，累积计算驱动时间，并且在累积驱动时间长于基准时间的第一帧中提供用于初始化每个放电单元的主复位波形的子场的数量较多 比在累积驱动时间比参考时间短的第二帧中提供主复位波形的子场的数量。 通过随着等离子体显示装置的累积驱动时间的增加，通过增加单个帧中提供主复位波形的子场的数量，可以通过使用由主复位形成的引发粒子来减少放电延迟。

公开(公告)号：US20080170056A1

公开(公告)日：2008-07-17

申请号：US11987202

申请日：2007-11-28

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: G09G5/00 ,  G09G3/28

CPC classification number: G09G3/2927 ,  G09G3/2007 ,  G09G3/2925 ,  G09G2310/066 ,  G09G2320/048

Abstract: A plasma display includes a plasma display panel having a plurality of first electrodes, a plurality of second electrodes, a plurality of third electrodes crossing the first and second electrodes, and discharge cells corresponding to electrode crossings, and a controller configured to control reset, address and sustain operations for a plurality of weighted subfields, and to control a misfire prevention operation, the misfire prevention operation occurring before a main reset operation in a subfield that includes the main reset operation.

Abstract translation: 等离子体显示器包括具有多个第一电极，多个第二电极，与第一和第二电极交叉的多个第三电极以及与电极交叉相对应的放电单元的等离子体显示面板，以及控制器，被配置为控制复位，地址 并且对于多个加权子场进行维持操作，并且控制防火防止操作，在包括主复位操作的子场中的主复位操作之前发生防火预防操作。

公开(公告)号：US20080054317A1

公开(公告)日：2008-03-06

申请号：US11846848

申请日：2007-08-29

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: H01L27/146 ,  H01L31/0232 ,  H01L31/18

CPC classification number: H01L27/14632 ,  H01L27/14621 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14687 ,  H01L27/14689

Abstract: An image sensor is provided. The image sensor includes a transistor region over a substrate, an interlayer insulating layer having a via hole over the transistor region, a silicon layer over the interlayer insulating layer, and a photodiode over the silicon layer.

Abstract translation: 提供图像传感器。 图像传感器包括在衬底上的晶体管区域，在晶体管区域上具有通孔的层间绝缘层，层间绝缘层上的硅层和在硅层上的光电二极管。

公开(公告)号：US20050264490A1

公开(公告)日：2005-12-01

申请号：US11134276

申请日：2005-05-23

Applicant: Sang-Chul Kim

Inventor： Sang-Chul Kim

IPC: G09G3/20 ,  G09G3/288 ,  G09G3/291 ,  G09G3/294 ,  G09G3/296 ,  G09G3/298 ,  G09G3/28

CPC classification number: G09G3/294 ,  G09G2330/028

Abstract: In a plasma display panel, sustain discharge pulses having a first voltage and a second voltage, which is a negative voltage of the first voltage, may be applied to a scan electrode when a sustain electrode is biased with the ground voltage during a sustain period. The second voltage is generated without providing an additional power source but rather by a sustain discharge supply circuit, supplied with the first voltage, that repeatedly performs switching operations to generate the second voltage.

Abstract translation: 在等离子体显示面板中，当维持电极在维持期间被接地电压偏置时，可以向扫描电极施加具有作为第一电压的负电压的第一电压和第二电压的维持放电脉冲。 在不提供附加电源的情况下产生第二电压，而是产生提供有第一电压的维持放电电源电路，其重复执行开关操作以产生第二电压。