公开(公告)号：US10431246B2

公开(公告)日：2019-10-01

申请号：US15381016

申请日：2016-12-15

Applicant: Seagate Technology LLC

Inventor： Wenzhong Zhu ,  Kenneth Haapala ,  Jon D. Trantham

IPC: G11B5/55 ,  G11B5/48 ,  G11B5/012 ,  G11B5/54

Abstract: A recording surface of a magnetic disk is divided into first and second zones. A first head of a first actuator arm assembly reads from and/or writes to the first zone exclusively. A second head of a second actuator arm assembly reads from and/or writes to the second zone exclusively. The first and second head are capable of simultaneously reading from and writing to the recording surface.

公开(公告)号：US10157631B2

公开(公告)日：2018-12-18

申请号：US15873126

申请日：2018-01-17

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Jason Bryce Gadbois ,  Mehmet Faith Erden

IPC: G11B21/02 ,  G11B5/29 ,  G11B5/596 ,  G11B5/31

Abstract: A slider includes an array of two or more transducer sets offset from one another in a cross-track direction. Each transducer set includes at least one writer and at least one reader. All of the transducer sets are configured to operate simultaneously to perform any combination of reading and writing on two or more tracks of a recording medium. At least one actuator is included between two the transducer sets. The actuator is configured to adjust a cross-track spacing between the two transducer sets in response to a control current.

公开(公告)号：US10147454B1

公开(公告)日：2018-12-04

申请号：US15594812

申请日：2017-05-15

Applicant: Seagate Technology LLC

Inventor： Riyan Mendonsa ,  Jon D. Trantham ,  James Dillon Kiely ,  Peng Li ,  Joshua Ward Christensen

IPC: G11B11/00 ,  G11B13/04 ,  G11B13/08 ,  G11B20/18 ,  G11B5/60 ,  G11B5/00 ,  G11B7/126

Abstract: An apparatus comprises a laser diode configured to generate light during a write operation. A slider comprises a near-field transducer (NFT) and an optical waveguide. The slider is configured for heat-assisted magnetic recording and to communicate the light to the NFT via the waveguide. A writer heater of the slider is configured to receive power during the write operation. A thermal sensor is situated at or near an air bearing surface of the slider. The thermal sensor is configured to produce a sensor signal in response to sensing back-heating from the medium while the NFT generates heat during a write operation. Circuitry, coupled to the thermal sensor, is configured to compare the sensor signal to a threshold and generate an output signal indicative of degradation of NFT performance in response to the sensor signal exceeding the threshold.

公开(公告)号：US20180144764A1

公开(公告)日：2018-05-24

申请号：US15873126

申请日：2018-01-17

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Jason Bryce Gadbois ,  Mehmet Fatih Erden

IPC: G11B5/29 ,  G11B5/31 ,  G11B5/596

CPC classification number: G11B5/29 ,  G11B5/012 ,  G11B5/2652 ,  G11B5/3133 ,  G11B5/4886 ,  G11B5/596

Abstract: A slider includes an array of two or more transducer sets offset from one another in a cross-track direction. Each transducer set includes at least one writer and at least one reader. All of the transducer sets are configured to operate simultaneously to perform any combination of reading and writing on two or more tracks of a recording medium. At least one actuator is included between two the transducer sets. The actuator is configured to adjust a cross-track spacing between the two transducer sets in response to a control current.

公开(公告)号：US20180005657A1

公开(公告)日：2018-01-04

申请号：US15200439

申请日：2016-07-01

Applicant: Seagate Technology LLC

Inventor： Antanas Daugela ,  Jon D. Trantham ,  Scott E. Ryun

IPC: G11B5/60

CPC classification number: G11B5/6076 ,  G11B5/5534 ,  G11B5/607

Abstract: A storage device disclosed herein includes a transducer head with a proximity sensor that generates head-disc proximity signals, a digitizer configured to convert the analog proximity signals from the proximity sensor to digitized sample data, a discrete wavelet transformation (DWT) module configured to analyze the digitized sample data by performing an enhanced DWT on the digitized sample data to generate DWT coefficients, and a modal filter configured to determine dominant head-disc interference (HDI) modes for a transducer head by analyzing the DWT coefficients.

公开(公告)号：US09058869B2

公开(公告)日：2015-06-16

申请号：US13761301

申请日：2013-02-07

Applicant: Seagate Technology LLC

Inventor： Ara Patapoutian ,  Antoine Khoueir ,  Ryan James Goss ,  Jon D. Trantham

IPC: G11C13/00

CPC classification number: G11C13/0002 ,  G11C11/5614 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0011 ,  G11C13/0033

Abstract: Data is written to cells of a resistance-based, non-volatile memory. An activity metric is tracked since the writing of the data to the cells. In response to the activity metric satisfying a threshold, a bias signal is applied to the cells to reverse a resistance shift of the cells.

Abstract translation: 数据被写入基于电阻的非易失性存储器的单元。 自从将数据写入单元格后，会跟踪活动度量。 响应于满足阈值的活动度量，将偏置信号施加到单元以反转单元的电阻偏移。

公开(公告)号：US20140281280A1

公开(公告)日：2014-09-18

申请号：US13802192

申请日：2013-03-13

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Ryan James Goss ,  Jon D. Trantham ,  Antoine Khoueir ,  David Scott Ebsen ,  Mark Allen Gaertner ,  Kevin Gomez

IPC: G06F3/06

CPC classification number: G06F3/067 ,  G06F3/061 ,  G06F3/0631 ,  G06F3/0643 ,  G06F3/0688 ,  G06F2212/7202 ,  G06F2212/7208

Abstract: An apparatus includes a controller capable of being coupled to a host interface and a memory device. The memory device includes two or more non-hierarchical, non-volatile memory units having different minimum addressable data unit sizes. The controller is configured to at least perform determining a workload indicator of a data object being stored in the memory device via the host interface. The controller selects one of the memory units in response to the workload indicator of the data object corresponding to the minimum addressable data unit size of the selected memory unit corresponding to the workload indicator. The data object is stored in the selected memory unit in response thereto.

Abstract translation: 一种装置包括能够耦合到主机接口和存储器装置的控制器。 存储器件包括具有不同最小可寻址数据单元尺寸的两个或更多个非分级非易失性存储器单元。 控制器被配置为经由主机接口至少执行存储在存储设备中的数据对象的工作量指示符。 控制器响应于与所述工作负载指示符对应的所选择的存储器单元的最小可寻址数据单元大小对应的数据对象的工作量指示符来选择一个存储器单元。 响应于该数据对象被存储在选择的存储单元中。

公开(公告)号：US20140229790A1

公开(公告)日：2014-08-14

申请号：US13762436

申请日：2013-02-08

Applicant: SEAGATE TECHNOLOGY LLC

Inventor： Ryan James Goss ,  Mark Allen Gaertner ,  Jon D. Trantham

IPC: H03M13/29

CPC classification number: H03M13/2906 ,  G06F11/1048

Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, a first data object and an associated first ECC data set are generated and stored in a non-volatile (NV) main memory responsive to a first set of data blocks having a selected logical address. A second data object and an associated second ECC data set are generated responsive to receipt of a second set of data blocks having the selected logical address. The second data object and the second ECC data set are subsequently stored in the in the NV main memory responsive to a mismatch between the first ECC data set and the second ECC data set.

Abstract translation: 用于管理存储器中的数据的方法和装置。 根据一些实施例，响应于具有所选逻辑地址的第一组数据块，生成第一数据对象和相关联的第一ECC数据集并将其存储在非易失性（NV）主存储器中。 响应于接收到具有所选逻辑地址的第二组数据块，产生第二数据对象和相关联的第二ECC数据集。 随后，第二数据对象和第二ECC数据集随后存储在NV主存储器中，以响应第一ECC数据集和第二ECC数据集之间的不匹配。

公开(公告)号：US11868621B2

公开(公告)日：2024-01-09

申请号：US17844174

申请日：2022-06-20

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Praveen Viraraghavan ,  John W. Dykes ,  Ian J. Gilbert ,  Sangita Shreedharan Kalarickal ,  Matthew J. Totin ,  Mohamad El-Batal ,  Darshana H. Mehta

IPC: G06F3/06 ,  G11C29/08

CPC classification number: G06F3/0616 ,  G06F3/0653 ,  G06F3/0679 ,  G11C29/08

Abstract: A data storage system can employ a read destructive memory configured with multiple levels. A non-volatile memory unit can be programmed with a first logical state in response to a first write voltage of a first hysteresis loop by a write controller prior to being programmed to a second logical state in response to a second write voltage of the first hysteresis loop, as directed by the write controller. The first and second logical states may be present concurrently in the non-volatile memory unit and subsequently read concurrently as the first logical state and the second logical state.

公开(公告)号：US20220350523A1

公开(公告)日：2022-11-03

申请号：US17730345

申请日：2022-04-27

Applicant: Seagate Technology LLC

Inventor： Jon D. Trantham ,  Praveen Viraraghavan ,  John W. Dykes ,  Ian J. Gilbert ,  Sangita Shreedharan Kalarickal ,  Matthew J. Totin ,  Mohamad El-Batal ,  Darshana H. Mehta

IPC: G06F3/06

Abstract: Apparatus and method for managing data in a processing system, such as but not limited to a data storage device such as a solid-state drive (SSD). A ferroelectric stack register memory has a first arrangement of ferroelectric memory cells (FMEs) of a first construction and a second arrangement of FMEs of a different, second construction arranged to provide respective cache lines for use by a controller, such as a programmable processor. A pointer mechanism is configured to provide pointers to point to each of the respective cache lines based on a time sequence of operation of the processor. Data sets can be migrated to the different arrangements by the controller as required based on the different operational characteristics of the respective FME constructions. The FMEs may be non-volatile and read-destructive. Refresh circuitry can be selectively enacted under different operational modes.