公开(公告)号：US09396812B2

公开(公告)日：2016-07-19

申请号：US14245097

申请日：2014-04-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko Amano ,  Kouhei Toyotaka ,  Hiroyuki Miyake ,  Aya Miyazaki ,  Hideaki Shishido ,  Koji Kusunoki

IPC: G11C19/00 ,  G11C19/18 ,  G11C19/28 ,  H03K19/00 ,  H01L25/03 ,  H05K7/02

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/0286 ,  G11C19/184 ,  H01L25/03 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L2924/0002 ,  H03K19/0013 ,  H05K7/02 ,  H01L2924/00

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

公开(公告)号：US09356048B2

公开(公告)日：2016-05-31

申请号：US14256660

申请日：2014-04-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiko Amano

IPC: H01L27/12 ,  H05B33/04

CPC classification number: H01L27/3276 ,  H01L27/1214 ,  H01L27/1244 ,  H01L27/3262 ,  H01L51/5246 ,  H01L51/5253 ,  H01L2251/5338 ,  H05B33/04

Abstract: It is an object of the present invention to prevent an insulating film from peeling in a section where the insulating film is adjacent to a sealing region. Over a first substrate 104, a pixel portion 100 provided with a light emitting element, a source driver 101, a gate driver 102, and a sealing region 103 are provided. A light emitting element is sealed between the first substrate 104 and a second substrate 110 by a sealant 108. An insulating film 107 serves as a partition wall of the light emitting element. An end portion of the insulating film 107 which is adjacent to the sealing region 103 does not overlap with a step formed by a side surface and an upper surface of a conductive film 106 which serves as a wiring.

Abstract translation: 本发明的目的是防止绝缘膜在绝缘膜与密封区域相邻的部分中剥离。 在第一基板104上设置有设置有发光元件的像素部分100，源极驱动器101，栅极驱动器102和密封区域103。 发光元件通过密封剂108密封在第一基板104和第二基板110之间。绝缘膜107用作发光元件的分隔壁。 与密封区域103相邻的绝缘膜107的端部与由用作布线的导电膜106的侧面和上表面形成的台阶不重叠。

公开(公告)号：US11942058B2

公开(公告)日：2024-03-26

申请号：US17961778

申请日：2022-10-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko Amano ,  Hiroyuki Miyake

IPC: G09G3/36 ,  G06F1/3234 ,  G06F3/038 ,  G09G3/3266 ,  G11C19/28 ,  H01L27/12 ,  G09G5/00

CPC classification number: G09G3/3677 ,  G06F1/3265 ,  G06F3/038 ,  G09G3/3266 ,  G11C19/28 ,  H01L27/124 ,  G09G5/008 ,  G09G2300/0809 ,  G09G2300/0871 ,  G09G2310/0205 ,  G09G2310/0248 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2330/021

Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.

公开(公告)号：US09543039B2

公开(公告)日：2017-01-10

申请号：US14831939

申请日：2015-08-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Seiko Amano ,  Hiroyuki Miyake

IPC: G11C19/28 ,  G09G3/32 ,  G09G3/36 ,  G06F3/038 ,  G09G5/00

CPC classification number: G09G3/3677 ,  G06F1/3265 ,  G06F3/038 ,  G09G3/3266 ,  G09G5/008 ,  G09G2300/0809 ,  G09G2300/0871 ,  G09G2310/0205 ,  G09G2310/0248 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2320/0247 ,  G09G2330/021 ,  G11C19/28 ,  H01L27/124

Abstract: In a pulse output circuit in a shift register, a power source line which is connected to a transistor in an output portion connected to a pulse output circuit at the next stage is set to a low-potential drive voltage, and a power source line which is connected to a transistor in an output portion connected to a scan signal line is set to a variable potential drive voltage. The variable potential drive voltage is the low-potential drive voltage in a normal mode, and can be either a high-potential drive voltage or the low-potential drive voltage in a batch mode. In the batch mode, display scan signals can be output to a plurality of scan signal lines at the same timing in a batch.

Abstract translation: 在移位寄存器的脉冲输出电路中，连接到与下一级的脉冲输出电路连接的输出部中的晶体管的电源线被设定为低电位驱动电压，电源线 连接到连接到扫描信号线的输出部分中的晶体管被​​设置为可变电位驱动电压。 可变电位驱动电压是正常模式下的低电位驱动电压，可以是高电位驱动电压或分批模式的低电位驱动电压。 在批量模式中，可以在批次中以相同的定时将显示扫描信号输出到多条扫描信号线。

公开(公告)号：US20130250529A1

公开(公告)日：2013-09-26

申请号：US13891364

申请日：2013-05-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko Amano ,  Kouhei Toyotaka ,  Hiroyuki Miyake ,  Aya Miyazaki ,  Hideaki Shishido ,  Koji Kusunoki

IPC: G11C19/28 ,  H05K7/02 ,  H01L25/03

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/0286 ,  G11C19/184 ,  H01L25/03 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L2924/0002 ,  H03K19/0013 ,  H05K7/02 ,  H01L2924/00

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Abstract translation: 目的在于提供能够稳定运行的脉冲信号输出电路和包括脉冲信号输出电路的移位寄存器。 根据所公开的发明的一个实施例的脉冲信号输出电路包括第一至第十晶体管。 沟道宽度W与第一晶体管的沟道长度L和第三晶体管的W / L的比W / L分别大于第六晶体管的W / L。 第五晶体管的W / L大于第六晶体管的W / L。 第五晶体管的W / L等于第七晶体管的W / L。 第三晶体管的W / L大于第四晶体管的W / L。 通过这样的结构，可以提供能够稳定运行的脉冲信号输出电路和包括脉冲信号输出电路的移位寄存器。