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公开(公告)号:US20240363639A1
公开(公告)日:2024-10-31
申请号:US18766834
申请日:2024-07-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Tomoya FUTAMURA , Takahiro KASAHARA
IPC: H01L27/12 , G02F1/1362 , G02F1/1368 , H01L29/66 , H01L29/786
CPC classification number: H01L27/1214 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/66742 , H01L29/7869 , H01L29/78693 , G02F1/13624
Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.
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公开(公告)号:US20220137469A1
公开(公告)日:2022-05-05
申请号:US17580742
申请日:2022-01-21
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masatoshi YOKOYAMA , Shigeki KOMORI , Manabu SATO , Kenichi OKAZAKI , Shunpei YAMAZAKI
IPC: G02F1/1362 , G02F1/1333 , G02F1/1343
Abstract: To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.
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公开(公告)号:US20220020841A1
公开(公告)日:2022-01-20
申请号:US17488376
申请日:2021-09-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Rihito WADA , Yoko CHIBA
IPC: H01L27/32 , H01L29/786 , H01L27/12
Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.
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公开(公告)号:US20190081031A1
公开(公告)日:2019-03-14
申请号:US16189396
申请日:2018-11-13
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Tomoya FUTAMURA , Takahiro KASAHARA
IPC: H01L27/02 , H01L27/12 , H01L29/786
Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, a channel protective layer overlapping with a channel formation region of the first oxide semiconductor layer, and a pair of a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the channel protective layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
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公开(公告)号:US20170040409A1
公开(公告)日:2017-02-09
申请号:US15296270
申请日:2016-10-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Rihito WADA , Yoko CHIBA
IPC: H01L27/32 , H01L29/786 , H01L27/12
CPC classification number: H01L27/3276 , H01L27/1225 , H01L27/3262 , H01L29/7869 , H01L51/5221
Abstract: A display device includes a pixel portion in which a pixel is arranged in a matrix, the pixel including an inverted staggered thin film transistor having a combination of at least two kinds of oxide semiconductor layers with different amounts of oxygen and having a channel protective layer over a semiconductor layer to be a channel formation region overlapping a gate electrode layer and a pixel electrode layer electrically connected to the inverted staggered thin film transistor. In the periphery of the pixel portion in this display device, a pad portion including a conductive layer made of the same material as the pixel electrode layer is provided. In addition, the conductive layer is electrically connected to a common electrode layer formed on a counter substrate.
Abstract translation: 显示装置包括其中像素以矩阵形式布置的像素部分,该像素包括具有不同量的氧并且具有通道保护层的至少两种氧化物半导体层的组合的反交错薄膜晶体管 半导体层作为与栅电极层重叠的沟道形成区域和与反交错薄膜晶体管电连接的像素电极层。 在该显示装置的像素部的周围,设置由与像素电极层相同的材料构成的导电层的焊盘部。 另外,导电层与形成在对置基板上的公共电极层电连接。
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公开(公告)号:US20140264329A1
公开(公告)日:2014-09-18
申请号:US14290216
申请日:2014-05-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Tomoya FUTAMURA , Takahiro KASAHARA
IPC: H01L29/786 , H01L29/66
CPC classification number: H01L27/1214 , G02F1/13624 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L29/66742 , H01L29/7869 , H01L29/78693
Abstract: A protective circuit includes a non-linear element, which includes a gate electrode, a gate insulating layer covering the gate electrode, a pair of first and second wiring layers whose end portions overlap with the gate electrode over the gate insulating layer and in which a second oxide semiconductor layer and a conductive layer are stacked, and a first oxide semiconductor layer which overlaps with at least the gate electrode and which is in contact with the gate insulating layer, side face portions and part of top face portions of the conductive layer and side face portions of the second oxide semiconductor layer in the first wiring layer and the second wiring layer. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be decreased and the characteristics of the non-linear element can be improved.
Abstract translation: 保护电路包括非线性元件,其包括栅电极,覆盖栅电极的栅极绝缘层,一对第一和第二布线层,其端部与栅极绝缘层上的栅电极重叠,并且其中 层叠第二氧化物半导体层和导电层,以及与至少栅电极重叠并与栅极绝缘层接触的第一氧化物半导体层,导电层的侧面部和顶面部的一部分,以及 在第一布线层和第二布线层中的第二氧化物半导体层的侧面部分。 在栅极绝缘层上,具有不同性质的氧化物半导体层彼此结合,由此可以进行与肖特基结的稳定操作。 因此,可以降低结漏电,提高非线性元件的特性。
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公开(公告)号:US20130092934A1
公开(公告)日:2013-04-18
申请号:US13706589
申请日:2012-12-06
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Tomoya FUTAMURA , Takahiro KASAHARA
IPC: H01L29/786
CPC classification number: H01L29/7869 , H01L27/0266 , H01L27/1225 , H01L27/124
Abstract: The protective circuit is formed using a non-linear element which includes a gate insulating film covering a gate electrode; a first wiring layer and a second wiring layer which are over the gate insulating film and whose end portions overlap with the gate electrode; and an oxide semiconductor layer which is over the gate electrode and in contact with the gate insulating film and the end portions of the first wiring layer and the second wiring layer. The gate electrode of the non-linear element and a scan line or a signal line is included in a wiring, the first or second wiring layer of the non-linear element is directly connected to the wiring so as to apply the potential of the gate electrode.
Abstract translation: 保护电路使用非线性元件形成,该非线性元件包括覆盖栅电极的栅极绝缘膜; 第一布线层和第二布线层,其在栅极绝缘膜上方并且其端部与栅电极重叠; 以及氧化物半导体层,其在所述栅电极的上方并与所述栅极绝缘膜和所述第一布线层和所述第二布线层的端部接触。 非线性元件的栅电极和扫描线或信号线包括在布线中,非线性元件的第一或第二布线层直接连接到布线,以施加栅极的电位 电极。
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公开(公告)号:US20240192558A1
公开(公告)日:2024-06-13
申请号:US18527464
申请日:2023-12-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masatoshi YOKOYAMA , Shigeki KOMORI , Manabu SATO , Kenichi OKAZAKI , Shunpei YAMAZAKI
IPC: G02F1/1362 , G02F1/1333 , G02F1/1343
CPC classification number: G02F1/136227 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/136277 , G02F1/134372 , G02F2202/02 , G02F2202/10
Abstract: To suppress a variation in characteristics of a transistor due to a released gas from an organic insulating film so that reliability of a display device is increased. The display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components (a transparent conductive layer and an inorganic insulating film) of the capacitor, and a released gas from the organic insulating film can be released to the outside from exposed part of an upper surface of the organic insulating film.
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公开(公告)号:US20230307550A1
公开(公告)日:2023-09-28
申请号:US18020758
申请日:2021-08-17
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Yasumasa YAMANE , Yoshinori ANDO , Shigeki KOMORI , Ryota HODO , Tatsuya ONUKI , Shinya SASAGAWA
IPC: H01L29/786
CPC classification number: H01L29/78693
Abstract: A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes a first device layer to an n-th (n is a natural number of 2 or more) device layer, each of which includes a first barrier insulating film, a second barrier insulating film, a third barrier insulating film, an oxide semiconductor device, a first conductor, and a second conductor. In each of the first device layer to the n-th device layer, the oxide semiconductor device is placed over the first barrier insulating film, the second barrier insulating film is placed to cover the oxide semiconductor device, the first conductor is placed so as to be electrically connected to the oxide semiconductor device through an opening formed in the second barrier insulating film, the second conductor is placed over the first conductor, the third barrier insulating film is placed over the second conductor and the second barrier insulating film, and the first barrier insulating film to the third barrier insulating film have a function of inhibiting diffusion of hydrogen.
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公开(公告)号:US20230290789A1
公开(公告)日:2023-09-14
申请号:US18133086
申请日:2023-04-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei YAMAZAKI , Kengo AKIMOTO , Shigeki KOMORI , Hideki UOCHI , Tomoya FUTAMURA , Takahiro KASAHARA
IPC: H01L27/12 , G02F1/1362 , H01L27/02 , H01L29/786 , H10K59/131 , H10K59/121
CPC classification number: H01L27/1225 , G02F1/136204 , G02F1/136286 , H01L27/124 , H01L27/0266 , H01L29/7869 , H10K59/131 , H10K59/1213
Abstract: A protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
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