公开(公告)号：US09343146B2

公开(公告)日：2016-05-17

申请号：US13347613

申请日：2012-01-10

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: G11C11/34 ,  G11C7/02 ,  G11C13/00 ,  G11C7/06 ,  G11C7/12

CPC classification number: G11C13/004 ,  G11C7/062 ,  G11C7/12 ,  G11C2013/0042 ,  G11C2013/0045 ,  G11C2207/063

Abstract: Memory apparatuses and methods for low power current mode sense amplification are disclosed. An example memory apparatus may include a current mode sense amplifier and a current circuit. The current mode sense amplifier may be configured to provide an output current. The current circuit may comprise a bias generator that is configured to generate a bias signal as well as a current control circuit coupled to both the current mode sense amplifier and the bias generator. The current control circuit may be configured to receive both the output current and the bias signal and control the output current based, at least in part, on the bias signal.

Abstract translation: 公开了用于低功率电流模式感测放大的存储装置和方法。 示例性存储装置可以包括电流模式读出放大器和电流电路。 电流模式读出放大器可以被配置成提供输出电流。 当前电路可以包括被配置为产生偏置信号的偏置发生器以及耦合到电流模式读出放大器和偏置发生器两者的电流控制电路。 电流控制电路可以被配置为至少部分地基于偏置信号接收输出电流和偏置信号两者并控制输出电流。

公开(公告)号：US09073752B2

公开(公告)日：2015-07-07

申请号：US13112128

申请日：2011-05-20

Applicant: Ho-Cheol Kang ,  Young-Hoon Noh ,  Chang-Hee Lee ,  Kook Heon Char ,  Seong-Hoon Lee ,  Jeong Hun Kwak ,  Wan Ki Bae ,  Jae Hoon Lim ,  Dong Gu Lee

Inventor： Ho-Cheol Kang ,  Young-Hoon Noh ,  Chang-Hee Lee ,  Kook Heon Char ,  Seong-Hoon Lee ,  Jeong Hun Kwak ,  Wan Ki Bae ,  Jae Hoon Lim ,  Dong Gu Lee

IPC: H01L29/06 ,  H01L31/00 ,  H01L29/10 ,  H01L29/12 ,  H01L21/16 ,  H01L29/26 ,  H01L31/12 ,  B82Y20/00 ,  H01L51/50 ,  H01L21/02 ,  H05B33/10

CPC classification number: B82Y20/00 ,  H01L21/02601 ,  H01L51/502 ,  H05B33/10

Abstract: The present invention relates to a quantum dot light emitting element which can form a quantum light emitting layer configured of charge transporting particles and quantum dots and a charge transporting layer in a solution process, to reduce process expense, and a method for manufacturing the same. The quantum dot light emitting element includes a substrate, an anode formed on the substrate, a quantum light emitting layer formed on the anode, the quantum light emitting layer having charge transporting particles and quantum dots mixed therein, and a cathode formed on the quantum light emitting layer.

Abstract translation: 本发明涉及一种量子点发光元件，其可以在溶液工艺中形成由电荷输送粒子和量子点以及电荷输送层构成的量子发光层，以减少工艺费用，及其制造方法。 量子点发光元件包括衬底，形成在衬底上的阳极，形成在阳极上的量子发光层，其中混合有电荷传输粒子和量子点的量子发光层和形成在量子光上的阴极 发光层。

公开(公告)号：US08659965B2

公开(公告)日：2014-02-25

申请号：US13619763

申请日：2012-09-14

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: G11C7/02

CPC classification number: G11C7/065 ,  G11C7/062 ,  G11C7/08 ,  G11C7/12 ,  H03F3/45179 ,  H03G3/00

Abstract: Memories, sense amplifiers, and methods for amplifying a current input are disclosed, including a sense amplifier including a bias circuit configured to provide a bias voltage having a magnitude responsive to maintaining a substantially constant loop gain, and further including an amplifier stage coupled to the bias circuit to receive the bias voltage and configured to amplify a input current at an input-output node, a loop gain of the current amplifier stage is controlled at least in part to the bias voltage.

Abstract translation: 公开了用于放大电流输入的存储器，感测放大器和放大电流输入的方法，包括读出放大器，其包括偏置电路，该偏置电路被配置为提供具有响应于保持基本上恒定的环路增益的幅度的偏置电压，并且还包括耦合到 偏置电路以接收所述偏置电压并且被配置为放大输入 - 输出节点处的输入电流，所述电流放大器级的环路增益至少部分地被控制为所述偏置电压。

公开(公告)号：US20130176078A1

公开(公告)日：2013-07-11

申请号：US13347613

申请日：2012-01-10

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: H03F3/04

CPC classification number: G11C13/004 ,  G11C7/062 ,  G11C7/12 ,  G11C2013/0042 ,  G11C2013/0045 ,  G11C2207/063

Abstract: Memory apparatuses and methods for low power current mode sense amplification are disclosed. An example memory apparatus may include a current mode sense amplifier and a current circuit. The current mode sense amplifier may be configured to provide an output current. The current circuit may comprise a bias generator that is configured to generate a bias signal as well as a current control circuit coupled to both the current mode sense amplifier and the bias generator. The current control circuit may be configured to receive both the output current and the bias signal and control the output current based, at least in part, on the bias signal.

Abstract translation: 公开了用于低功率电流模式感测放大的存储装置和方法。 示例性存储装置可以包括电流模式读出放大器和电流电路。 电流模式读出放大器可以被配置成提供输出电流。 当前电路可以包括被配置为产生偏置信号的偏置发生器以及耦合到电流模式读出放大器和偏置发生器两者的电流控制电路。 电流控制电路可以被配置为至少部分地基于偏置信号接收输出电流和偏置信号两者并控制输出电流。

公开(公告)号：US20130009705A1

公开(公告)日：2013-01-10

申请号：US13619763

申请日：2012-09-14

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: H03F3/45

CPC classification number: G11C7/065 ,  G11C7/062 ,  G11C7/08 ,  G11C7/12 ,  H03F3/45179 ,  H03G3/00

Abstract: Memories, sense amplifiers, and methods for amplifying a current input are disclosed, including a sense amplifier including a bias circuit configured to provide a bias voltage having a magnitude responsive to maintaining a substantially constant loop gain, and further including an amplifier stage coupled to the bias circuit to receive the bias voltage and configured to amplify a input current at an input-output node, a loop gain of the current amplifier stage is controlled at least in part to the bias voltage.

Abstract translation: 公开了用于放大电流输入的存储器，感测放大器和放大电流输入的方法，包括读出放大器，其包括偏置电路，该偏置电路被配置为提供具有响应于保持基本上恒定的环路增益的幅度的偏置电压，并且还包括耦合到 偏置电路以接收所述偏置电压并且被配置为放大输入 - 输出节点处的输入电流，所述电流放大器级的环路增益至少部分地被控制为所述偏置电压。

公开(公告)号：US20130002354A1

公开(公告)日：2013-01-03

申请号：US13612482

申请日：2012-09-12

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: H03F3/16 ,  H03F3/45

CPC classification number: H03F3/245 ,  H03K19/00315 ,  H04L25/0272

Abstract: Signaling systems, preamplifiers, memory devices and methods are disclosed, such as a signaling system that includes a transmitter configured to receive a first digital signal. The transmitter provides a transmitted signal corresponding to the digital signal to a signal path. A receiver system coupled to the signal line includes a preamplifier coupled to receive the transmitted signal from the signal path. The preamplifier includes a common-gate amplifying transistor that is configured to provide an amplified signal. The receiver system also includes a receiver coupled to receive the amplified signal from the preamplifier. The receiver is configured to provide a second digital signal corresponding to the amplified signal received by the receiver. Such a signaling system may be used in a memory device or in any other electronic circuit.

Abstract translation: 公开了信号系统，前置放大器，存储器件和方法，例如包括被配置为接收第一数字信号的发射器的信令系统。 发射机将对应于数字信号的发射信号提供给信号路径。 耦合到信号线的接收机系统包括前置放大器，其被耦合以从信号路径接收发送的信号。 前置放大器包括配置成提供放大信号的共栅放大晶体管。 接收机系统还包括接收器，用于从前置放大器接收放大的信号。 接收器被配置为提供对应于由接收器接收的放大信号的第二数字信号。 这样的信令系统可以用在存储器装置或任何其它电子电路中。

公开(公告)号：US20110284819A1

公开(公告)日：2011-11-24

申请号：US13112128

申请日：2011-05-20

Applicant: Ho-Cheol Kang ,  Young-Hoon Noh ,  Chang-Hee Lee ,  Kook Heon Char ,  Seong-Hoon Lee ,  Jeong Hun Kwak ,  Wan Ki Bae ,  Jae Hoon Lim ,  Dong Gu Lee

Inventor： Ho-Cheol Kang ,  Young-Hoon Noh ,  Chang-Hee Lee ,  Kook Heon Char ,  Seong-Hoon Lee ,  Jeong Hun Kwak ,  Wan Ki Bae ,  Jae Hoon Lim ,  Dong Gu Lee

IPC: H01L33/04 ,  B82Y40/00 ,  B82Y99/00

CPC classification number: B82Y20/00 ,  H01L21/02601 ,  H01L51/502 ,  H05B33/10

Abstract: The present invention relates to a quantum dot light emitting element which can form a quantum light emitting layer configured of charge transporting particles and quantum dots and a charge transporting layer in a solution process, to reduce process expense, and a method for manufacturing the same. The quantum dot light emitting element includes a substrate, an anode formed on the substrate, a quantum light emitting layer formed on the anode, the quantum light emitting layer having charge transporting particles and quantum dots mixed therein, and a cathode formed on the quantum light emitting layer.

Abstract translation: 本发明涉及一种量子点发光元件，其可以在溶液工艺中形成由电荷输送粒子和量子点以及电荷输送层构成的量子发光层，以减少工艺费用，及其制造方法。 量子点发光元件包括衬底，形成在衬底上的阳极，形成在阳极上的量子发光层，其中混合有电荷传输粒子和量子点的量子发光层和形成在量子光上的阴极 发光层。

公开(公告)号：US08022729B2

公开(公告)日：2011-09-20

申请号：US12101770

申请日：2008-04-11

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: H03K19/094 ,  H03K3/00 ,  H01B1/00

CPC classification number: G11C5/147 ,  H02M3/1563 ,  H03K17/687 ,  H03K19/018507 ,  H03K19/018585

Abstract: A signal driver circuit having an adjustable output voltage for a high-logic level output signal. The signal driver circuit includes a signal driver configured to output a first logic level signal having a first voltage and output a second logic level signal having a second voltage according to an input signal. A voltage controlled voltage supply coupled to the signal driver provides the first voltage for the first logic level signal. The magnitude of the first voltage provided by the voltage controlled voltage supply is based on a bias voltage. A bias voltage generator can be coupled to the voltage controlled voltage supply to provide the bias voltage.

Abstract translation: 具有用于高逻辑电平输出信号的可调输出电压的信号驱动器电路。 信号驱动器电路包括：信号驱动器，被配置为输出具有第一电压的第一逻辑电平信号，并根据输入信号输出具有第二电压的第二逻辑电平信号。 耦合到信号驱动器的电压控制电压电源为第一逻辑电平信号提供第一电压。 由压控电压提供的第一电压的大小基于偏置电压。 偏置电压发生器可以耦合到压控电压源以提供偏置电压。

公开(公告)号：US07714617B2

公开(公告)日：2010-05-11

申请号：US12209051

申请日：2008-09-11

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: H03K19/094

CPC classification number: G11C7/1051 ,  G11C7/1057 ,  G11C8/06 ,  G11C8/08 ,  H03K19/018521

Abstract: Processor-based systems, memories, signal driver circuits, and methods of generating an output signal are disclosed. One such signal driver circuit includes a signal driver configured to generate an output signal at an output node in response to an input signal and a transistor coupled to the signal driver that is configured to couple and decouple the output node and the voltage supply according to a control signal. A voltage comparator circuit coupled to the output node and the transistor is configured to generate the control signal to control coupling and decoupling of the output node and the voltage supply through the transistor based on a voltage of the output signal relative to the reference voltage.

Abstract translation: 公开了基于处理器的系统，存储器，信号驱动器电路和产生输出信号的方法。 一个这样的信号驱动器电路包括信号驱动器，其被配置为响应于输入信号在输出节点处产生输出信号，以及耦合到信号驱动器的晶体管，其被配置为根据输出信号耦合和去耦输出节点和电压源 控制信号。 耦合到输出节点和晶体管的电压比较器电路被配置为产生控制信号，以基于输出信号相对于参考电压的电压来控制输出节点和通过晶体管的电压源的耦合和去耦。

公开(公告)号：US07643359B2

公开(公告)日：2010-01-05

申请号：US11957333

申请日：2007-12-14

Applicant: Seong-Hoon Lee

Inventor： Seong-Hoon Lee

IPC: G11C7/00

CPC classification number: G11C7/1072 ,  G11C7/222 ,  H03L7/0812 ,  H03L7/095 ,  H03L7/0995

Abstract: A clock generating circuit includes a phase comparison circuit that generates a delay control signal corresponding to the relative phases of an output clock signal and a reference clock signal. A voltage controlled delay circuit generates the delayed clock signal by inverting a signal applied to its input and delaying the signal by a delay that is determined by a delay control signal. A selection circuit couples either the reference clock signal or the delayed clock signal to the input of the voltage controlled delay circuit. When the reference clock signal is coupled to the input of the voltage controlled delay circuit, the clock generating circuit functions as a delay-lock loop. When the delayed clock signal is coupled to the input of the voltage controlled delay circuit, the voltage controlled delay circuit operates as a ring oscillator so that the clock generating circuit functions as a phase-lock loop.

Abstract translation: 时钟发生电路包括相位比较电路，其产生对应于输出时钟信号和参考时钟信号的相对相位的延迟控制信号。 电压控制延迟电路通过反相施加到其输入的信号并延迟由延迟控制信号确定的延迟来产生延迟的时钟信号。 选择电路将参考时钟信号或延迟时钟信号耦合到电压控制延迟电路的输入端。 当参考时钟信号耦合到电压控制延迟电路的输入时，时钟发生电路用作延迟锁定环路。 当延迟的时钟信号耦合到压控延迟电路的输入时，电压控制延迟电路作为环形振荡器工作，使得时钟产生电路用作锁相环。