公开(公告)号：US08294839B2

公开(公告)日：2012-10-23

申请号：US13162515

申请日：2011-06-16

申请人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

发明人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

IPC分类号： G02F1/136

CPC分类号： G02F1/134336 ,  G02F1/1362 ,  G02F1/136286 ,  G02F2001/13606 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/12

摘要： A method for manufacturing a thin film transistor array panel is disclosed. A gate wiring pattern is formed on an insulating substrate. A gate insulating layer is formed on the gate wiring pattern. A semiconductor pattern is formed on the gate insulating layer. A transparent conductive layer is formed on the gate insulating layer. The transparent conductive layer is patterned to form a pixel electrode. An opening is formed at a circumference of the pixel electrode. The opening minimizes misalignment during the manufacturing process and prevents shorts between a data line and the pixel electrode.

摘要翻译： 公开了一种制造薄膜晶体管阵列面板的方法。 在绝缘基板上形成栅极布线图案。 栅极绝缘层形成在栅极布线图案上。 在栅极绝缘层上形成半导体图形。 在栅极绝缘层上形成透明导电层。 图案化透明导电层以形成像素电极。 在像素电极的圆周上形成开口。 该开口使制造过程中的未对准最小化并防止数据线与像素电极之间的短路。

公开(公告)号：US08088653B2

公开(公告)日：2012-01-03

申请号：US12604318

申请日：2009-10-22

申请人： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L21/00

CPC分类号： H01L29/78669 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

摘要： A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.

摘要翻译： TFT包括栅电极，有源层，源电极，漏电极和缓冲层。 栅电极形成在基板上; 在栅电极上形成有源层。 形成在有源层上的源电极和漏电极分开预定的距离。 缓冲层形成在有源层与源极和漏极之间。 缓冲层具有对应于缓冲层厚度的基本连续变化的含量比。 形成缓冲层以抑制有源层的氧化，并降低接触电阻。

公开(公告)号：US08035100B2

公开(公告)日：2011-10-11

申请号：US12197573

申请日：2008-08-25

申请人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo Yoon ,  Sung-Hoon Yang ,  Byoung-June Kim ,  Czang-Ho Lee ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/12

CPC分类号： H01L29/7869 ,  H01L27/1225

摘要： A thin film transistor substrate includes an insulating plate; a gate electrode disposed on the insulating plate; a semiconductor layer comprising a metal oxide, wherein the metal oxide has oxygen defects of less than or equal to 3%, and wherein the metal oxide comprises about 0.01 mole/cm3 to about 0.3 mole/cm3 of a 3d transition metal; a gate insulating layer disposed between the gate electrode and the semiconductor layer; and a source electrode and a drain electrode disposed on the semiconductor layer. Also described is a display substrate. The metal oxide has oxygen defects of less than or equal to 3%, and is doped with about 0.01 mole/cm3 to about 0.3 mole/cm3 of 3d transition metal. The metal oxide comprises indium oxide or titanium oxide. The 3d transition metal includes at least one 3d transition metal selected from the group consisting of chromium, cobalt, nickel, iron, manganese, and mixtures thereof.

摘要翻译： 薄膜晶体管基板包括绝缘板; 设置在绝缘板上的栅电极; 包含金属氧化物的半导体层，其中所述金属氧化物具有小于或等于3％的氧缺陷，并且其中所述金属氧化物包含约0.01mol / cm 3至约0.3mol / cm 3的3d过渡金属; 设置在所述栅极电极和所述半导体层之间的栅极绝缘层; 以及设置在半导体层上的源电极和漏电极。 还描述了显示基板。 金属氧化物具有小于或等于3％的氧缺陷，并且掺杂有约0.01摩尔/ cm3至约0.3摩尔/ cm3的3d过渡金属。 金属氧化物包括氧化铟或二氧化钛。 3d过渡金属包括选自铬，钴，镍，铁，锰及其混合物中的至少一种3d过渡金属。

公开(公告)号：US07902553B2

公开(公告)日：2011-03-08

申请号：US11930536

申请日：2007-10-31

申请人： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

发明人： Byoung-June Kim ,  Jae-Ho Choi ,  Chang-Oh Jeong ,  Sung-Hoon Yang ,  Je-Hun Lee ,  Do-Hyun Kim ,  Hwa-Yeul Oh ,  Yong-Mo Choi

IPC分类号： H01L29/04

CPC分类号： H01L27/1255 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66765

摘要： A manufacturing method of a thin film transistor (TFT) includes forming a gate electrode including a metal that can be combined with silicon to form silicide on a substrate and forming a gate insulation layer by supplying a gas which includes silicon to the gate electrode at a temperature below about 280° C. The method further includes forming a semiconductor on the gate insulation layer, forming a data line and a drain electrode on the semiconductor and forming a pixel electrode connected to the drain electrode.

摘要翻译： 薄膜晶体管（TFT）的制造方法包括形成包括可以与硅组合的金属的栅电极，以在衬底上形成硅化物，并通过在栅极电极中向栅电极提供包括硅的气体形成栅极绝缘层 该方法还包括在栅极绝缘层上形成半导体，在半导体上形成数据线和漏极并形成连接到漏电极的像素电极。

公开(公告)号：US20100245698A1

公开(公告)日：2010-09-30

申请号：US12612620

申请日：2009-11-04

申请人： Yong-Hwan Kim ,  Jang-Soo Kim ,  Hong-Suk Yoo ,  Seung-Soo Baek ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Jong-In Kim ,  Sang-Hee Jang

发明人： Yong-Hwan Kim ,  Jang-Soo Kim ,  Hong-Suk Yoo ,  Seung-Soo Baek ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Jong-In Kim ,  Sang-Hee Jang

IPC分类号： G02F1/136 ,  G02F1/1333

CPC分类号： G02F1/136209

摘要： The present invention relates to a liquid crystal display. The liquid crystal display has a lower panel including a first pixel area having a first pixel electrode and a first light leakage preventing member, a final pixel area having a second pixel electrode and a second light leakage preventing member, and middle pixel areas disposed between the first pixel area and the final pixel area, each of the middle pixel areas including a first middle pixel electrode and a second middle pixel electrode. Accordingly, light leakage may be effectively prevented at the first pixel area and the final pixel area that are disposed on the edge.

摘要翻译： 本发明涉及一种液晶显示器。 液晶显示器具有包括具有第一像素电极和第一防漏光部件的第一像素区域，具有第二像素电极和第二防漏光部件的最终像素区域的下面板，以及设置在第二像素区域之间的中间像素区域 第一像素区域和最终像素区域，每个中间像素区域包括第一中间像素电极和第二中间像素电极。 因此，可以有效地防止在设置在边缘上的第一像素区域和最终像素区域处的光泄漏。

公开(公告)号：US20100127961A1

公开(公告)日：2010-05-27

申请号：US12537702

申请日：2009-08-07

申请人： CHUL HUH ,  Ki-Hun Jeong ,  Jae-Ho Choi ,  Yang-Ho Jung ,  Jin-Seuk Kim ,  Sang-Hun Lee ,  Gwan-Soo Kim ,  Sung-Hoon Yang

发明人： CHUL HUH ,  Ki-Hun Jeong ,  Jae-Ho Choi ,  Yang-Ho Jung ,  Jin-Seuk Kim ,  Sang-Hun Lee ,  Gwan-Soo Kim ,  Sung-Hoon Yang

IPC分类号： G09G3/36

CPC分类号： G02F1/136227 ,  G02F2001/134345 ,  G02F2001/136222

摘要： A thin film transistor array panel including a substrate, gate lines formed on the substrate and extending in a first direction, data lines formed on the substrate and extending in a second direction, wherein the data lines cross and are insulated from the gate lines, and thin film transistors each with a control terminal, an input terminal, and an output terminal. The control and input terminals of the thin film transistor are connected to the gate and data lines. A barrier rib is formed on the gate lines, the data lines, and the thin film transistors. The barrier rib has the same pattern as the gate lines, the data lines, and the thin film transistors. Color filters fill regions demarcated by the barrier rib. Pixel electrodes are formed on the color filters. The output terminal of the thin film transistor has an opening, and a portion of the barrier rib formed on the output terminal has an output opening. The barrier rib output terminal portion has the same pattern as the output terminal. With the thin film transistor array panel, a barrier rib for forming contact holes is formed through exposing a positive photosensitive organic layer formed on a passivation layer to light from the backside of a substrate by using drain electrodes with openings as a light blocking film.

摘要翻译： 一种薄膜晶体管阵列面板，包括基板，形成在基板上并沿第一方向延伸的栅极线，形成在基板上并沿第二方向延伸的数据线，其中数据线交叉并与栅极线绝缘，以及 薄膜晶体管分别具有控制端子，输入端子和输出端子。 薄膜晶体管的控制和输入端子连接到栅极和数据线。 在栅极线，数据线和薄膜晶体管上形成障壁。 阻挡肋具有与栅极线，数据线和薄膜晶体管相同的图案。 彩色滤光片填充由障壁划分的区域。 像素电极形成在滤色器上。 薄膜晶体管的输出端子具有开口，并且形成在输出端子上的阻挡肋的一部分具有输出开口。 隔壁输出端子部分具有与输出端子相同的图案。 利用薄膜晶体管阵列面板，通过使用具有开口的漏极作为遮光膜，形成用于形成接触孔的阻挡肋，其通过将形成在钝化层上的正性光敏有机层暴露于来自衬底背面的光而形成。

公开(公告)号：US20100062574A1

公开(公告)日：2010-03-11

申请号：US12604318

申请日：2009-10-22

申请人： Byoung-June KIM ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Byoung-June KIM ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L21/336

CPC分类号： H01L29/78669 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

摘要： A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.

摘要翻译： TFT包括栅电极，有源层，源电极，漏电极和缓冲层。 栅电极形成在基板上; 在栅电极上形成有源层。 形成在有源层上的源电极和漏电极分开预定的距离。 缓冲层形成在有源层与源极和漏极之间。 缓冲层具有对应于缓冲层厚度的基本连续变化的含量比。 形成缓冲层以抑制有源层的氧化，并降低接触电阻。

公开(公告)号：US07615867B2

公开(公告)日：2009-11-10

申请号：US11538394

申请日：2006-10-03

申请人： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Byoung-June Kim ,  Sung-Hoon Yang ,  Min-Seok Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/417 ,  H01L29/49

CPC分类号： H01L29/78669 ,  H01L27/12 ,  H01L27/124 ,  H01L29/458 ,  H01L29/66765

摘要： A TFT includes a gate electrode, an active layer, a source electrode, a drain electrode, and a buffer layer. The gate electrode is formed on the substrate; the active layer is formed on the gate electrode. The source and drain electrodes, formed on the active layer, are separated by a predetermined distance. The buffer layer is formed between the active layer and the source and drain electrodes. The buffer layer has a substantially continuously varying content ratio corresponding to a buffer layer thickness. The buffer layer is formed to suppress oxidation of the active layer, and reduce contact resistance.

摘要翻译： TFT包括栅电极，有源层，源电极，漏电极和缓冲层。 栅电极形成在基板上; 在栅电极上形成有源层。 形成在有源层上的源电极和漏电极分开预定的距离。 缓冲层形成在有源层与源极和漏极之间。 缓冲层具有对应于缓冲层厚度的基本连续变化的含量比。 形成缓冲层以抑制有源层的氧化，并降低接触电阻。

公开(公告)号：US20090152553A1

公开(公告)日：2009-06-18

申请号：US12188956

申请日：2008-08-08

申请人： Kap-Soo YOON ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

发明人： Kap-Soo YOON ,  Sung-Hoon Yang ,  Sung-Ryul Kim ,  Hwa-Yeul Oh ,  Jae-Ho Choi ,  Yong-Mo Choi

IPC分类号： H01L29/04 ,  H01L21/336

CPC分类号： H01L29/78696 ,  B82Y10/00 ,  H01L29/778 ,  H01L29/78687

摘要： A thin-film transistor (TFT) includes a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The semiconductor pattern includes an active layer being overlapped with the gate electrode and a low band gap portion having a lower energy band gap than the active layer. The source and drain electrodes are spaced apart from each other to be overlapped with the semiconductor pattern. Therefore, the semiconductor pattern includes a low band gap portion having a lower energy band gap than the active layer, so that electron mobility may be increased in a channel formed along the low band gap portion so that electric characteristics of the TFT may be enhanced.

摘要翻译： 薄膜晶体管（TFT）包括栅电极，半导体图案，源电极和漏电极。 半导体图案包括与栅电极重叠的有源层和具有比有源层更低的能带隙的低带隙部分。 源极和漏极彼此间隔开以与半导体图案重叠。 因此，半导体图案包括具有比有源层低的能带隙的低带隙部分，使得沿着低带隙部分形成的沟道中的电子迁移率可能增加，从而可以提高TFT的电特性。

公开(公告)号：US06900854B1

公开(公告)日：2005-05-31

申请号：US10626617

申请日：2003-07-25

申请人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

发明人： Dong-Gyu Kim ,  Jun-Ho Song ,  Jong-Woong Chang ,  Jae-Ho Choi ,  Byoung-Sun Na ,  Young-Bae Park ,  Sung-Wook Huh

IPC分类号： G02F1/13 ,  G02F1/1343 ,  G02F1/1362 ,  H01L21/77 ,  H01L21/84 ,  H01L29/10 ,  H01L29/12

CPC分类号： G02F1/134336 ,  G02F1/1362 ,  G02F1/136286 ,  G02F2001/13606 ,  H01L27/124 ,  H01L27/1288 ,  H01L29/12

摘要： A gate wire including a gate line extending in the horizontal direction, and a gate electrode is formed on an insulating substrate. A gate insulating layer is formed on the gate wire and covers the same. A semiconductor pattern is formed on the gate insulating layer 30, and formed on the semiconductor pattern are a data wire having a date line in the vertical direction, a source electrode, a drain electrode separated from the source electrode opposite the source electrode with respect to the gate electrode, and an align pattern located on both sides of the data line. A passivation layer is formed on the data wire and the align pattern, and has contact holes exposing the drain electrode and an opening exposing the substrate between the data line and the align pattern. Here, the align pattern adjacent to the data line is exposed through the opening, and the semiconductor pattern and the gate insulating layer are under-cut. A pixel electrode connected to the drain electrode through the contact hole is formed on the passivation layer. Here, the opening is located between the data line and the pixel electrode. In this structure, misalignment occurring in the manufacturing process of a thin film transistor panel for a liquid crystal display is minimized, and stitch defects are prevented by uniformity forming a coupling capacitance between the data line and the pixel electrode. Shorts between the data line and the pixel electrode are prevented by forming the opening between the data line and the pixel electrode.

摘要翻译： 包括在水平方向延伸的栅极线的栅极线和在绝缘基板上形成栅电极。 栅极绝缘层形成在栅极导线上并覆盖其上。 在栅极绝缘层30上形成半导体图案，在半导体图案上形成有在垂直方向上具有日期线的数据线，源电极，与源电极相对的源电极分离的漏电极相对于 栅极电极和位于数据线两侧的对准图案。 在数据线和对准图案上形成钝化层，并且具有暴露漏电极的接触孔和在数据线和对准图案之间暴露衬底的开口。 这里，与数据线相邻的对准图案通过开口露出，并且半导体图案和栅极绝缘层被切割。 通过接触孔连接到漏电极的像素电极形成在钝化层上。 这里，开口位于数据线和像素电极之间。 在这种结构中，在用于液晶显示器的薄膜晶体管面板的制造过程中发生的偏移被最小化，并且通过在数据线和像素电极之间形成耦合电容的均匀性来防止缝合缺陷。 通过在数据线和像素电极之间形成开口来防止数据线与像素电极之间的短路。