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公开(公告)号：US20080246019A1
公开(公告)日：2008-10-09
申请号：US12139080
申请日：2008-06-13
IPC分类号： H01L29/15 , H01L29/165
CPC分类号： H01L21/7624 , Y10S438/933 , Y10T428/12674
摘要： A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.
摘要翻译： 描述了可以用作应变Si的模板的制造高质量，基本上松弛的绝缘体上硅衬底材料的方法。 使用具有非常薄的顶部Si层的绝缘体上硅衬底作为压缩应变SiGe生长的模板。 当SiGe层在足够的温度下弛豫时，位错运动的性质使得当埋入的氧化物半粘着时，应变消除缺陷向下移动到薄的Si层中。 薄Si层被掩埋氧化物/薄Si界面的氧化所消耗。 这可以通过在高温下使用内部氧化来实现。 以这种方式，原始薄Si层的作用是在SiGe合金的弛豫期间用作牺牲缺陷陷阱，SiGe合金随后可以使用内部氧化来消耗。
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公开(公告)号：US07169226B2
公开(公告)日：2007-01-30
申请号：US10610612
申请日：2003-07-01
CPC分类号： H01L21/7624 , Y10S438/933 , Y10T428/12674
摘要： A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.
摘要翻译： 描述了可以用作应变Si的模板的制造高质量，基本上松弛的绝缘体上硅衬底材料的方法。 使用具有非常薄的顶部Si层的绝缘体上硅衬底作为压缩应变SiGe生长的模板。 当SiGe层在足够的温度下弛豫时，位错运动的性质使得当埋入的氧化物半粘着时，应变消除缺陷向下移动到薄的Si层中。 薄Si层被掩埋氧化物/薄Si界面的氧化所消耗。 这可以通过在高温下使用内部氧化来实现。 以这种方式，原始薄Si层的作用是在SiGe合金的弛豫期间用作牺牲缺陷陷阱，SiGe合金随后可以使用内部氧化来消耗。
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公开(公告)号：US06958286B2
公开(公告)日：2005-10-25
申请号：US10751208
申请日：2004-01-02
IPC分类号： C30B25/02 , C30B29/06 , C30B29/52 , H01L21/20 , H01L21/205 , H01L21/28 , H01L21/306 , H01L21/3205 , H01L21/36 , H01L21/44
CPC分类号： H01L21/02046 , C30B25/02 , C30B29/06 , C30B29/52 , H01L21/02052 , H01L21/02381 , H01L21/0243 , H01L21/02532 , H01L21/02658 , H01L21/02661 , Y10S438/933
摘要： The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the rough surface, the invention first performs a hydrofluoric acid etching process on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. This etching process removes most of oxide from the surface, and leaves a first amount of oxygen (typically 1×1013−1×1015/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The invention then performs a hydrogen pre-bake process which heats the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface sufficiently to remove additional oxygen from the surface and leave a second amount of oxygen, less than the first amount, on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. The heating process leaves an amount of at least 5×1012/cm2 of oxygen (typically, between approximately 1×1013/cm2 and approximately 5×1013/cm2 of oxygen) on the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. By leaving a small amount of oxygen on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface, the heating processes avoid changing the roughness of the silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface. Then the process of epitaxially growing the epitaxial silicon-containing layer on the silicon germanium, patterned strained silicon, or patterned silicon-on-insulator surface is performed.
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公开(公告)号：US06972247B2
公开(公告)日：2005-12-06
申请号：US10728519
申请日：2003-12-05
申请人： Stephen W. Bedell , Guy M. Cohen , Huajie Chen
发明人： Stephen W. Bedell , Guy M. Cohen , Huajie Chen
IPC分类号： H01L21/20 , H01L21/324 , H01L21/762 , H01L21/425
CPC分类号： H01L21/324
摘要： A method of fabricating a strained semiconductor-on-insulator (SSOI) substrate in which the strained semiconductor is a thin semiconductor layer having a thickness of less than 50 nm that is located directly atop an insulator layer of a preformed silicon-on-insulator substrate is provided. Wafer bonding is not employed in forming the SSOI substrate of the present invention.
摘要翻译： 一种制造应变半导体绝缘体（SSOI）衬底的方法，其中应变半导体是厚度小于50nm的薄半导体层，其直接位于预成型的绝缘体上硅衬底上的绝缘体层的顶部 被提供。 在形成本发明的SSOI基板时不使用晶片接合。
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15.发明授权Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels 失效应变硅直接绝缘体上的衬底，具有杂化晶体取向和不同的应力水平公开(公告)号：US07723791B2
公开(公告)日：2010-05-25
申请号：US12192573
申请日：2008-08-15
IPC分类号： H01L29/786
CPC分类号： H01L27/1203 , H01L21/76254 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.
摘要翻译： 本发明提供了具有多个结晶取向的应变Si直接绝缘体（SSDOI）基板及其形成方法。 广义上，但是具体来说，本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层，所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向，并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。
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16.发明授权Method of Forming strained SI/SIGE on insulator with silicon germanium buffer 失效用硅锗缓冲层在绝缘体上形成应变SI / SIGE的方法公开(公告)号：US06893936B1
公开(公告)日：2005-05-17
申请号：US10710255
申请日：2004-06-29
申请人： Huajie Chen , Stephen W. Bedell
发明人： Huajie Chen , Stephen W. Bedell
IPC分类号： H01L21/762 , H01L21/76
CPC分类号： H01L21/76254 , Y10S438/91
摘要： A method is disclosed for forming a semiconductor wafer having a strained Si or SiGe layer on an insulator layer. The method produces a structure having a SiGe buffer layer between the insulator layer and the strained Si or SiGe layer, but eliminates the need for Si epitaxy after bonding. The method also eliminates interfacial contamination between strained Si and SiGe buffer layer, and allows the formation of Si/SiGe layers having a total thickness exceeding the critical thickness of the strained Si layer.
摘要翻译： 公开了一种在绝缘体层上形成具有应变Si或SiGe层的半导体晶片的方法。 该方法产生在绝缘体层和应变Si或SiGe层之间具有SiGe缓冲层的结构，但是在结合之后不需要Si外延。 该方法还消除了应变Si和SiGe缓冲层之间的界面污染，并且允许形成总厚度超过应变Si层的临界厚度的Si / SiGe层。
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17.发明申请STRUCTURE AND METHOD FOR MANUFACTURING STRAINED SILICON DIRECTLY-ON-INSULATOR SUBSTRATE WITH HYBRID CRYSTALLINE ORIENTATION AND DIFFERENT STRESS LEVELS 失效用混合晶体取向和不同应力水平制造具有应力的硅直接绝缘体衬底的结构和方法公开(公告)号：US20080296634A1
公开(公告)日：2008-12-04
申请号：US12192573
申请日：2008-08-15
CPC分类号： H01L27/1203 , H01L21/76254 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.
摘要翻译： 本发明提供了具有多个结晶取向的应变Si直接绝缘体（SSDOI）基板及其形成方法。 广义上，但是具体来说，本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层，所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向，并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。
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18.发明授权Strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels 有权应变硅直接绝缘体上的衬底，具有杂化晶体取向和不同的应力水平公开(公告)号：US07423303B2
公开(公告)日：2008-09-09
申请号：US11830464
申请日：2007-07-30
IPC分类号： H01L29/786
CPC分类号： H01L27/1203 , H01L21/76254 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.
摘要翻译： 本发明提供了具有多个结晶取向的应变Si直接绝缘体（SSDOI）基板及其形成方法。 广义上，但是具体来说，本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层，所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向，并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。
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19.发明授权Method for manufacturing strained silicon directly-on-insulator substrate with hybrid crystalline orientation and different stress levels 失效用于制造具有混合晶体取向和不同应力水平的应变硅绝缘体上基板的方法公开(公告)号：US07271043B2
公开(公告)日：2007-09-18
申请号：US11037622
申请日：2005-01-18
IPC分类号： H01L21/8238
CPC分类号： H01L27/1203 , H01L21/76254 , H01L21/823807 , H01L21/823878 , H01L21/84
摘要： The present invention provides a strained Si directly on insulator (SSDOI) substrate having multiple crystallographic orientations and a method of forming thereof. Broadly, but in specific terms, the inventive SSDOI substrate includes a substrate; an insulating layer atop the substrate; and a semiconducting layer positioned atop and in direct contact with the insulating layer, the semiconducting layer comprising a first strained Si region and a second strained Si region; wherein the first strained Si region has a crystallographic orientation different from the second strained Si region and the first strained Si region has a crystallographic orientation the same or different from the second strained Si region. The strained level of the first strained Si region is different from that of the second strained Si region.
摘要翻译： 本发明提供了具有多个结晶取向的应变Si直接绝缘体（SSDOI）基板及其形成方法。 广义上，但是具体来说，本发明的SSDOI基板包括基板; 衬底顶部的绝缘层; 以及位于顶部并与绝缘层直接接触的半导体层，所述半导体层包括第一应变Si区和第二应变Si区; 其中所述第一应变Si区具有不同于所述第二应变Si区的晶体取向，并且所述第一应变Si区具有与所述第二应变Si区相同或不同的晶体取向。 第一应变Si区域的应变水平与第二应变Si区域的应变水平不同。
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公开(公告)号：US07071103B2
公开(公告)日：2006-07-04
申请号：US10710737
申请日：2004-07-30
申请人： Kevin K. Chan , Huajie Chen , Michael A. Gribelyuk , Judson R. Holt , Woo-Hyeong Lee , Ryan M. Mitchell , Renee T. Mo , Dan M. Mocuta , Werner A. Rausch , Paul A. Ronsheim , Henry K. Utomo
发明人： Kevin K. Chan , Huajie Chen , Michael A. Gribelyuk , Judson R. Holt , Woo-Hyeong Lee , Ryan M. Mitchell , Renee T. Mo , Dan M. Mocuta , Werner A. Rausch , Paul A. Ronsheim , Henry K. Utomo
IPC分类号： H01L21/44
CPC分类号： H01L21/28044 , H01L21/324
摘要： The present invention provides a method for retarding the diffusion of dopants from a first material layer (typically a semiconductor) into an overlayer or vice versa. In the method of the present invention, diffusion of dopants from the first semiconductor into the overlayer or vice versa is retarded by forming a monolayer comprising carbon and oxygen between the two layers. The monolayer is formed in the present invention utilizing a chemical pretreatment process in which a solution including iodine and an alcohol such as methanol is employed.
摘要翻译： 本发明提供了一种用于延迟掺杂剂从第一材料层（通常为半导体）扩散到覆盖层或反之亦然的方法。 在本发明的方法中，通过在两层之间形成包含碳和氧的单层来延缓掺杂剂从第一半导体扩散到覆层中或反之亦然。 使用化学预处理方法在本发明中形成单层，其中使用包括碘和醇如甲醇的溶液。
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