High-quality SGOI by annealing near the alloy melting point
    1.
    发明授权
    High-quality SGOI by annealing near the alloy melting point 失效
    高品质SGOI通过在合金熔点附近退火

    公开(公告)号:US07679141B2

    公开(公告)日:2010-03-16

    申请号:US12027561

    申请日:2008-02-07

    IPC分类号: H01L31/392

    摘要: A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

    摘要翻译: 提供一种形成低缺陷,基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤,并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散,从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外,由于加热步骤在接近最终SiGe合金的熔点的温度下进行,所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中,加热步骤包括氧化过程,其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

    High-quality SGOI by annealing near the alloy melting point
    3.
    发明授权
    High-quality SGOI by annealing near the alloy melting point 有权
    高品质SGOI通过在合金熔点附近退火

    公开(公告)号:US07348253B2

    公开(公告)日:2008-03-25

    申请号:US10855915

    申请日:2004-05-27

    IPC分类号: H01L21/84

    摘要: A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A heating step is then performed at a temperature that approaches the melting point of the final SiGe alloy and retards the formation of stacking fault defects while retaining Ge. The heating step permits interdiffusion of Ge throughout the first single crystal Si layer and the Ge-containing layer thereby forming a substantially relaxed, single crystal SiGe layer atop the barrier layer. Moreover, because the heating step is carried out at a temperature that approaches the melting point of the final SiGe alloy, defects that persist in the single crystal SiGe layer as a result of relaxation are efficiently annihilated therefrom. In one embodiment, the heating step includes an oxidation process that is performed at a temperature from about 1230° to about 1320° C. for a time period of less than about 2 hours. This embodiment provides SGOI substrate that have minimal surface pitting and reduced crosshatching.

    摘要翻译: 提供一种形成低缺陷,基本上松弛的绝缘体上硅衬底材料的方法。 该方法包括首先在耐Ge扩散的阻挡层上存在的第一单晶Si层的表面上形成含Ge层。 然后在接近最终SiGe合金的熔点的温度下进行加热步骤,并且在保留Ge的同时延缓层叠缺陷缺陷的形成。 加热步骤允许Ge遍及第一单晶Si层和含Ge层的相互扩散,从而在阻挡层顶部形成基本松弛的单晶SiGe层。 此外,由于加热步骤在接近最终SiGe合金的熔点的温度下进行,所以由于弛豫而在单晶SiGe层中持续存在的缺陷被有效地湮灭。 在一个实施方案中,加热步骤包括氧化过程,其在约1230℃至约1320℃的温度下进行约少于约2小时的时间。 该实施例提供具有最小表面点蚀和减少的交叉阴影的SGOI衬底。

    Defect reduction by oxidation of silicon
    4.
    发明授权
    Defect reduction by oxidation of silicon 有权
    通过氧化硅来减少缺陷

    公开(公告)号:US07816664B2

    公开(公告)日:2010-10-19

    申请号:US12139080

    申请日:2008-06-13

    IPC分类号: H01L29/06

    摘要: A high-quality, substantially relaxed SiGe-on-insulator substrate material which may be used as a template for strained Si is described. The substantially relaxed SiGe-on-insulator substrate includes a Si-containing substrate, an insulating region that is resistant to Ge diffusion present atop the Si-containing substrate, and a substantially relaxed SiGe layer present atop the insulating region. The insulating region includes an upper region that is comprised of a thermal oxide and the substantially relaxed SiGe layer has a thickness of about 2000 nm or less.

    摘要翻译: 描述了可用作应变Si的模板的高质量,基本上松弛的绝缘体上硅衬底材料。 基本上松弛的绝缘体上硅衬底包括含硅衬底,在含Si衬底顶部存在耐Ge扩散的绝缘区域和存在于绝缘区域顶部的基本弛豫的SiGe层。 绝缘区域包括由热氧化物组成的上部区域,并且基本上松弛的SiGe层具有约2000nm或更小的厚度。

    DEFECT REDUCTION BY OXIDATION OF SILICON
    5.
    发明申请
    DEFECT REDUCTION BY OXIDATION OF SILICON 有权
    通过氧化硅减少缺陷

    公开(公告)号:US20080246019A1

    公开(公告)日:2008-10-09

    申请号:US12139080

    申请日:2008-06-13

    IPC分类号: H01L29/15 H01L29/165

    摘要: A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.

    摘要翻译: 描述了可以用作应变Si的模板的制造高质量,基本上松弛的绝缘体上硅衬底材料的方法。 使用具有非常薄的顶部Si层的绝缘体上硅衬底作为压缩应变SiGe生长的模板。 当SiGe层在足够的温度下弛豫时,位错运动的性质使得当埋入的氧化物半粘着时,应变消除缺陷向下移动到薄的Si层中。 薄Si层被掩埋氧化物/薄Si界面的氧化所消耗。 这可以通过在高温下使用内部氧化来实现。 以这种方式,原始薄Si层的作用是在SiGe合金的弛豫期间用作牺牲缺陷陷阱,SiGe合金随后可以使用内部氧化来消耗。

    Defect reduction by oxidation of silicon
    6.
    发明授权
    Defect reduction by oxidation of silicon 失效
    通过氧化硅来减少缺陷

    公开(公告)号:US07169226B2

    公开(公告)日:2007-01-30

    申请号:US10610612

    申请日:2003-07-01

    IPC分类号: C30B13/00 H01L21/20

    摘要: A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. Upon relaxation of the SiGe layer at a sufficient temperature, the nature of the dislocation motion is such that the strain-relieving defects move downward into the thin Si layer when the buried oxide behaves semi-viscously. The thin Si layer is consumed by oxidation of the buried oxide/thin Si interface. This can be accomplished by using internal oxidation at high temperatures. In this way the role of the original thin Si layer is to act as a sacrificial defect sink during relaxation of the SiGe alloy that can later be consumed using internal oxidation.

    摘要翻译: 描述了可以用作应变Si的模板的制造高质量,基本上松弛的绝缘体上硅衬底材料的方法。 使用具有非常薄的顶部Si层的绝缘体上硅衬底作为压缩应变SiGe生长的模板。 当SiGe层在足够的温度下弛豫时,位错运动的性质使得当埋入的氧化物半粘着时,应变消除缺陷向下移动到薄的Si层中。 薄Si层被掩埋氧化物/薄Si界面的氧化所消耗。 这可以通过在高温下使用内部氧化来实现。 以这种方式,原始薄Si层的作用是在SiGe合金的弛豫期间用作牺牲缺陷陷阱,SiGe合金随后可以使用内部氧化来消耗。

    Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer
    8.
    发明授权
    Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer 有权
    通过弹性应变转移形成的超薄,高品质应变绝缘体上的绝缘体

    公开(公告)号:US07442993B2

    公开(公告)日:2008-10-28

    申请号:US11293774

    申请日:2005-12-02

    IPC分类号: H01L31/392

    摘要: A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 Å) and has a low defect density (stacking faults and threading defects). The method of the present invention begins with forming a stress-providing layer, such a SiGe alloy layer over a structure comprising a first semiconductor layer that is located atop an insulating layer. The stress-providing layer and the first semiconductor layer are then patterned into at least one island and thereafter the structure containing the at least one island is heated to a temperature that causes strain transfer from the stress-providing layer to the first semiconductor layer. After strain transfer, the stress-providing layer is removed from the structure to form a first strained semiconductor island layer directly atop said insulating layer.

    摘要翻译: 提供了一种在绝缘层上形成包括第一应变半导体层的半导体结构的方法,其中第一应变半导体层相对较薄(小于约)并且具有低缺陷密度(堆垛层错和穿线缺陷)。 本发明的方法开始于在包括位于绝缘层顶部的第一半导体层的结构上形成应力提供层,例如SiGe合金层。 然后将应力提供层和第一半导体层图案化成至少一个岛,然后将含有至少一个岛的结构加热到使得应力转移从应力提供层到第一半导体层的温度。 在应变转移之后,将应力提供层从结构上去除,以形成直接位于所述绝缘层顶部的第一应变半导体岛层。