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公开(公告)号:US20190146536A1
公开(公告)日:2019-05-16
申请号:US16247198
申请日:2019-01-14
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Sujan Kundapur Manohar , Angelo William Pereira , Ashish Khandelwal
Abstract: A voltage regulator (such as a low drop-out regulator) includes a pass transistor coupled to an input voltage node and an output voltage node. The voltage regulator also includes a drive transistor coupled to a control input of the pass transistor and a first resistor coupled between a source and a back gate of the drive transistor. The voltage regulator also includes a complementary to absolute temperature (CTAT) current generator circuit coupled to the resistor and configured to generate a CTAT current to bias the first resistor.
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12.
公开(公告)号:US10116294B1
公开(公告)日:2018-10-30
申请号:US15498385
申请日:2017-04-26
Applicant: Texas Instruments Incorporated
Inventor: Jingwei Xu , Vijayalakshmi Devarajan , Gangqiang Zhang , Angelo William Pereira
IPC: H03B1/00 , H03K5/1536 , H03K5/15 , H03K17/687 , H02J7/02 , H02J50/10 , H02J7/10
CPC classification number: H03K5/1536 , H02J7/025 , H02J50/10 , H02J2007/105 , H03K5/1508 , H03K17/687
Abstract: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
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13.
公开(公告)号:US10014775B1
公开(公告)日:2018-07-03
申请号:US15390911
申请日:2016-12-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rida Shawky Assaad , Angelo William Pereira
Abstract: Methods and apparatus for bootstrap capacitor sharing in multilevel DC-DC converters are disclosed. In one example, a bootstrap capacitor voltage of the bootstrap capacitor can be alternately shared between respective control gates of a first high side primary switch and a central high side primary switch of the multilevel DC-DC converter at different times during a duty cycle of the multilevel DC-DC converter. In another example, the bootstrap capacitor voltage can be transferred to drive respective control gates of the first and central high side primary switches and can ensure full gate drive of the first and central high side primary switches to avoid channel resistance degradation thereof, even when the multilevel DC-DC converter is operated in a substantially full duty cycle mode.
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公开(公告)号:US11614499B2
公开(公告)日:2023-03-28
申请号:US17133378
申请日:2020-12-23
Applicant: Texas Instruments Incorporated
Inventor: Siang Tong Tan , Gangqiang Zhang , Angelo William Pereira
Abstract: An apparatus includes a resistor having a resistor terminal. The apparatus includes a capacitor coupled to the resistor terminal. The apparatus includes a transistor having a current terminal and a gate. The gate is coupled to the resistor terminal and coupled to the capacitor. The apparatus includes a comparator having a comparator input and a comparator output. The comparator input is coupled to the current terminal. The apparatus includes a latch having a latch input coupled to the comparator output.
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公开(公告)号:US10382028B2
公开(公告)日:2019-08-13
申请号:US16128038
申请日:2018-09-11
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Jingwei Xu , Vijayalakshmi Devarajan , Gangqiang Zhang , Angelo William Pereira
IPC: H03K5/1536 , H03K5/15 , H02J7/02 , H02J50/10 , H03K17/687 , H02J7/10 , H02M1/00
Abstract: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
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16.
公开(公告)号:US20180316339A1
公开(公告)日:2018-11-01
申请号:US15498385
申请日:2017-04-26
Applicant: Texas Instruments Incorporated
Inventor: Jingwei Xu , Vijayalakshmi Devarajan , Gangqiang Zhang , Angelo William Pereira
IPC: H03K5/1536 , H03K5/15 , H03K17/687 , H02J7/02 , H02J50/10
CPC classification number: H03K5/1536 , H02J7/025 , H02J50/10 , H02J2007/105 , H03K5/1508 , H03K17/687
Abstract: Methods and apparatus for detecting zero-volt crossing in a field-effect transistor. A comparator compares a drain-to source voltage of the transistor to a threshold voltage. A gate voltage signal of the transistor is provided to a clock input of the comparator such that said gate voltage signal is used to latch a result of said comparison to an output of the comparator. A control function with respect to the transistor is performed based on the value of the comparator output.
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公开(公告)号:US10103261B1
公开(公告)日:2018-10-16
申请号:US15857214
申请日:2017-12-28
Applicant: Texas Instruments Incorporated
Inventor: Rida Shawky Assaad , Angelo William Pereira
IPC: H01L29/78 , H03K19/0185
Abstract: In a described example, an apparatus includes at least one latch coupled to a first positive supply voltage and to a first negative supply voltage, the latch having a first inverter and a second inverter coupled to one another back to back, to output a first voltage corresponding to a first latch state and a second voltage corresponding to a second latch state responsive to a first set signal and a first reset signal. An isolation circuit is coupled to a second positive supply voltage and to a second negative supply voltage and is coupled to receive a second set signal, and a second reset signal, the second positive supply voltage being floating with respect to the first positive supply voltage. The isolation circuit outputs the first set signal and the first reset signal and includes less than two pairs of drain extended metal oxide semiconductor (DEMOS) transistors.
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18.
公开(公告)号:US20180183330A1
公开(公告)日:2018-06-28
申请号:US15390911
申请日:2016-12-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Rida Shawky Assaad , Angelo William Pereira
IPC: H02M3/158
Abstract: Methods and apparatus for bootstrap capacitor sharing in multilevel DC-DC converters are disclosed. In one example, a bootstrap capacitor voltage of the bootstrap capacitor can be alternately shared between respective control gates of a first high side primary switch and a central high side primary switch of the multilevel DC-DC converter at different times during a duty cycle of the multilevel DC-DC converter. In another example, the bootstrap capacitor voltage can be transferred to drive respective control gates of the first and central high side primary switches and can ensure full gate drive of the first and central high side primary switches to avoid channel resistance degradation thereof, even when the multilevel DC-DC converter is operated in a substantially full duty cycle mode.
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