Reference precharge system
    11.
    发明授权

    公开(公告)号:US11264959B2

    公开(公告)日:2022-03-01

    申请号:US16903030

    申请日:2020-06-16

    Abstract: A precharge circuit comprises a gain amplifier, a comparator, a reservoir capacitor, a switch, a current source, and a switching network. The gain amplifier has a gain G1 and receives an input voltage Vrefp. The gain amplifier outputs an amplified voltage G1Vrefp to the comparator, which compares G1Vrefp to a voltage across the reservoir capacitor. The comparator outputs a control signal for the switch based on the comparison. The switch couples the current source to the reservoir capacitor. The current from the current source charges the reservoir capacitor. The switching network couples the reservoir capacitor to an output of the precharge circuit during a first operating mode and provides the input voltage Vrefp to the output during a second operating mode.

    Amplifier sharing technique for power reduction in analog-to-digital converter

    公开(公告)号:US09893741B2

    公开(公告)日:2018-02-13

    申请号:US15463780

    申请日:2017-03-20

    CPC classification number: H03M3/344 H03M3/468 H03M3/472 H03M3/496

    Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.

    Delta sigma modulator
    14.
    发明授权

    公开(公告)号:US11444635B2

    公开(公告)日:2022-09-13

    申请号:US17061647

    申请日:2020-10-02

    Abstract: A delta-sigma modulator includes a first amplifier having an input, a feedback control input, and an output. The input is a first input of the delta-sigma modulator. The delta-sigma modulator further includes a first integrator and a first quantizer. The first integrator has an input and an output. The output of the first amplifier is coupled to the input of the first integrator. The first quantizer has an input and an output. The output of the first quantizer is coupled to the feedback control input of the first amplifier.

    Measuring internal voltages of packaged electronic devices

    公开(公告)号:US10732660B2

    公开(公告)日:2020-08-04

    申请号:US16526801

    申请日:2019-07-30

    Abstract: An method comprising activating an internal switch within a packaged electronic device to connect to a reference ground of an internal voltage source to a first input of an analog front end, receiving an external ground potential voltage at a first package pin of the packaged electronic device, generating a zero detector output signal for the packaged electronic device at a second package pin, activating the internal switch to connect the first input of the analog front end to the internal voltage source, receiving a second voltage level at the first package pin that generates a second output signal that matches the zero detector output signal, and receiving trim instructions to trim an internal voltage generated by the internal voltage source to a voltage level that is closer to a target voltage level.

    Delta sigma ADC with output tracking for linearity

    公开(公告)号:US09979411B1

    公开(公告)日:2018-05-22

    申请号:US15394100

    申请日:2016-12-29

    CPC classification number: H03M3/484 H03M3/00 H03M3/464

    Abstract: An exemplary circuit includes a tracking circuit, a current estimator, a switch control logic, and a switching load circuit. The tracking circuit tracks a digital output signal of a delta-sigma modulator (DSM) and provides a tracking signal representing an average of the digital output signal during a time period. The current estimator determines an amount of loading to be applied to positive and negative reference voltages based on the tracking signal. The switching load circuit is coupled to positive and negative reference voltages of the DSM, the switching load circuit connects a selected amount of loading to the positive and negative reference voltages in response to a control signal to balance a reference load current applied to the DSM. The switch control logic provides the control signal to the switching load circuit based on the determined amount of loading to be applied to the positive and negative reference voltages.

    Measuring internal voltages of packaged electronic devices

    公开(公告)号:US10365678B2

    公开(公告)日:2019-07-30

    申请号:US15973691

    申请日:2018-05-08

    Abstract: An method comprising activating an internal switch within a packaged electronic device to connect to a reference ground of an internal voltage source to a first input of an analog front end, receiving an external ground potential voltage at a first package pin of the packaged electronic device, generating a zero detector output signal for the packaged electronic device at a second package pin, activating the internal switch to connect the first input of the analog front end to the internal voltage source, receiving a second voltage level at the first package pin that generates a second output signal that matches the zero detector output signal, and receiving trim instructions to trim an internal voltage generated by the internal voltage source to a voltage level that is closer to a target voltage level.

    Operational amplifier with class AB output

    公开(公告)号:US09871494B2

    公开(公告)日:2018-01-16

    申请号:US15229756

    申请日:2016-08-05

    CPC classification number: H03F3/211 H03F3/3022 H03F3/45192 H03F2203/45288

    Abstract: An operational amplifier includes an output stage, an input stage, a first auxiliary amplifier, and a second auxiliary amplifier. The output stage includes a first output transistor and a second output transistor. The input stage is configured to drive the output stage. The first auxiliary amplifier is coupled to an output of the input stage and to an input of the first output transistor. The first auxiliary amplifier is configured to bias the first output transistor for class AB operation and to isolate the input stage from a bias voltage applied to the first output transistor. The second auxiliary amplifier is coupled to the output of the input stage and to an input of the second output transistor. The second auxiliary amplifier is configured to bias the second output transistor for class AB operation, and to isolate the input stage from a bias voltage applied to the second output transistor.

    AMPLIFIER SHARING TECHNIQUE FOR POWER REDUCTION IN ANALOG-TO-DIGITAL CONVERTER
    20.
    发明申请
    AMPLIFIER SHARING TECHNIQUE FOR POWER REDUCTION IN ANALOG-TO-DIGITAL CONVERTER 有权
    用于模拟数字转换器中功率降低的放大器共享技术

    公开(公告)号:US20170041012A1

    公开(公告)日:2017-02-09

    申请号:US15231166

    申请日:2016-08-08

    CPC classification number: H03M3/344 H03M3/468 H03M3/472 H03M3/496

    Abstract: A dual delta-sigma modulator includes a first modulator, a second modulator, and a shared amplifier coupled to the first and second modulators. The first modulator includes an integrator configured to generate a first modulator output signal. The second modulator includes a second integrator configured to generate a second modulator output signal. The shared amplifier is configured to assist the first integrator integrating a difference between a first analog input signal and a first modulator output signal from the first modulator during a first period of time and to assist the second integrator integrate a difference between a second analog input signal and a second modulator output signal from the second modulator during a second period of time.

    Abstract translation: 双Δ-Δ调制器包括第一调制器,第二调制器和耦合到第一和第二调制器的共享放大器。 第一调制器包括被配置为产生第一调制器输出信号的积分器。 第二调制器包括被配置为产生第二调制器输出信号的第二积分器。 共享放大器被配置为辅助第一积分器在第一时间段期间积分第一模拟输入信号和来自第一调制器的第一调制器输出信号之间的差异,并且辅助第二积分器将第二模拟输入信号 以及在第二时间段期间来自第二调制器的第二调制器输出信号。

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