公开(公告)号：US20170033551A1

公开(公告)日：2017-02-02

申请号：US15225478

申请日：2016-08-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung J. Kim ,  Md. Abidur Rahman ,  Sualp Aras

IPC: H02H3/20 ,  H02H3/02 ,  H02M3/07

CPC classification number: H02H3/20 ,  H02H3/021 ,  H02H5/04 ,  H02H9/005

Abstract: A circuit reliability system with a first voltage supply for outputting a first voltage and a second voltage supply for outputting a second voltage. The system also includes: (i) at least one node for providing a potential in response to the first voltage and the second voltage; (ii) monitoring circuitry for detecting the first voltage exceeding a threshold; and (iii) disabling circuitry, for disabling the second voltage supply in response to the monitoring circuitry detecting the first voltage exceeding a threshold.

Abstract translation: 一种具有用于输出第一电压的第一电压源和用于输出第二电压的第二电压源的电路可靠性系统。 该系统还包括：（i）至少一个节点，用于响应于第一电压和第二电压提供电位; （ii）用于检测超过阈值的第一电压的监控电路; 以及（iii）禁用电路，用于响应于所述监视电路检测到所述第一电压超过阈值而禁用所述第二电压供应。

公开(公告)号：US20130176155A1

公开(公告)日：2013-07-11

申请号：US13782902

申请日：2013-03-01

Applicant: Texas Instruments Incorporated

Inventor： Sualp Aras ,  Guhaprakash Amudhan ,  Abidur Rahman ,  Xiaochun Zhao

IPC: H03M1/08

CPC classification number: H03M1/00 ,  G11C27/026 ,  H02M3/07 ,  H03L7/18 ,  H03M1/0818 ,  H03M1/12 ,  H04N3/155 ,  H04N5/335 ,  H04N5/3577

Abstract: An apparatus, comprising: a charge-pump; a sampler that samples an optical signal, including: a black sampler; a video sampler; and an analog to digital converter. The first aspect further provides a single clock that is coupled to and provides clocking signals to: a) the charge-pump logic that is coupled to the charge-pump; and b) the sampler logic that is coupled to the sampler that samples the optical signal, wherein if the clock for the charge pump is running faster than an analog front end (“AFE”) video sampling clock, a state-machine control is configured to: skip the charge pump clock period right before a video sample signal falling edge, thereby recovering to a normal operation the next charge-pump clock period, wherein this duty cycle modulation of charge pump clock will not substantially impact charge pump output.

Abstract translation: 一种装置，包括：电荷泵; 采样器采样光信号，包括：黑色采样器; 视频采样器; 和模数转换器。 第一方面还提供了一个单个时钟，其耦合到并提供时钟信号以便：a）耦合到电荷泵的电荷泵逻辑; 以及b）耦合到采样器的采样器逻辑，其对光信号进行采样，其中如果电荷泵的时钟运行比模拟前端（“AFE”）视频采样时钟快，则配置状态机控制 到：在视频采样信号下降沿之前跳过电荷泵时钟周期，从而恢复下一个电荷泵时钟周期的正常操作，其中电荷泵时钟的这种占空比调制将不会基本上影响电荷泵输出。

公开(公告)号：US11574902B2

公开(公告)日：2023-02-07

申请号：US16264065

申请日：2019-01-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Eung Jung Kim ,  Kyle Clifton Schulmeyer ,  Sualp Aras ,  Md Abidur Rahman ,  Xiaochun Zhao

IPC: G05F1/565 ,  H01L27/02 ,  H02H9/04

Abstract: A system includes a clamp network coupled between an input and an output and configured to clamp a voltage between the input and the output to a first clamp voltage based on the presence of a trigger signal and to a second clamp voltage based on the absence of the trigger signal. The second clamp voltage is greater than the first clamp voltage and the first clamp voltage is less than a breakdown voltage of the power transistor device. A detector circuit is coupled to the input and the output. A power transistor device may also be coupled between the input and the output. The detector circuit is configured to detect a pulse signal at the input or the output while the power transistor device is off and to generate the trigger signal for a time interval based on detecting the pulse signal.

公开(公告)号：US20210025925A1

公开(公告)日：2021-01-28

申请号：US17069560

申请日：2020-10-13

Applicant: Texas Instruments Incorporated

Inventor： Vijay Krishnamurthy ,  Abidur Rahman ,  Min Chu ,  Sualp Aras

IPC: G01R19/10 ,  H01L29/78 ,  G01R19/00 ,  H03K17/16 ,  H01L29/735 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234

Abstract: A microelectronic device has a common terminal transistor with two or more channels, and sense transistors in corresponding areas of the channels. The channels and the sense transistors share a common node in a semiconductor substrate. The sense transistors are configured to provide sense currents that are representative of currents through the corresponding channels. The sense transistors are located so that a ratio of the channel currents to the corresponding sense currents is less than a target value of cross-talk. The microelectronic device may be implemented without a compensation circuit which provides a compensation signal used to adjust one or more of the sense currents to reduce cross-talk. A method of forming the microelectronic device, including estimating a potential distribution in the semiconductor substrate containing the common node of the common terminal transistor, and selecting locations for the sense transistors based on the estimated potential distribution, is disclosed.

公开(公告)号：US10812063B2

公开(公告)日：2020-10-20

申请号：US16291747

申请日：2019-03-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Md. Abidur Rahman ,  Adam Quirk ,  Stephen Nortman ,  Sualp Aras

IPC: H02H3/00 ,  H03K17/082 ,  H02H3/06 ,  H02H5/04 ,  H03K17/08

Abstract: A circuit protective system. The system includes an output controlling enablement of a transistor and an input sensing an operational parameter associated with the transistor. The system also includes detection circuitry providing an event fault indicator if the operational parameter violates a condition. The system also includes protective circuitry disabling the transistor in response to the event fault indicator and subsequently selectively applying an enabling bias to the transistor; the enabling bias is selected from at least two different bias levels and in response to a number of event fault indications from the detection circuitry.

公开(公告)号：US10554203B1

公开(公告)日：2020-02-04

申请号：US16206317

申请日：2018-11-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sualp Aras ,  Eung Jung Kim ,  Abidur Md Rahman

IPC: H03K17/16 ,  G01R31/00 ,  G01R19/165

Abstract: In some examples, the disclosure includes a circuit including a power field effect transistor (FET), a gate pull-down circuit, a pull-down bias circuit, and a radio frequency (RF) detector coupled to the source terminal of the power FET and the pull-down bias circuit. In an example, the RF detector circuit is configured to detect a presence of an alternating current signal at a source terminal of the power FET when the power FET is in a non-conductive state and control the pull-down bias circuit to bias the gate pull-down circuit to create a low impedance path between a gate terminal of the power FET and the source terminal of the power FET when the power FET is in the non-conductive state and the alternating current signal is present at the source terminal of the power FET.

公开(公告)号：US09871514B1

公开(公告)日：2018-01-16

申请号：US15196323

申请日：2016-06-29

Applicant: Texas Instruments Incorporated

Inventor： Kyle Schulmeyer ,  Sualp Aras ,  Abidur Rahman

IPC: H03K17/687 ,  H03K5/08 ,  H02M3/07

CPC classification number: H03K17/687 ,  H02M1/32 ,  H02M3/07 ,  H02M3/156 ,  H02M2001/0009 ,  H03K5/08 ,  H03K17/0822

Abstract: An apparatus includes a FET device having a drain terminal, source terminal and a gate terminal; a first supply voltage coupled to the drain terminal of the FET; an output terminal coupled to the source terminal of the FET; a bias current supply coupled to the gate terminal of the FET; a second supply voltage coupled to the gate terminal of the FET; a current sensing circuit coupled to output a sense current proportional to the current flowing through the FET; a current limit comparator coupled to the sense current and comparing the sense current to a predetermined limit current; a pull down current circuit coupled to remove current from the gate terminal of the FET; a current time derivative circuit coupled to the sense current and outputting a sense rate current; and a circuit coupled to receive the sense rate current and coupled to the bias current supply.

公开(公告)号：US20180006643A1

公开(公告)日：2018-01-04

申请号：US15196323

申请日：2016-06-29

Applicant: Texas Instruments Incorporated

Inventor： Kyle Schulmeyer ,  Sualp Aras ,  Abidur Rahman

IPC: H03K17/687 ,  H03K5/08 ,  H02M3/07

CPC classification number: H03K17/687 ,  H02M1/32 ,  H02M3/07 ,  H02M3/156 ,  H02M2001/0009 ,  H03K5/08 ,  H03K17/0822

Abstract: An apparatus includes a FET device having a drain terminal, source terminal and a gate terminal; a first supply voltage coupled to the drain terminal of the FET; an output terminal coupled to the source terminal of the FET; a bias current supply coupled to the gate terminal of the FET; a second supply voltage coupled to the gate terminal of the FET; a current sensing circuit coupled to output a sense current proportional to the current flowing through the FET; a current limit comparator coupled to the sense current and comparing the sense current to a predetermined limit current; a pull down current circuit coupled to remove current from the gate terminal of the FET; a current time derivative circuit coupled to the sense current and outputting a sense rate current; and a circuit coupled to receive the sense rate current and coupled to the bias current supply.

公开(公告)号：US20170033783A1

公开(公告)日：2017-02-02

申请号：US15225507

申请日：2016-08-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Md. Abidur Rahman ,  Adam Quirk ,  Stephen Nortman ,  Sualp Aras

IPC: H03K17/082 ,  H02H3/00 ,  H02H3/06 ,  H02H5/04

CPC classification number: H03K17/0822 ,  H02H3/00 ,  H02H3/06 ,  H02H5/041 ,  H03K2017/0806

Abstract: A circuit protective system. The system includes an output controlling enablement of a transistor and an input sensing an operational parameter associated with the transistor. The system also includes detection circuitry providing an event fault indicator if the operational parameter violates a condition. The system also includes protective circuitry disabling the transistor in response to the event fault indicator and subsequently selectively applying an enabling bias to the transistor; the enabling bias is selected from at least two different bias levels and in response to a number of event fault indications from the detection circuitry.

Abstract translation: 电路保护系统。 该系统包括晶体管的输出控制使能和感测与晶体管相关联的操作参数的输入。 如果操作参数违反条件，该系统还包括提供事件故障指示器的检测电路。 该系统还包括保护电路，其响应于事件故障指示器禁用晶体管，随后选择性地向晶体管施加使能偏置; 从至少两个不同的偏置电平和响应于来自检测电路的多个事件故障指示来选择使能偏置。

公开(公告)号：US11467192B2

公开(公告)日：2022-10-11

申请号：US17069560

申请日：2020-10-13

Applicant: Texas Instruments Incorporated

Inventor： Vijay Krishnamurthy ,  Abidur Rahman ,  Min Chu ,  Sualp Aras

IPC: G01R19/10 ,  H01L29/78 ,  G01R19/00 ,  H03K17/16 ,  H01L29/735 ,  H01L27/088 ,  H01L29/06 ,  H01L21/8234

Abstract: A microelectronic device has a common terminal transistor with two or more channels, and sense transistors in corresponding areas of the channels. The channels and the sense transistors share a common node in a semiconductor substrate. The sense transistors are configured to provide sense currents that are representative of currents through the corresponding channels. The sense transistors are located so that a ratio of the channel currents to the corresponding sense currents is less than a target value of cross-talk. The microelectronic device may be implemented without a compensation circuit which provides a compensation signal used to adjust one or more of the sense currents to reduce cross-talk. A method of forming the microelectronic device, including estimating a potential distribution in the semiconductor substrate containing the common node of the common terminal transistor, and selecting locations for the sense transistors based on the estimated potential distribution, is disclosed.