公开(公告)号：US10735041B2

公开(公告)日：2020-08-04

申请号：US16445291

申请日：2019-06-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jikai Chen ,  Yuan Rao ,  Yanli Fan

IPC: H04B1/16 ,  G05F3/30 ,  G05F3/26 ,  H03K5/153

Abstract: A circuit includes a sensor configured to receive an input signal and to provide a sensor output signal in response to the received input signal. A plurality of mirror circuits are configured to receive the sensor output signal from the sensor and to generate mirror circuit output signals. The plurality of mirror circuits includes a first mirror circuit and at least a second mirror circuit. The first mirror circuit increases its respective mirror circuit output signal until its saturation value is reached. The second mirror circuit increases its respective mirror output signal if the sensor output signal is above a threshold value and until its saturation value is reached.

公开(公告)号：US10733129B2

公开(公告)日：2020-08-04

申请号：US15967883

申请日：2018-05-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yonghui Tang ,  Yanli Fan

IPC: G06F13/36 ,  G06F13/38 ,  G06F13/40 ,  G06F13/42 ,  H03K5/24 ,  H03K5/1534

Abstract: In one embodiment, a current source is coupled to a channel input of a switch, and an output of the switch is coupled to a positive or negative data line in a USB 2.0 communication system. In addition, a first input of the voltage threshold comparator is coupled to the negative data line, a second input of the voltage threshold comparator is coupled to a positive data line, and an output of the voltage threshold comparator is coupled to a control input of the switch.

公开(公告)号：US10536138B1

公开(公告)日：2020-01-14

申请号：US16130814

申请日：2018-09-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Huanzhang Huang ,  Jikai Chen ,  Yanli Fan ,  Md Anwar Sadat

IPC: H03K5/15 ,  H03K5/24

Abstract: In examples, an integrated circuit package comprises a pin exposed externally to the package; at least one resistor coupled to the pin at a first end of the resistor; a first transistor coupled to the at least one resistor at a second end of the resistor and coupled to a voltage source; a second transistor coupled to the at least one resistor at the second end of the resistor and coupled to a ground connection, the at least one resistor and the first and second transistors couple at a first node, the first and second transistors are of different types; and multiple comparators, each of the multiple comparators coupled to a voltage divider network and to the pin.

公开(公告)号：US20190097593A1

公开(公告)日：2019-03-28

申请号：US15716091

申请日：2017-09-26

Applicant: Texas Instruments Incorporated

Inventor： Jikai Chen ,  Gerd Schuppener ,  Yanli Fan

IPC: H03F3/45 ,  H03F1/26

Abstract: An offset cancellation circuit and method are provided where successive stages of cascaded amplifiers are operated in a saturated state. Biasing is provided, by a feedback amplifier, connected in a feedback loop for each cascaded amplifier, so as to be responsive, in a non-saturated state, to the input of an associated amplifier stage operating in the saturated state.

公开(公告)号：US20170257098A1

公开(公告)日：2017-09-07

申请号：US15600378

申请日：2017-05-19

Applicant: Texas Instruments Incorporated

Inventor： Weicheng Zhang ,  Huanzhang Huang ,  Yanli Fan ,  Roland Sperlich

IPC: H03K19/0944

CPC classification number: H03K19/0944 ,  H03K19/018578

Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.

公开(公告)号：US12026115B2

公开(公告)日：2024-07-02

申请号：US17968978

申请日：2022-10-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yonghui Tang ,  Yanli Fan

IPC: G06F13/40 ,  G06F13/42 ,  H03K5/1534 ,  H03K5/24

CPC classification number: G06F13/4022 ,  G06F13/4063 ,  G06F13/4282 ,  G06F13/4295 ,  G06F2213/0042 ,  H03K5/1534 ,  H03K5/24

Abstract: In an embodiment, a current source is coupled to a first current terminal of a switch, the second current terminal of which is coupled to a first data line in a communication system. An edge detector has a first input, a second input, and an output, in which the first input is coupled to a second data line in the communication system, the second input is coupled to the first data line, and the output is coupled to a control terminal of the switch. The first and second data lines may be positive and negative data lines, respectively, of the communication system.

公开(公告)号：US20220157222A1

公开(公告)日：2022-05-19

申请号：US17526710

申请日：2021-11-15

Applicant: Texas Instruments Incorporated

Inventor： Yonghui Tang ,  Charles Michael Campbell ,  Mustafa Ulvi Erdogan ,  Douglas Edward Wente ,  Yanli Fan

IPC: G09G3/20

Abstract: An example apparatus includes: a first input and a second input, a first equalizer with a third input, a fourth input, and a fifth input, the third input coupled to the first input, the fourth input coupled to the second input, a second equalizer with a sixth input, a seventh input, and an eighth input, the sixth input coupled to the first input, the seventh input coupled to the second input, and a controller coupled to the fifth input and the eighth input.

公开(公告)号：US20190253091A1

公开(公告)日：2019-08-15

申请号：US15895648

申请日：2018-02-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jikai Chen ,  Yuan Rao ,  Yanli Fan

IPC: H04B1/16 ,  H03K5/153 ,  G05F3/26 ,  G05F3/30

CPC classification number: H04B1/16 ,  G05F3/26 ,  G05F3/30 ,  H03K5/153

Abstract: A circuit includes a sensor configured to receive an input signal and to provide a sensor output signal in response to the received input signal. A plurality of mirror circuits are configured to receive the sensor output signal from the sensor and to generate mirror circuit output signals. The plurality of mirror circuits includes a first mirror circuit and at least a second mirror circuit. The first mirror circuit increases its respective mirror circuit output signal until its saturation value is reached. The second mirror circuit increases its respective mirror output signal if the sensor output signal is above a threshold value and until its saturation value is reached.

公开(公告)号：US10236878B1

公开(公告)日：2019-03-19

申请号：US15997913

申请日：2018-06-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jikai Chen ,  Yanli Fan

IPC: H02M3/158 ,  H03K17/689 ,  H03F3/45 ,  H02M1/44

Abstract: An isolator device (200) includes a differential transmitter, a differential receiver, and a pair of differential signal lines between the differential transmitter and the differential receiver. The isolator device also comprises isolation circuitry along the pair of differential signal lines, wherein the isolation circuitry includes a transmitter-side capacitor for each differential signal line, a receiver-side capacitor for each differential signal line, and at least one common-mode voltage regulation component.

公开(公告)号：US09660652B2

公开(公告)日：2017-05-23

申请号：US14847264

申请日：2015-09-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Weicheng Zhang ,  Huanzhang Huang ,  Yanli Fan ,  Roland Sperlich

IPC: H03K17/16 ,  H03K19/0944

CPC classification number: H03K19/0944 ,  H03K19/018578

Abstract: A driver includes first and second resistors coupled to a supply voltage and coupled to pairs of main transistors at positive and negative output nodes. The first and second pairs of main transistors provide emphasis and de-emphasis on the positive and negative output nodes. The driver also includes a delay inverter, a pull up booster and a pull down booster. The delay inverter delays and inverts each of a pair of differential input signals to provide delayed and inverted differential signals. The pull up booster provides a bypass current path that bypasses the first and second resistors but includes at least some of the first and second pairs of main transistors. The pull down booster provides an additional current path from the supply voltage through the first or second resistor to ground.