公开(公告)号：US11101252B2

公开(公告)日：2021-08-24

申请号：US16548817

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Ting Lin ,  Chin-Fu Kao ,  Jing-Cheng Lin ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/48 ,  H01L23/52 ,  H01L25/10 ,  H01L25/00 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48

Abstract: A package-on-package structure including a first and second package is provided. The first package includes a semiconductor die, through insulator vias, an insulating encapsulant, conductive terminals and a redistribution layer. The semiconductor die has a die height H1. The plurality of through insulator vias is surrounding the semiconductor die and has a height H2, and H2

公开(公告)号：US20200006133A1

公开(公告)日：2020-01-02

申请号：US16103937

申请日：2018-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hui Cheng ,  Chin-Fu Kao ,  Chih-Yuan Chien ,  Szu-Wei Lu

IPC: H01L21/768 ,  H01L21/56 ,  H01L21/3213 ,  H01L21/02 ,  H01L23/00 ,  H01L23/31

Abstract: A package-on-package (PoP) structure includes a first package and a second package stacked on the first package. The first package includes a die, a plurality of conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The die includes an amorphous layer located on the rear surface. The conductive structures surround the die. The encapsulant encapsulates the die and the conductive structures. The redistribution structure is on the active surface of the die and is electrically connected to the conductive structures and the die.

公开(公告)号：US10510591B1

公开(公告)日：2019-12-17

申请号：US16103937

申请日：2018-08-15

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hui Cheng ,  Chin-Fu Kao ,  Chih-Yuan Chien ,  Szu-Wei Lu

IPC: H01L23/02 ,  H01L21/768 ,  H01L21/56 ,  H01L21/3213 ,  H01L23/00 ,  H01L23/31 ,  H01L21/02

Abstract: A package-on-package (PoP) structure includes a first package and a second package stacked on the first package. The first package includes a die, a plurality of conductive structures, an encapsulant, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The die includes an amorphous layer located on the rear surface. The conductive structures surround the die. The encapsulant encapsulates the die and the conductive structures. The redistribution structure is on the active surface of the die and is electrically connected to the conductive structures and the die.

公开(公告)号：US20190027446A1

公开(公告)日：2019-01-24

申请号：US15652247

申请日：2017-07-18

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Li-Hui Cheng ,  Jing-Cheng Lin ,  Po-Hao Tsai

IPC: H01L23/00 ,  H01L23/538 ,  H01L23/31 ,  H01L25/10 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A package structure including an integrated fan-out package and plurality of conductive terminals is provided. The integrated fan-out package includes an integrated circuit component, a plurality of conductive through vias, an insulating encapsulation having a first surface and a second surface opposite to the first surface, and a redistribution circuit structure. The insulating encapsulation laterally encapsulates the conductive through vias and the integrated circuit component. Each of conductive through vias includes a protruding portion accessibly revealed by the insulating encapsulation. The redistribution circuit structure is electrically connected to the integrated circuit component and covers the first surface of the insulating encapsulation and the integrated circuit component. The conductive terminals are disposed on and electrically connected to the protruding portions of the conductive through vias, and a plurality of intermetallic compound caps are formed between the conductive terminals and the protruding portions.

公开(公告)号：US10163848B2

公开(公告)日：2018-12-25

申请号：US15499901

申请日：2017-04-28

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jing-Cheng Lin ,  Li-Hui Cheng ,  Po-Hao Tsai ,  Chih-Chien Pan

IPC: H01L27/00 ,  H01L23/00 ,  H01L25/10 ,  H01L21/56 ,  H01L21/78 ,  H01L21/67

Abstract: A semiconductor package, a manufacturing method for the semiconductor package and a printing module used thereof are provided. The semiconductor package has a redistribution layer, at least one die over the redistribution layer, through interlayer vias on the redistribution layer and aside the die and a molding compound encapsulating the die and the through interlayer vias disposed on the redistribution layer. The semiconductor package has connectors connected to the through interlayer vias, a polymeric cover film covering the molding compound and the die and polymeric dam structures disposed aside the connectors. The polymeric cover film and the polymeric dam structures are formed by printing.

公开(公告)号：US20230378020A1

公开(公告)日：2023-11-23

申请号：US18446014

申请日：2023-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ping-Yin Hsieh ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/367 ,  H01L23/498 ,  H01L23/373 ,  H01L23/00 ,  H01L21/48 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L23/3675 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49833 ,  H01L23/49838 ,  H01L23/373 ,  H01L24/73 ,  H01L21/4882 ,  H01L25/50 ,  H01L24/16 ,  H01L24/32 ,  H01L25/105 ,  H01L2224/73204 ,  H01L2924/1431 ,  H01L2924/1434 ,  H01L2924/182 ,  H01L2924/35121 ,  H01L2924/3511 ,  H01L2224/16237 ,  H01L2224/32225

Abstract: A method includes placing a package, which includes a first package component, a second package component, and an encapsulant encapsulating the first package component and the second package component therein. The method further includes attaching a first thermal interface material over the first package component, attaching a second thermal interface material different from the first thermal interface material over the second package component, and attaching a heat sink over both of the first thermal interface material and the second thermal interface material.

公开(公告)号：US11527418B2

公开(公告)日：2022-12-13

申请号：US17026712

申请日：2020-09-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Jing-Cheng Lin ,  Li-Hui Cheng ,  Po-Hao Tsai

IPC: H01L21/56 ,  H01L21/78 ,  H01L23/31 ,  H01L21/683 ,  H01L23/00 ,  H01L21/48 ,  H01L23/498 ,  H01L23/538 ,  H01L25/065 ,  H01L21/66

Abstract: An integrated circuit package and a method of forming the same are provided. A method includes forming a conductive column over a carrier. An integrated circuit die is attached to the carrier, the integrated circuit die being disposed adjacent the conductive column. An encapsulant is formed around the conductive column and the integrated circuit die. The carrier is removed to expose a first surface of the conductive column and a second surface of the encapsulant. A polymer material is formed over the first surface and the second surface. The polymer material is cured to form an annular-shaped structure. An inner edge of the annular-shaped structure overlaps the first surface in a plan view. An outer edge of the annular-shaped structure overlaps the second surface in the plan view.

公开(公告)号：US20220384355A1

公开(公告)日：2022-12-01

申请号：US17818797

申请日：2022-08-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Hao Chen ,  Pu Wang ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L23/538 ,  H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065

Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.

公开(公告)号：US11302683B2

公开(公告)日：2022-04-12

申请号：US16836927

申请日：2020-04-01

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chih-Chien Pan ,  Chin-Fu Kao ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L25/16 ,  H01L23/00 ,  H01L21/56 ,  G02B6/13 ,  H01L23/24

Abstract: A package structure and method of forming the same are provided. The package structure includes a first die, a second die, a wall structure and an encapsulant. The second die is electrically bonded to the first die. The wall structure is laterally aside the second die and on the first die. The wall structure is in contact with the first die and a hole is defined within the wall structure for accommodating an optical element insertion. The encapsulant laterally encapsulates the second die and the wall structure.

公开(公告)号：US11296051B2

公开(公告)日：2022-04-05

申请号：US16547609

申请日：2019-08-22

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Chin-Fu Kao ,  Chih-Yuan Chien ,  Li-Hui Cheng ,  Szu-Wei Lu

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L23/00 ,  H01L21/56

Abstract: Semiconductor packages and methods of forming the same are provided. One of the semiconductor packages includes a first semiconductor die, an adhesive layer, a second semiconductor die and an underfill. The first semiconductor die includes a first surface, and the first surface includes a central region and a peripheral region surrounding the central region. The adhesive layer is adhered to the peripheral region and exposes the central region. The second semiconductor die is stacked over the first surface of the first semiconductor die. The underfill is disposed between the first semiconductor die and the second semiconductor die.