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11.发明授权公开(公告)号：US07020444B2
公开(公告)日：2006-03-28
申请号：US10372922
申请日：2003-02-26
IPC分类号： H04B1/40
CPC分类号： H03L7/10 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1265 , H03B2201/025 , H03D3/008 , H03J1/005 , H03J2200/10 , H03L7/0891 , H03L7/099 , H03L7/193
摘要： A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit for the transmission PLL circuit is configured to be operable in a plurality of bands. The communication semiconductor integrated circuit also comprises a circuit for measuring the oscillating frequency of the oscillator circuit for the transmission PLL circuit, and a storage circuit for storing the result of measurement made by the measuring circuit. A band to be used by the oscillator circuit for the transmission PLL circuit is determined based on values for setting the oscillating frequencies of the oscillator circuit forming part of the reception PLL circuit and the intermediate frequency oscillator circuit, and the result of measurement stored in the storage circuit.
摘要翻译： 通信半导体集成电路具有形成在单个半导体芯片上的传输PLL电路的一部分的振荡器电路以及形成接收PLL电路的一部分的振荡器电路和用于中频的振荡器电路。 用于传输PLL电路的振荡器电路被配置为可在多个频带中操作。 通信半导体集成电路还包括用于测量用于传输PLL电路的振荡器电路的振荡频率的电路和用于存储由测量电路进行的测量结果的存储电路。 用于传输PLL电路的振荡电路使用的频带基于用于设置构成接收PLL电路和中频振荡器电路的一部分的振荡电路的振荡频率的值和存储在传输PLL电路中的测量结果的值来确定 存储电路。
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公开(公告)号：US06917213B2
公开(公告)日：2005-07-12
申请号：US10615787
申请日：2003-07-10
申请人： Hirotaka Oosawa , Masumi Kasahara , Kazuo Watanabe
发明人： Hirotaka Oosawa , Masumi Kasahara , Kazuo Watanabe
IPC分类号： G01R31/316 , G01R31/28 , G01R31/3167 , G01R31/317 , H01L21/822 , H01L21/8249 , H01L27/04 , H01L27/06 , G01R31/02
CPC分类号： G01R31/3172 , G01R31/3167
摘要： An input/output pin for test corresponding to a test circuit of the digital section is used in common as the input/output pin for normal operation of the analog section. The selection switches are respectively provided between the relevant analog pin and analog circuit and on a signal line up to the test circuit of the digital section from the relevant analog pin and the switches are provided at both end portions of the signal line between the test circuit of digital section and the input/output pin for common use in order to fix the voltage of the signal line to the predetermined voltage such as the ground voltage during the normal operation. Thereby, it is possible in a semiconductor integrated circuit having the analog and digital sections to eliminate adverse effect, even if the input/output pin for testing corresponding to the test circuit of the digital section is used in common as the input/output pin for normal operation of the analog section, from the analog circuit due to the noise which is generated in the digital section and is then transferred to the analog circuit through the signal path up to the analog input/output pin connected to the test circuit from this test circuit of the digital section.
摘要翻译： 用于与数字部分的测试电路相对应的用于测试的输入/输出引脚用作模拟部分的正常操作的输入/输出引脚。 选择开关分别设置在相关的模拟引脚和模拟电路之间以及在相关模拟引脚上的数字部分的测试电路的信号线上，并且开关设在测试电路之间的信号线的两端 的数字部分和用于常用的输入/输出引脚，以便在正常操作期间将信号线的电压固定为诸如接地电压的预定电压。 因此，具有模拟部分和数字部分的半导体集成电路可以消除不利影响，即使与数字部分的测试电路相对应的用于测试的输入/输出引脚被公共地用作输入/输出引脚 模拟部分的正常工作，由模拟电路由于数字部分产生的噪声而被传送到模拟电路，然后通过信号路径传送到连接到测试电路的模拟输入/输出引脚从该测试 电路的数字部分。
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13.发明授权公开(公告)号：US06900700B2
公开(公告)日：2005-05-31
申请号：US10373046
申请日：2003-02-26
IPC分类号： H03L7/08 , H03D3/00 , H03J1/00 , H03J7/06 , H03L7/089 , H03L7/10 , H03L7/18 , H03L7/187 , H03L7/193 , H04B1/40 , H04B1/26
摘要： A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.
摘要翻译： 通信半导体集成电路具有形成在单个半导体芯片上的传输PLL电路的一部分的振荡器电路以及形成接收PLL电路的一部分的振荡器电路和用于中频的振荡器电路。 形成传输PLL电路的一部分的振荡器电路被配置为可在多个频带中操作。 用于测量形成传输PLL电路的一部分的振荡电路的振荡频率的电路也用于测量形成接收PLL电路的一部分的振荡器电路的振荡频率或用于测量中间件的振荡器电路的振荡频率 频率。
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14.发明授权公开(公告)号：US07313369B2
公开(公告)日：2007-12-25
申请号：US11122062
申请日：2005-05-05
IPC分类号： H04B1/40
摘要： A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit forming part of the transmission PLL circuit is configured to be operable in a plurality of bands. A circuit for measuring the oscillating frequency of the oscillator circuit forming part of the transmission PLL circuit is also used for measuring the oscillating frequency of the oscillator circuit forming part of the reception PLL circuit or for measuring the oscillating frequency of the oscillator circuit for the intermediate frequency.
摘要翻译： 通信半导体集成电路具有形成在单个半导体芯片上的传输PLL电路的一部分的振荡器电路以及形成接收PLL电路的一部分的振荡器电路和用于中频的振荡器电路。 形成传输PLL电路的一部分的振荡器电路被配置为可在多个频带中操作。 用于测量形成传输PLL电路的一部分的振荡电路的振荡频率的电路也用于测量形成接收PLL电路的一部分的振荡器电路的振荡频率或用于测量中间件的振荡器电路的振荡频率 频率。
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公开(公告)号：US06597191B2
公开(公告)日：2003-07-22
申请号：US10036460
申请日：2002-01-07
申请人： Hirotaka Oosawa , Masumi Kasahara , Kazuo Watanabe
发明人： Hirotaka Oosawa , Masumi Kasahara , Kazuo Watanabe
IPC分类号： G01R3102
CPC分类号： G01R31/3172 , G01R31/3167
摘要： An input/output pin for test corresponding to a test circuit of the digital section is used in common as the input/output pin for usual operation of the analog section, the selection switches are respectively provided between the relevant analog pin and analog circuit and on a signal line up to the test circuit of the digital section from the relevant analog pin and the switches are provided at both end portions of the signal line between the test circuit of digital section and the input/output pin for common use in order to fix the voltage of the signal line to the predetermined voltage such as the ground voltage during the usual operation.
摘要翻译： 与数字部分的测试电路相对应的用于测试的输入/输出引脚用作模拟部分的通常操作的输入/输出引脚，选择开关分别设置在相关的模拟引脚和模拟电路之间，并在 在数字部分的测试电路和用于常用的输入/输出引脚之间的信号线的两端提供直到来自相关模拟引脚的数字部分的测试电路的信号线和开关，以便固定 在正常操作期间信号线的电压等于预定电压，例如接地电压。
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16.发明申请公开(公告)号：US20050068111A1
公开(公告)日：2005-03-31
申请号：US10495611
申请日：2002-11-13
申请人： Masumi Kasahara , Hirotaka Osawa , Robert Henshaw
发明人： Masumi Kasahara , Hirotaka Osawa , Robert Henshaw
摘要： In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.
摘要翻译： 在通信半导体集成电路器件中，PLL电路的振荡器（VCO10）可以在多个频带中工作。 在振荡器的控制电压（Vc）固定为预定值（VDC）的情况下，对要存储在存储器（18）中的每个频带测量振荡器的振荡频率。 当PLL操作时，将指定频带的设定值与存储在存储器中的测量频率值进行比较。 作为比较的结果，确定振荡器实际使用的频带。
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17.发明申请公开(公告)号：US20070052488A1
公开(公告)日：2007-03-08
申请号：US11592982
申请日：2006-11-06
申请人： Masumi Kasahara , Hirotaka Osawa , Robert Henshaw
发明人： Masumi Kasahara , Hirotaka Osawa , Robert Henshaw
IPC分类号： H03L7/00
摘要： In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.
摘要翻译： 在通信半导体集成电路器件中，PLL电路的振荡器（VCO10）可以在多个频带中工作。 在振荡器的控制电压（Vc）固定为预定值（VDC）的情况下，对要存储在存储器（18）中的每个频带测量振荡器的振荡频率。 当PLL操作时，将指定频带的设定值与存储在存储器中的测量频率值进行比较。 作为比较的结果，确定振荡器实际使用的频带。
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18.发明申请公开(公告)号：US20060121858A1
公开(公告)日：2006-06-08
申请号：US11207003
申请日：2005-08-19
申请人： Satoshi Tanaka , Kazuyuki Hori , Manabu Kawabe , Yukinori Akamine , Masumi Kasahara , Kazuo Watanabe
发明人： Satoshi Tanaka , Kazuyuki Hori , Manabu Kawabe , Yukinori Akamine , Masumi Kasahara , Kazuo Watanabe
CPC分类号： H04B1/406 , H04B1/0003
摘要： A ΣΔ transmitter that permits setting of a loop filter LF, a charge pump current and other factors to the same conditions even if it is operated in a plurality of frequency bands, therefore allows the number of components to be reduced and at the same time enables the angle between the phases of local signals for reception use to be close to exactly 90°, which is a feature ensuring robustness against inter-element variations and accordingly suitable for large scale integration, is to be provided. The oscillation frequency of a VCO is set to an even-number multiple of the transmit frequency, and generates transmit signals via a divider. A device that varies the gain according to the amplitude component of modulating signals is added to an amplifier whose input is signals from the VCO, and the transmission of modulating signals involving amplitude modulation, such as EDGE, is thereby made possible.
摘要翻译： 即使在多个频带中工作的情况下，也可以将环路滤波器LF，电荷泵电流和其他因素设定为相同条件的SigmaDelta发送器，因此允许部件数量减少，同时使能 要提供用于接收的本地信号的相位之间的角度接近正好90°，这是确保对元件间变化的鲁棒性并因此适合于大规模集成的特征。 将VCO的振荡频率设定为发送频率的偶数倍，经由分频器生成发送信号。 根据调制信号的幅度分量来改变增益的装置被添加到其输入是来自VCO的信号的放大器，并且由此使得涉及幅度调制（例如EDGE）的调制信号的传输成为可能。
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公开(公告)号：US07366489B2
公开(公告)日：2008-04-29
申请号：US10742813
申请日：2003-12-23
申请人： Satoshi Tanaka , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
发明人： Satoshi Tanaka , Kazuo Watanabe , Masao Hotta , Toyohiko Hongo , Taizo Yamawaki , Masumi Kasahara , Kumiko Takikawa
CPC分类号： H04B1/30 , H03D2200/0047 , H03K21/16
摘要： A transceiver suitable for larger scale of integration employs direct conversion reception for reducing the number of filters. Also, the number of VCOs is reduced by utilizing dividers to supply a receiver and a transmitter with locally oscillated signals at an RF band. Dividers each having a fixed division ratio are used for generating locally oscillated signals for the receiver, while a divider having a switchable division ratio are used for generating the locally oscillated signal for the transmitter. In addition, a variable gain amplifier for baseband signal is provided with a DC offset voltage detector and a DC offset canceling circuit for supporting high speed data communications to accomplish fast cancellation of a DC offset by eliminating intervention of a filter within a feedback loop for offset cancellation.
摘要翻译： 适合较大规模集成的收发器采用直接转换接收，以减少滤波器的数量。 此外，通过利用分频器来为RF频带提供具有本地振荡信号的接收机和发射机来减少VCO的数量。 每个具有固定分频比的分频器用于产生用于接收机的局部振荡信号，而具有可切换分频比的分频器用于产生用于发射机的本地振荡信号。 另外，用于基带信号的可变增益放大器设置有DC偏移电压检测器和DC偏移消除电路，用于支持高速数据通信以通过消除用于偏移的反馈回路内的滤波器的干涉来实现DC偏移的快速消除 消除。
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公开(公告)号：US07224948B1
公开(公告)日：2007-05-29
申请号：US10148960
申请日：2000-01-11
申请人： Taizo Yamawaki , Satoshi Tanaka , Masaru Kokubo , Kazuo Watanabe , Masumi Kasahara , Kazuaki Hori , Julian Hildersley
发明人： Taizo Yamawaki , Satoshi Tanaka , Masaru Kokubo , Kazuo Watanabe , Masumi Kasahara , Kazuaki Hori , Julian Hildersley
CPC分类号： H03C3/0983 , H03C3/0925 , H03C3/0966 , H03D7/163 , H03J2200/17 , H03L7/23 , H04B1/0475 , H04B2001/0491 , H04L25/03343
摘要： There are provided a transmitter and a wireless communication terminal apparatus using the same for solving a problem of undesired spurs due to harmonics of an output signal of a frequency synthesizer, and further solving a problem of the undesired spurs occurring when the harmonics of an output signal of a crystal oscillator are mixed into a VCO to facilitate to design a circuit or a mounting substrate. The transmitter has a relationship between an output frequency of a PLL frequency conversion circuit (5) and output frequencies of frequency synthesizers (1, 2) stored therein, and the output frequencies of the frequency synthesizers (1, 2) input into the PLL frequency conversion circuit (5) are controlled on the basis of the relationship so that the undesired spurs are suppressed. Thereby, even when the undesired spurs occur in the output of the transmitter due to a crosstalk between circuits or through a substrate, which can be easily suppressed, it is therefore possible to reduce time and cost for redesigning the circuit or the substrate.
摘要翻译： 提供了一种使用该发送器和无线通信终端装置的方法，用于解决由于频率合成器的输出信号的谐波引起的不期望的杂散问题，并且进一步解决了当输出信号的谐波发生时出现的不需要的杂散的问题 的晶体振荡器混合到VCO中以便于设计电路或安装衬底。 发射机具有PLL频率转换电路（5）的输出频率和存储在其中的频率合成器（1,2）的输出频率与输入到PLL频率的频率合成器（1,2）的输出频率之间的关系 基于该关系来控制转换电路（5），从而抑制不需要的杂散。 因此，即使由于电路之间的串扰或通过可以容易地抑制的基板而在发射机的输出端发生不想要的杂散，因此可以减少重新设计电路或基板的时间和成本。
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