公开(公告)号：US10056356B1

公开(公告)日：2018-08-21

申请号：US15585166

申请日：2017-05-03

Applicant: Unimicron Technology Corp.

Inventor： Wen-Fang Liu ,  Shao-Chien Lee ,  Chen-Wei Tseng ,  Zong-Hua Li

IPC: H01L25/075 ,  H01L23/498

CPC classification number: H01L25/0753 ,  H01L23/49811 ,  H01L33/62

Abstract: A chip package circuit board module includes a circuit board and an original chip. The circuit board includes a first pad and a second pad disposed besides the first pad and separated from the first pad. The original chip is connected to the first pad and the second pad. A width of the original chip is W1, a total width of the first pad is P1, and a total width of the second pad is P2. The total width P1 of the first pad is larger than twice of the width W1 of the original chip, and the total width P2 of the second pad is larger than twice of the width W1 of the original chip.

公开(公告)号：US20180153036A1

公开(公告)日：2018-05-31

申请号：US15427061

申请日：2017-02-08

Applicant: Unimicron Technology Corp.

Inventor： Ming-Hao Wu ,  Wen-Fang Liu

IPC: H05K1/11 ,  H05K3/00

CPC classification number: H05K1/111 ,  H05K1/115 ,  H05K3/0044 ,  H05K3/3452 ,  H05K3/4697 ,  H05K2201/0376 ,  H05K2203/0228 ,  H05K2203/025

Abstract: A circuit board structure includes an inner circuit structure and a first build-up circuit structure. The inner circuit structure includes a core layer having an upper surface and a lower surface opposite to each other, a first patterned circuit layer disposed on the upper surface, a second patterned circuit layer disposed on the lower surface and a conductive via connecting the first and the second patterned circuit layers. The first build-up circuit structure is disposed on the upper surface of the core layer and covers the first patterned circuit layer, wherein the first build-up circuit structure at least has a cavity, the cavity exposes a portion of the first patterned circuit layer and a cross-sectional profile of an edge of a top surface of the portion of the first patterned circuit layer exposed by the cavity is a curved surface.

公开(公告)号：US20140099432A1

公开(公告)日：2014-04-10

申请号：US13727600

申请日：2012-12-27

Applicant: UNIMICRON TECHNOLOGY CORP.

Inventor： Tzyy-Jang Tseng ,  Chang-Ming Lee ,  Wen-Fang Liu ,  Cheng-Po Yu

IPC: H05K3/00

CPC classification number: H05K3/007 ,  H05K3/0097 ,  H05K3/381 ,  H05K2201/0154

Abstract: A fabrication method for a flexible circuit board is provided. The fabrication method includes the following steps. Firstly, a release film having an upper surface and a lower surface opposite to each other is provided. Next, two flexible substrates are respectively disposed on the upper surface and the lower surface. Next, a plurality of nano-scale micro-pores are formed on each flexible substrate to form two non-smooth flexible substrates. The nano-scale micro-pores evenly distributed over an outer surface of each non-smooth flexible substrate. Each non-smooth flexible substrate being adapted to be performed a plating process directly on the outer surface thereof.

Abstract translation: 提供了一种柔性电路板的制造方法。 制造方法包括以下步骤。 首先，提供具有彼此相对的上表面和下表面的剥离膜。 接下来，在上表面和下表面上分别设置两个柔性基板。 接下来，在每个柔性基板上形成多个纳米级微孔，以形成两个非平滑柔性基板。 纳米级微孔均匀分布在每个非光滑柔性基底的外表面上。 每个非光滑柔性基底适于在其外表面上直接进行电镀工艺。