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    System and method for preventing performance degradation in communication circuitry
    11.
    发明申请
    System and method for preventing performance degradation in communication circuitry 审中-公开
    防止通信电路性能下降的系统和方法

    公开(公告)号：US20070060066A1

    公开(公告)日：2007-03-15

    申请号：US11226837

    申请日：2005-09-14

    Applicant: Vishnu Srinivasan

    Inventor： Vishnu Srinivasan

    IPC: H04Q7/32

    CPC classification number: H04B1/525 ,  H04B1/406

    Abstract: A system comprising first interface circuitry that includes a first input pad of first receiver circuitry, and control circuitry configured to operate the first interface circuitry in a first mode to prevent the first receiver circuitry from receiving a first signal using the first input pad and a second mode to allow the first receiver circuitry to receive a second signal using the first input pad is provided.

    Abstract translation: 一种包括第一接口电路的系统，包括第一接收器电路的第一输入焊盘，以及配置成以第一模式操作第一接口电路的控制电路，以防止第一接收器电路使用第一输入焊盘接收第一信号， 提供允许第一接收机电路使用第一输入焊盘接收第二信号的模式。

    Non-Linear Capacitance Compensation
    14.
    发明申请
    Non-Linear Capacitance Compensation 有权
    非线性电容补偿

    公开(公告)号：US20130154744A1

    公开(公告)日：2013-06-20

    申请号：US13690138

    申请日：2012-11-30

    Applicant: Anil Samavedam ,  David E. Bockelman ,  Vishnu Srinivasan ,  Eric Kimball

    Inventor： Anil Samavedam ,  David E. Bockelman ,  Vishnu Srinivasan ,  Eric Kimball

    IPC: H03G3/00

    CPC classification number: H03G3/00 ,  H03F1/086 ,  H03F1/14 ,  H03F3/19 ,  H03F3/245 ,  H03F3/3022 ,  H03F2200/451 ,  H03F2203/30144

    Abstract: Embodiments are directed to capacitance compensation via a compensation device coupled to a gain device to compensate for a capacitance change occurring due to an input signal change, along with a controller coupled to the compensation device to receive the input signal and to control an amount of compensation based on the input signal. In some embodiments, banks may be formed of multiple compensation devices, where each of the banks has a different size and is coupled to receive a different set of bias voltages.

    Abstract translation: 实施例涉及通过耦合到增益器件的补偿器件的电容补偿，以补偿由于输入信号变化而发生的电容变化，连同耦合到补偿器件的控制器接收输入信号并控制补偿量 基于输入信号。 在一些实施例中，存储体可以由多个补偿装置形成，其中每个存储体具有不同的尺寸并被耦合以接收不同的一组偏置电压。

    Non-linear capacitance compensation
    15.
    发明授权
    Non-linear capacitance compensation 有权
    非线性电容补偿

    公开(公告)号：US08344808B2

    公开(公告)日：2013-01-01

    申请号：US12889890

    申请日：2010-09-24

    Applicant: Anil Samavedam ,  David E. Bockelman ,  Vishnu Srinivasan ,  Eric Kimball

    Inventor： Anil Samavedam ,  David E. Bockelman ,  Vishnu Srinivasan ,  Eric Kimball

    IPC: H03F1/14

    CPC classification number: H03G3/00 ,  H03F1/086 ,  H03F1/14 ,  H03F3/19 ,  H03F3/245 ,  H03F3/3022 ,  H03F2200/451 ,  H03F2203/30144

    Abstract: Embodiments are directed to capacitance compensation via a compensation device coupled to a gain device to compensate for a capacitance change occurring due to an input signal change, along with a controller coupled to the compensation device to receive the input signal and to control an amount of compensation based on the input signal. In some embodiments, banks may be formed of multiple compensation devices, where each of the banks has a different size and is coupled to receive a different set of bias voltages.

    Abstract translation: 实施例涉及通过耦合到增益器件的补偿器件的电容补偿，以补偿由于输入信号变化而发生的电容变化，连同耦合到补偿器件的控制器接收输入信号并控制补偿量 基于输入信号。 在一些实施例中，存储体可以由多个补偿装置形成，其中每个存储体具有不同的尺寸并被耦合以接收不同的一组偏置电压。

    OUTPUT GAIN STAGE FOR A POWER AMPLIFIER
    17.
    发明申请
    OUTPUT GAIN STAGE FOR A POWER AMPLIFIER 有权
    输出功率放大器的增益级别

    公开(公告)号：US20100164621A1

    公开(公告)日：2010-07-01

    申请号：US12317819

    申请日：2008-12-30

    Applicant: Vishnu Srinivasan ,  David E. Bockelman

    Inventor： Vishnu Srinivasan ,  David E. Bockelman

    IPC: H03F3/45

    CPC classification number: H03F3/45183 ,  H03F3/211 ,  H03F2200/537

    Abstract: In one embodiment, the present invention includes multiple gain stages to receive and amplify a differential input signal at different common mode voltages. The stages each may include a pair of linear NMOS gain transistors coupled to a primary coil of a given output transformer. One of the stages may include commonly coupled terminals coupled to a center tap of the primary coil of an output transformer of another stage, and a supply current provided to one of the stages is re-used for the other stage(s).

    Abstract translation: 在一个实施例中，本发明包括多个增益级，以在不同的共模电压下接收和放大差分输入信号。 这些级可以包括耦合到给定输出变压器的初级线圈的一对线性NMOS增益晶体管。 一个级可以包括耦合到另一级的输出变压器的初级线圈的中心抽头的共同耦合的端子，并且提供给一个级的电源电流被重新用于其它级。

    Generating a bias voltage
    20.
    发明申请
    Generating a bias voltage 有权
    产生偏置电压

    公开(公告)号：US20060091873A1

    公开(公告)日：2006-05-04

    申请号：US10977222

    申请日：2004-10-29

    Applicant: Vishnu Srinivasan

    Inventor： Vishnu Srinivasan

    IPC: G05F3/16

    CPC classification number: G05F3/242

    Abstract: An apparatus includes a first voltage reference circuit, a second voltage reference circuit and a third circuit that is coupled to the second voltage reference circuit. The first voltage reference circuit provides a first reference voltage between a terminal of the first voltage reference circuit and a first power line. The second voltage reference circuit provides a second reference voltage between a terminal of the second voltage reference circuit and a second power line that is separate from the first power line. The third circuit is coupled to the second voltage reference circuit to establish a magnitude of the second reference voltage in response to a potential difference between the terminal of the first voltage reference circuit and the second power line.

    Abstract translation: 一种装置包括第一电压参考电路，第二参考电路和耦合到第二电压参考电路的第三电路。 第一参考电路在第一参考电路的端子和第一电源线之间提供第一参考电压。 第二参考电路在第二参考电路的端子和与第一电源线分离的第二电源线之间提供第二参考电压。 第三电路耦合到第二电压参考电路，以响应于第一参考电路的端子和第二电源线之间的电位差建立第二参考电压的幅度。

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