公开(公告)号：US20080024408A1

公开(公告)日：2008-01-31

申请号：US11459656

申请日：2006-07-25

Applicant: Keiichi Sano ,  Wei-Cheng Lin ,  Chi-Fu Wu

Inventor： Keiichi Sano ,  Wei-Cheng Lin ,  Chi-Fu Wu

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G09G3/3607 ,  G09G3/3614 ,  G09G2300/0426 ,  G09G2320/0209

Abstract: Systems for displaying images. The system comprises a display panel comprising a plurality of data lines DL(x), a plurality of gate lines SL(y) perpendicular to the data lines DL(x), and a pixel array coupled to the data lines and the gate lines. The pixel array comprises a first pixel P(x+1, y) coupled to the gate line SL(y+1) and the data line DL(x+1), a second pixel P(x+1, y+1) coupled to the gate line SL(y+1) and the data line DL(x+2), a third pixel P(x, y+1) coupled to the gate line SL(y+2) and the data line DL(x+1), and a fourth pixel P(x, y+2) coupled to the gate line SL(y+2) and the data line DL(x).

Abstract translation: 用于显示图像的系统 该系统包括包括多条数据线DL（x），垂直于数据线DL（x）的多条栅极线SL（y））和耦合到数据线和栅极线的像素阵列的显示面板。 像素阵列包括耦合到栅极线SL（y + 1）和数据线DL（x + 1）的第一像素P（x + 1，y），第二像素P（x + 1，y + 1） 耦合到栅极线SL（y + 1）和数据线DL（x + 2）的第三像素P（x，y + 1）耦合到栅极线SL（y + 2）和数据线DL x + 1）和耦合到栅极线SL（y + 2）和数据线DL（x）的第四像素P（x，y + 2）。

公开(公告)号：US20070098323A1

公开(公告)日：2007-05-03

申请号：US11402150

申请日：2006-04-11

Applicant: Bo Pi ,  Wei-Cheng Lin ,  Zhihao Chen

Inventor： Bo Pi ,  Wei-Cheng Lin ,  Zhihao Chen

IPC: G02B6/26 ,  G02B6/00 ,  G02B6/34 ,  G02B6/42

CPC classification number: G02B6/02057 ,  G01D5/35374 ,  G01K11/3206 ,  G01L9/0076 ,  G01L11/025 ,  G01M3/047 ,  G01N21/774 ,  G01N2021/7736 ,  G01N2021/7773 ,  G02B6/02

Abstract: Fiber sensors formed on side-polished fiber coupling ports based on evanescent coupling are described. Such sensors may be configured to measure various materials and may be used to form multi-phase sensing devices. A Bragg grating may be implemented in such sensors to form reflective fiber sensors.

Abstract translation: 描述了基于ev逝耦合的侧面抛光光纤耦合端口上形成的光纤传感器。 这样的传感器可以被配置为测量各种材料并且可以用于形成多相感测装置。 可以在这样的传感器中实现布拉格光栅以形成反射光纤传感器。

公开(公告)号：US07209297B2

公开(公告)日：2007-04-24

申请号：US11217323

申请日：2005-09-02

Applicant: Chao-Chang Chen ,  Kuo-Cheng Huang ,  Wei-Cheng Lin

Inventor： Chao-Chang Chen ,  Kuo-Cheng Huang ,  Wei-Cheng Lin

IPC: G02B15/14

CPC classification number: G02B15/02 ,  G02B26/0875

Abstract: A soft zoom lens system includes an axially expandable or shrinkable holding portion, a supporting portion, a first lens and a second lens. This holding portion has an inner space, a first end and a second end. The supporting portion is made by a soft material. The first lens is disposed between the first end and the supporting portion. The second lens is disposed between the second end and the supporting portion. When this holding portion is applied by predetermined electricity, it will expand or to shrink axially. So, the curvatures of the first lens and the second lens will be changed. The zooming is performed. The invention's structure is simple. The adjusting of focal length is easy. The production is easy with low cost.

公开(公告)号：US20070086558A1

公开(公告)日：2007-04-19

申请号：US11302853

申请日：2005-12-13

Applicant: Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

Inventor： Chun-Ching Wei ,  Yang-En Wu ,  Wei-Cheng Lin

IPC: G11C19/00

CPC classification number: G11C19/28

Abstract: A shift register in an amorphous-silicon gate driver comprises a pull-up transistor and two pull-down modules. The pull-up transistor produces a positive pulse when the clock signal is high and the gate of the pull-up transistor is also high. The gate of the pull-up transistor is pulled down to a negative voltage level Vss by two pull-down transistors in the pull-down modules. Each pull-down module also has a further pull-down transistor to keep the output terminal at Vss after the output pulse is produced. The two pull-down modules are operated in a cooperative manner so that each pull-down transistor is conducting approximately 50% of the time. The gates of the pull-down transistors are kept at a positive voltage level approximately 50% of the time and at Vss′ approximately 50% of the time with Vss′ being more negative than Vss.

公开(公告)号：US08835882B2

公开(公告)日：2014-09-16

申请号：US13608941

申请日：2012-09-10

Applicant: Wei-Cheng Lin ,  Zhimin Wan

Inventor： Wei-Cheng Lin ,  Zhimin Wan

IPC: G21K5/04 ,  H01J37/304 ,  H01J37/244 ,  H01J37/317

CPC classification number: H01J37/3171 ,  H01J37/244 ,  H01J37/304 ,  H01J2237/24507 ,  H01J2237/24528 ,  H01J2237/30472

Abstract: The invention provides a method to real time monitor the ion beam. Initially, turn on an ion implanter which has a wafer holder, a Faraday cup and a measurement device positioned close to a special portion of a pre-determined ion beam path of the ion beam, wherein the Faraday cup is positioned downstream the wafer holder and the measurement device is positioned upstream the wafer holder. Then, measure a first ion beam current received by the Faraday cup and a second ion beam current received by the measurement device. By continuously measuring the first and second ion beam current, the ion beam is real-time monitored even the Faraday cup is at least partially blocked during the period of moving the wafer holder across the ion beam. Accordingly, the on-going implantation process and the operation of the implanter can be adjusted.

Abstract translation: 本发明提供了一种实时监测离子束的方法。 最初，打开一个离子注入机，该离子注入机具有晶片保持器，法拉第杯和靠近离子束预定离子束路径的特殊部分的测量装置，其中法拉第杯位于晶片保持器的下游， 测量装置位于晶片保持器的上游。 然后，测量由法拉第杯接收的第一离子束电流和由测量装置接收的第二离子束电流。 通过连续地测量第一和第二离子束电流，即使在移动晶片夹持器穿过离子束的时段期间，即使法拉第杯至少部分被阻挡，离子束也被实时监测。 因此，可以调整正在进行的植入过程和注入机的操作。

公开(公告)号：US08494206B2

公开(公告)日：2013-07-23

申请号：US12913784

申请日：2010-10-28

Applicant: Wei-Cheng Lin

Inventor： Wei-Cheng Lin

IPC: H04R25/00

CPC classification number: H04R1/10 ,  H04R2460/13

Abstract: An electronic device includes a host and an earphone. The host includes a application module, the earphone includes at least one speaker, and at least one vibrator. The host generates a first vibration signal according to an original audio signal from the application module, and sends the original audio signal and the first vibration signal to the earphone. The earphone generates a second vibration signal according to the original audio signal, sends the first vibration signal and the second vibration signal to the at least one vibrator, and sends the original audio signal to the at least one earphone speaker. The electronic device may also generate audio signals according to an original vibration signal from the application module.

Abstract translation: 电子设备包括主机和耳机。 主机包括应用模块，耳机包括至少一个扬声器和至少一个振动器。 主机根据来自应用模块的原始音频信号产生第一振动信号，并将原始音频信号和第一振动信号发送到耳机。 耳机根据原始音频信号产生第二振动信号，将第一振动信号和第二振动信号发送到至少一个振动器，并将原始音频信号发送到至少一个耳机扬声器。 电子设备还可以根据来自应用模块的原始振动信号产生音频信号。

公开(公告)号：US08125462B2

公开(公告)日：2012-02-28

申请号：US12207264

申请日：2008-09-09

Applicant: Wei-Cheng Lin ,  Kai-Chieh Yang ,  Fu-Yuan Hsueh ,  Ting-Kuo Chang

Inventor： Wei-Cheng Lin ,  Kai-Chieh Yang ,  Fu-Yuan Hsueh ,  Ting-Kuo Chang

IPC: G06F3/041

CPC classification number: G06F3/044

Abstract: The present invention relates to a projecting capacitive touch sensing device, display panel, and image display system. The projecting capacitive touch sensing comprises an array of a plurality of sensing units, each sensing unit including: a first electrode made of a sensing material, at least one second electrode made of a sensing material and being disposed around the peripheral of the first electrode, at least one first sensing axis electrically connected to the first electrode, and at least one second sensing axis electrically connected to the second electrodes. The first electrode is quadrangle, while the second electrodes are triangular-shaped. The first electrode and the plurality of second electrodes are arranged to form a rectangular, and a non-sensing area is defined between the first electrode and the second electrodes.

Abstract translation: 本发明涉及投影电容式触摸感测装置，显示面板和图像显示系统。 投影电容触摸感测包括多个感测单元的阵列，每个感测单元包括：由感测材料制成的第一电极，由感测材料制成并且围绕第一电极的周边设置的至少一个第二电极， 电连接到第一电极的至少一个第一感测轴和电连接到第二电极的至少一个第二感测轴。 第一电极是四边形，而第二电极是三角形的。 第一电极和多个第二电极被布置成形成矩形，并且在第一电极和第二电极之间限定非感测区域。

公开(公告)号：US20110313583A1

公开(公告)日：2011-12-22

申请号：US12820260

申请日：2010-06-22

Applicant: Wei-Cheng Lin

Inventor： Wei-Cheng Lin

IPC: G06F1/28

CPC classification number: H02H3/207 ,  H02H3/0935 ,  H02H3/247

Abstract: An integrated power control device and method are provided. In one embodiment, a device includes a body, a plurality of sockets for connection with a load, and a plurality of switch-controls each connected with corresponding one of the sockets and controlling power connecting to the load. The device further includes a microprocessor for the input, output, calculation and control of data and information flow, wherein the microprocessor issues commands to the switch-controls to execute switch on or off on the sockets, a timer, and a data storage unit for data storage so as to provide the microprocessor to access the data. A voltage-and-current detector detects voltage and current values and stores them into the data storage through the microprocessor. A voltage-current alerting unit receives the voltage values and current values and informs the microprocessor when the values exceed predetermined thresholds. Finally, a power computational unit calculates power consumption of the load.

Abstract translation: 提供了一种集成的功率控制装置和方法。 在一个实施例中，设备包括主体，用于与负载连接的多个插座，以及多个开关控制，每个开关控制与相应的一个插座连接并控制连接到负载的电力。 该装置还包括用于数据和信息流的输入，输出，计算和控制的微处理器，其中微处理器向开关控制器发出命令以在插座上执行开或关，定时器和数据存储单元，用于 数据存储，以便提供微处理器访问数据。 电压和电流检测器检测电压和电流值，并通过微处理器将其存储到数据存储器中。 电压电流警报单元接收电压值和电流值，并在值超过预定阈值时通知微处理器。 最后，功率计算单元计算负载的功耗。

公开(公告)号：US07915955B2

公开(公告)日：2011-03-29

申请号：US12508126

申请日：2009-07-23

Applicant: Wei-Cheng Lin

Inventor： Wei-Cheng Lin

IPC: H03G3/12

CPC classification number: H03F3/45475 ,  H03F3/187 ,  H03F3/45991 ,  H03F2200/03 ,  H03F2200/375 ,  H03F2200/78 ,  H03F2203/45138 ,  H03F2203/45528 ,  H03F2203/45534 ,  H03F2203/45624

Abstract: The invention discloses a bias balancing circuit. The bias balancing circuit is used for balancing an output voltage outputted by an amplifier module. The amplifier module has a variable gain. The bias balancing circuit comprises a comparator and a voltage selector. The comparator is used for comparing the output voltage and a reference voltage, to generate a comparison signal. The voltage selector is used for generating a selected voltage according to the comparison signal. When the variable gain is changed to result in an offset from the output voltage to the reference voltage, the bias balancing circuit is capable of balancing the output voltage toward the reference voltage by the selected voltage.

Abstract translation: 本发明公开了一种偏置平衡电路。 偏置平衡电路用于平衡放大器模块输出的输出电压。 放大器模块具有可变增益。 偏置平衡电路包括比较器和电压选择器。 比较器用于比较输出电压和参考电压，以产生比较信号。 电压选择器用于根据比较信号产生所选择的电压。 当可变增益改变以导致从输出电压到参考电压的偏移时，偏置平衡电路能够通过所选择的电压平衡朝向参考电压的输出电压。

公开(公告)号：US20110063281A1

公开(公告)日：2011-03-17

申请号：US12603579

申请日：2009-10-21

Applicant: Chao-Ching Hsu ,  Wei-Cheng Lin ,  Yu-Chun Tsai

Inventor： Chao-Ching Hsu ,  Wei-Cheng Lin ,  Yu-Chun Tsai

IPC: G09G5/00

CPC classification number: G09G3/3648 ,  G09G3/3677 ,  G09G2300/0426 ,  G09G2300/0465 ,  G09G2310/0297 ,  G09G2320/0223

Abstract: A pixel array, a driving method thereof and a flat panel display using the same are provided. The pixel array includes a first, a second, a third, and a fourth scan lines. A plurality of pixels is disposed between the first and the second scan lines. A plurality of pixels is disposed between the third and the fourth scan lines. In a first frame period, a gate driving circuit sequentially provides a driving signal to the first, the second, the fourth and the third scan lines. In a second frame period, the gate driving circuit sequentially provides the driving signal to the second, the first, the third and the fourth scan lines.

Abstract translation: 提供像素阵列，其驱动方法和使用其的平板显示器。 像素阵列包括第一，第二，第三和第四扫描线。 多个像素设置在第一和第二扫描线之间。 多个像素设置在第三和第四扫描线之间。 在第一帧周期中，栅极驱动电路依次向第一，第二，第四和第三扫描线提供驱动信号。 在第二帧周期中，栅极驱动电路依次向第二扫描线，第一扫描线，第三扫描线和第四扫描线提供驱动信号。