公开(公告)号：US20090319810A1

公开(公告)日：2009-12-24

申请号：US12307485

申请日：2007-01-11

申请人： Yasuhiro Aoyama

发明人： Yasuhiro Aoyama

IPC分类号： G06F13/24 ,  G06F1/26

CPC分类号： H04W52/0229 ,  H04L12/10 ,  H04L69/28 ,  H04W52/028 ,  Y02D70/00

摘要： A receiving apparatus does not frequently activate a host processor in a sleep mode, so that it is possible to reduce a time overhead when the host processor transitions from a sleep mode to a running mode, also suppress power consumed in the overhead time and improve communication performance. With this apparatus, a communication interface circuit (101) extracts packet data from a signal received from a network. A communication interface control circuit (102) decides whether or not packet data is packet data that must be received, and, when the packet data is packet data that must be received, issues an interrupt signal. A power supply circuit (106) supplies power. When receiving the interrupt signal, the host processor (107) executes a program including reception processing.

摘要翻译： 接收装置在睡眠模式中不会频繁地激活主机处理器，从而当主处理器从睡眠模式转换到运行模式时，可以减少时间开销，还可以抑制在开销时间内消耗的功率并改善通信 性能。 利用该装置，通信接口电路（101）从从网络接收的信号中提取分组数据。 通信接口控制电路（102）判定分组数据是否是必须接收的分组数据，并且当分组数据是必须接收的分组数据时，发出中断信号。 电源电路（106）供电。 当接收到中断信号时，主处理器（107）执行包括接收处理的程序。

公开(公告)号：US07365566B2

公开(公告)日：2008-04-29

申请号：US10589078

申请日：2005-02-08

申请人： Yasuhiro Aoyama ,  Yosuke Kudo

发明人： Yasuhiro Aoyama ,  Yosuke Kudo

IPC分类号： H03K19/177 ,  G06F7/38

CPC分类号： H03K19/17752 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17756 ,  H03K19/1776 ,  H03K19/17796

摘要： A programmable logic circuit (100) includes a processor element (101) having: a logic cell (300) which can modify the function according to first setting information and generates data by performing a predetermined logic calculation on an input signal; a cross connect switch (301) for generating data by performing alignment, copying, and inversion of the data from the logic calculation means according to second setting information; and a memory control unit (201) which reads out the first or the second setting information from a memory device (102) according to branch setting information and supplies it to the logic calculation means and the data processing means for performing control. According to the first and the second setting information successively read from the memory device (102), each of unit logic circuits successively modifies a part or whole of the logic cell (300) and the cross connect switch (301) and performs a predetermined sequence circuit operation.

摘要翻译： 可编程逻辑电路（100）包括具有：逻辑单元（300）的处理器元件（101），其可以根据第一设置信息修改功能，并且通过对输入信号执行预定的逻辑计算来产生数据; 交叉连接开关（301），用于通过根据第二设置信息从逻辑计算装置执行数据的对准，复制和反转来产生数据; 以及根据分支设置信息从存储器件（102）读出第一或第二设置信息的存储器控​​制单元（201），并将其提供给逻辑计算装置和用于执行控制的数据处理装置。 根据从存储器件（102）连续读出的第一和第二设置信息，每个单元逻辑电路连续修改逻辑单元（300）和交叉连接开关（301）的一部分或全部，并执行预定的顺序 电路操作。

公开(公告)号：US20080062977A1

公开(公告)日：2008-03-13

申请号：US11575697

申请日：2005-09-13

申请人： Tomoharu Kaneko ,  Tsutomu Kito ,  Yasuhiro Aoyama ,  Tomohiro Iwama

发明人： Tomoharu Kaneko ,  Tsutomu Kito ,  Yasuhiro Aoyama ,  Tomohiro Iwama

IPC分类号： H04L12/56

CPC分类号： H04L29/12009 ,  H04L12/2818 ,  H04L12/2898 ,  H04L29/12528 ,  H04L29/12537 ,  H04L61/2575 ,  H04L61/2578 ,  H04L67/14 ,  H04W8/26 ,  H04W28/18 ,  H04W74/00 ,  H04W76/14 ,  H04W80/00 ,  H04W92/18

摘要： There are disclosed a server apparatus, an electric device, a mobile terminal and so on that reduce the processing load of a server and also reduce the bands used for access lines connected by the server to the Internet. According to the apparatus, an electric device (101) receiving an invocation request from a mobile terminal (105) changes the settings of an NAT router (102) and acquires and transmits information of the setting as changed and an Internet side global IP address of the NAT router (102) to the mobile terminal (105), which uses these information to transmit a P2P session establishment request to the electric device (101), thereby establishing a session between the mobile terminal (105) and the electric device (101).

摘要翻译： 公开了一种降低服务器的处理负荷的服务器装置，电子装置，移动终端等，并且还将用于由服务器连接到因特网的接入线路的频带减少。 根据该装置，从移动终端（105）接收到调用请求的电子设备（101）改变NAT路由器（102）的设置，并且获取和发送被改变的设置的信息，并且发送所述设置的信息，以及互联网侧全局IP地址 将所述NAT路由器（102）发送到所述移动终端（105），所述NAT路由器（102）利用这些信息向所述电气设备（101）发送P2P会话建立请求，由此在所述移动终端（105）与所述电气设备 ）。

公开(公告)号：US20070288606A1

公开(公告)日：2007-12-13

申请号：US11576381

申请日：2005-09-27

申请人： Tsutomu Kito ,  Tomoharu Kaneko ,  Tomohiro Iwama ,  Yasuhiro Aoyama

发明人： Tsutomu Kito ,  Tomoharu Kaneko ,  Tomohiro Iwama ,  Yasuhiro Aoyama

IPC分类号： G06F15/177

CPC分类号： H04L61/2578 ,  H04L29/12009 ,  H04L29/12509 ,  H04L29/12528 ,  H04L29/12537 ,  H04L61/2567 ,  H04L61/2575 ,  H04M11/007 ,  H04W8/26 ,  H04W28/18 ,  H04W40/00 ,  H04W48/08 ,  H04W80/00 ,  H04W88/02

摘要： A communication terminal apparatus, an electric device and so on that apply an appropriate protocol. A message, which includes a protocol type designated by an electric device (102) with which a mobile telephone (101) is to directly connect and also includes the address and setting information of an NAT router (103) connected to the electric device (102), is transmitted from a server apparatus (104) disposed on the Internet to the mobile telephone (101). Then, the mobile telephone (101) applies, out of acquired protocol types, a protocol used to connect with the electric device (102), and uses the address and setting information of the NAT router (103) to connect with the electric device (102) via the NAT router (103).

摘要翻译： 一种应用适当协议的通信终端设备，电子设备等。 一种消息，其包括由移动电话（101）直接连接的电气设备（102）指定的协议类型，并且还包括连接到电气设备（102）的NAT路由器（103）的地址和设置信息 ）从设置在因特网上的服务器装置（104）发送到移动电话（101）。 然后，移动电话（101）从获取的协议类型中应用用于与电气设备（102）连接的协议，并且使用NAT路由器（103）的地址和设置信息与电气设备（103） 102）通过NAT路由器（103）。

公开(公告)号：US20070279085A1

公开(公告)日：2007-12-06

申请号：US10589078

申请日：2005-02-08

申请人： Yasuhiro Aoyama ,  Yosuke Kudo

发明人： Yasuhiro Aoyama ,  Yosuke Kudo

IPC分类号： H03K19/177

CPC分类号： H03K19/17752 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17756 ,  H03K19/1776 ,  H03K19/17796

摘要： A programmable logic circuit (100) includes a processor element (101) having: a logic cell (300) which can modify the function according to first setting information and generates data by performing a predetermined logic calculation on an input signal; a cross connect switch (301) for generating data by performing alignment, copying, and inversion of the data from the logic calculation means according to second setting information; and a memory control unit (201) which reads out the first or the second setting information from a memory device (102) according to branch setting information and supplies it to the logic calculation means and the data processing means for performing control. According to the first and the second setting information successively read from the memory device (102), each of unit logic circuits successively modifies a part or whole of the logic cell (300) and the cross connect switch (301) and performs a predetermined sequence circuit operation.

摘要翻译： 可编程逻辑电路（100）包括具有：逻辑单元（300）的处理器元件（101），其可以根据第一设置信息修改功能，并且通过对输入信号执行预定的逻辑计算来产生数据; 交叉连接开关（301），用于通过根据第二设置信息从逻辑计算装置执行数据的对准，复制和反转来产生数据; 以及根据分支设置信息从存储器件（102）读出第一或第二设置信息的存储器控​​制单元（201），并将其提供给逻辑计算装置和用于执行控制的数据处理装置。 根据从存储器件（102）连续读出的第一和第二设置信息，每个单元逻辑电路连续修改逻辑单元（300）和交叉连接开关（301）的一部分或全部，并执行预定的顺序 电路操作。

公开(公告)号：US20130337865A1

公开(公告)日：2013-12-19

申请号：US14002278

申请日：2012-03-09

申请人： Yasuhiro Aoyama

发明人： Yasuhiro Aoyama

IPC分类号： H04W88/06

CPC分类号： H04W88/06

摘要： A communication device (100) can communicate through a plurality of communication systems consisting of communication (A) and communication (B). An external memory (108) stores control data to be used for controlling the communication by each communication system, with respect to each communication system. A built-in memory (106) can read/write the control data at a higher speed than the external memory (108). A CPU (105) provides instructions to read the control data of the communication system to be used from the external memory (108), and to store the data in the built-in memory (106), and also, upon switching the communication system to be used, the CPU provides instructions to exchange the control data of the communication system prior to the switching which is stored in the built-in memory (106), with the control data of the communication system after the switching which is stored in the external memory (108).

摘要翻译： 通信设备（100）可以通过由通信（A）和通信（B）组成的多个通信系统进行通信。 外部存储器（108）相对于每个通信系统存储用于控制每个通信系统的通信的控制数据。 内置存储器（106）可以以比外部存储器（108）更高的速度读取/写入控制数据。 CPU（105）提供从外部存储器（108）读取要使用的通信系统的控制数据并将数据存储在内置存储器（106）中的指令，并且在切换通信系统 要使用的CPU，在存储在内置存储器（106）中的切换之前，通过存储在内置存储器（106）中的切换后的通信系统的控制数据，提供交换通信系统的控制数据的指令 外部存储器（108）。

公开(公告)号：US20100225314A1

公开(公告)日：2010-09-09

申请号：US12676239

申请日：2008-09-08

申请人： Katsuaki Kuge ,  Kimihiro Yoshimura ,  Fumio Yamauchi ,  Tetsuya Yano ,  Masahiro Shirakawa ,  Yasuhiro Aoyama

发明人： Katsuaki Kuge ,  Kimihiro Yoshimura ,  Fumio Yamauchi ,  Tetsuya Yano ,  Masahiro Shirakawa ,  Yasuhiro Aoyama

IPC分类号： G01R33/44

CPC分类号： G01R33/485 ,  G01R33/4608 ,  G01R33/4633 ,  G01R33/4833 ,  G01R33/5605 ,  G01R33/5607

摘要： The present invention provides a method for measuring nuclear magnetic resonance that employs a compound in which a plurality of nuclei is labeled with isotopes as a probe agent, highly selectively and highly sensitively obtains a nuclear magnetic resonance signal of the above described probe agent, and can attach a spatial positional information to the above described nuclear magnetic resonance signal, and an apparatus therefore.

摘要翻译： 本发明提供一种测定核磁共振的方法，其使用多个核被同位素标记的化合物作为探针剂，高度选择性且高度灵敏地获得上述探针剂的核磁共振信号，并且可以 将空间位置信息附加到上述核磁共振信号，因此装置。

公开(公告)号：US20090217376A1

公开(公告)日：2009-08-27

申请号：US11719493

申请日：2005-11-16

申请人： Tomohiro Iwama ,  Tsutomu Kito ,  Tomoharu Kaneko ,  Yasuhiro Aoyama

发明人： Tomohiro Iwama ,  Tsutomu Kito ,  Tomoharu Kaneko ,  Yasuhiro Aoyama

IPC分类号： G06F11/00 ,  G06F15/16

CPC分类号： H04L63/1408 ,  H04L29/12547 ,  H04L61/2582

摘要： A mobile terminal and a home-use information product capable of retaining the security even under a network attack, while achieving P2P connection. When detecting a network attack, a home-use information product (104) notifies a mobile terminal (102) of the network attack. When receiving the notification, the mobile terminal (102) closes the port of a P2P connection part (121), requests the home-use information product (104) to close its port, and causes the home-use information product (104) to close the P2P connection port of a NAT router (103).

摘要翻译： 即使在网络攻击的情况下也能够保持安全性的移动终端和家用信息产品，同时实现P2P连接。 当检测到网络攻击时，家用信息产品（104）向移动终端（102）通知网络攻击。 当接收通知时，移动终端（102）关闭P2P连接部分（121）的端口，请求家庭用户信息产品（104）关闭其端口，并使家庭用户信息产品（104） 关闭NAT路由器的P2P连接端口（103）。

公开(公告)号：US06380127B1

公开(公告)日：2002-04-30

申请号：US09423450

申请日：2000-01-05

申请人： Yasuhiro Aoyama ,  Takehisa Dewa ,  Tomoya Sawaki

发明人： Yasuhiro Aoyama ,  Takehisa Dewa ,  Tomoya Sawaki

IPC分类号： B01J3100

CPC分类号： B01J31/0214 ,  B01J31/02 ,  B01J2231/326 ,  Y10S502/513

摘要： A novel metal composite is provided which is useful as a catalyst or the like by the control of a structure of an apohost and the modification thereof and in which an organic apohost capable of forming a porous structure by a hydrogen bond is compounded with at least one type of transition metallic elements or compounds thereof.

摘要翻译： 提供了一种新颖的金属复合材料，其可以通过控制末梢结构的结构及其修饰而用作催化剂等，并且其中能够通过氢键形成多孔结构的有机载脂蛋白复合物与至少一种 过渡金属元素或其化合物的类型。

公开(公告)号：US06198671B1

公开(公告)日：2001-03-06

申请号：US09506102

申请日：2000-02-17

申请人： Yasuhiro Aoyama ,  Kazuhiko Shimakawa ,  Kiyoto Ohta ,  Masanobu Hirose

发明人： Yasuhiro Aoyama ,  Kazuhiko Shimakawa ,  Kiyoto Ohta ,  Masanobu Hirose

IPC分类号： G11C700

CPC分类号： G11C5/14

摘要： The semiconductor memory device formed on a semiconductor substrate includes: a memory cell array having a plurality of memory cells formed at intersections between a plurality of word lines and a plurality of bit line pairs; a plurality of sense amplifiers each formed to correspond to each of the plurality of bit line pairs for amplifying a potential difference read on the bit line pair; and a low-level potential generation section for generating a low-level potential out of high-level and low-level potentials to be applied to the memory cells, the bit line pairs, and the sense amplifiers. The low-level potential generation section has: a ground potential generation part having a ground potential generation semiconductor element for generating as the low-level potential a first potential substantially equal to a ground potential; a threshold potential generation part having a threshold potential generation semiconductor element for generating as the low-level potential a second potential substantially equal to a threshold potential, and operating when a potential exceeding the threshold potential is applied; and a ground potential control part for controlling operation of the ground potential generation semiconductor element.

摘要翻译： 形成在半导体衬底上的半导体存储器件包括：存储单元阵列，具有形成在多个字线和多个位线对之间的交叉处的多个存储单元; 多个读出放大器，每个形成为对应于多个位线对中的每一个，用于放大位线对上读取的电位差; 以及用于在施加到存储单元，位线对和读出放大器的高电平和低电平电位之间产生低电平电位的低电平电位产生部分。 低电平电位产生部分具有：具有接地电位产生半导体元件的地电位产生部分，用于产生基本上等于地电势的第一电位作为低电位电位; 阈值电位产生部分，其具有用于产生基本上等于阈值电位的第二电位作为低电位电位的阈值电位产生半导体元件，并且当施加超过阈值电势的电位时操作; 以及用于控制地电位产生半导体元件的工作的接地电位控制部。