Image reading apparatus, multifunction printer, and image reading method
    1.
    发明授权
    Image reading apparatus, multifunction printer, and image reading method 有权
    图像读取装置,多功能打印机和图像读取方法

    公开(公告)号:US08659766B2

    公开(公告)日:2014-02-25

    申请号:US12955529

    申请日:2010-11-29

    摘要: This invention is directed to image reading capable of suppressing EMI unwanted radiation while maintaining image quality. To accomplish this, the following processing is executed when reading an original image by a photoelectric transducer. More specifically, a first driving signal where SSCG spread modulation is applied, and a second driving signal where no SSCG spread modulation is applied are generated from a reference signal. Either the first or second driving signal is selected, and a timing signal for reading the original image is generated based on the selected driving signal. The image signal obtained by the photoelectric transducer is latched using the timing signal. The latched image signal is transferred for subsequent image processing. Upon reading a one-line image original, the second driving signal is selected till the completion of the latch operation, and after the latch operation, the first driving signal is selected for an image signal transfer operation.

    摘要翻译: 本发明涉及能够在保持图像质量的同时抑制EMI不需要的辐射的图像读取。 为了实现这一点,当通过光电传感器读取原始图像时,执行以下处理。 更具体地,从参考信号产生施加SSCG扩展调制的第一驱动信号和不施加SSCG扩展调制的第二驱动信号。 选择第一或第二驱动信号,并且基于所选择的驱动信号产生用于读取原始图像的定时信号。 使用定时信号来锁存由光电变换器获得的图像信号。 被锁定的图像信号被传送用于随后的图像处理。 在读取单行图像原稿时,选择第二驱动信号直到锁存操作完成,并且在锁存操作之后,选择第一驱动信号进行图像信号传送操作。

    Semiconductor device with a metal layer for supplying a predetermined
potential to a memory cell section
    3.
    发明授权
    Semiconductor device with a metal layer for supplying a predetermined potential to a memory cell section 有权
    具有用于向存储单元部分提供预定电位的金属层的半导体器件

    公开(公告)号:US5933364A

    公开(公告)日:1999-08-03

    申请号:US237853

    申请日:1999-01-27

    CPC分类号: G11C5/14 G11C5/025 G11C5/063

    摘要: A semiconductor device according to the present invention includes: a semiconductor chip; and memory and logic sections formed on the semiconductor chip. The memory section includes: an array of memory cells; a sense amplifier circuit; and memory interconnects respectively provided in a number n (where n is a positive integer) of interconnect layers. The logic section includes logic circuits having logic interconnects respectively provided in a number n+m (where m is a positive integer) of interconnect layers. A metal layer is formed in one of (n+1)th to (n+m)th interconnect layers, covers the array of memory cells and supplies a predetermined potential to the memory section.

    摘要翻译: 根据本发明的半导体器件包括:半导体芯片; 以及形成在半导体芯片上的存储器和逻辑部分。 存储器部分包括:存储器单元阵列; 一个读出放大器电路; 和分别设置在n个(其中n是正整数))互连层的存储器互连。 逻辑部分包括逻辑电路,逻辑电路具有分别以互连层数n + m(其中m为正整数)提供的逻辑互连。 在(n + 1)至(n + m)个互连层之一中形成金属层,覆盖存储单元阵列并向存储部分提供预定电位。

    COMMUNICATION DEVICE AND DATA EXCHANGE METHOD
    4.
    发明申请
    COMMUNICATION DEVICE AND DATA EXCHANGE METHOD 审中-公开
    通信设备和数据交换方法

    公开(公告)号:US20130337865A1

    公开(公告)日:2013-12-19

    申请号:US14002278

    申请日:2012-03-09

    申请人: Yasuhiro Aoyama

    发明人: Yasuhiro Aoyama

    IPC分类号: H04W88/06

    CPC分类号: H04W88/06

    摘要: A communication device (100) can communicate through a plurality of communication systems consisting of communication (A) and communication (B). An external memory (108) stores control data to be used for controlling the communication by each communication system, with respect to each communication system. A built-in memory (106) can read/write the control data at a higher speed than the external memory (108). A CPU (105) provides instructions to read the control data of the communication system to be used from the external memory (108), and to store the data in the built-in memory (106), and also, upon switching the communication system to be used, the CPU provides instructions to exchange the control data of the communication system prior to the switching which is stored in the built-in memory (106), with the control data of the communication system after the switching which is stored in the external memory (108).

    摘要翻译: 通信设备(100)可以通过由通信(A)和通信(B)组成的多个通信系统进行通信。 外部存储器(108)相对于每个通信系统存储用于控制每个通信系统的通信的控制数据。 内置存储器(106)可以以比外部存储器(108)更高的速度读取/写入控制数据。 CPU(105)提供从外部存储器(108)读取要使用的通信系统的控制数据并将数据存储在内置存储器(106)中的指令,并且在切换通信系统 要使用的CPU,在存储在内置存储器(106)中的切换之前,通过存储在内置存储器(106)中的切换后的通信系统的控制数据,提供交换通信系统的控制数据的指令 外部存储器(108)。

    HOME-USE INFORMATION PRODUCT AND MOBILE TERMINAL
    6.
    发明申请
    HOME-USE INFORMATION PRODUCT AND MOBILE TERMINAL 审中-公开
    家用信息产品和移动终端

    公开(公告)号:US20090217376A1

    公开(公告)日:2009-08-27

    申请号:US11719493

    申请日:2005-11-16

    IPC分类号: G06F11/00 G06F15/16

    摘要: A mobile terminal and a home-use information product capable of retaining the security even under a network attack, while achieving P2P connection. When detecting a network attack, a home-use information product (104) notifies a mobile terminal (102) of the network attack. When receiving the notification, the mobile terminal (102) closes the port of a P2P connection part (121), requests the home-use information product (104) to close its port, and causes the home-use information product (104) to close the P2P connection port of a NAT router (103).

    摘要翻译: 即使在网络攻击的情况下也能够保持安全性的移动终端和家用信息产品,同时实现P2P连接。 当检测到网络攻击时,家用信息产品(104)向移动终端(102)通知网络攻击。 当接收通知时,移动终端(102)关闭P2P连接部分(121)的端口,请求家庭用户信息产品(104)关闭其端口,并使家庭用户信息产品(104) 关闭NAT路由器的P2P连接端口(103)。

    Porous organic/metallic composite
    7.
    发明授权
    Porous organic/metallic composite 失效
    多孔有机/金属复合材料

    公开(公告)号:US06380127B1

    公开(公告)日:2002-04-30

    申请号:US09423450

    申请日:2000-01-05

    IPC分类号: B01J3100

    摘要: A novel metal composite is provided which is useful as a catalyst or the like by the control of a structure of an apohost and the modification thereof and in which an organic apohost capable of forming a porous structure by a hydrogen bond is compounded with at least one type of transition metallic elements or compounds thereof.

    摘要翻译: 提供了一种新颖的金属复合材料,其可以通过控制末梢结构的结构及其修饰而用作催化剂等,并且其中能够通过氢键形成多孔结构的有机载脂蛋白复合物与至少一种 过渡金属元素或其化合物的类型。

    Semiconductor memory device
    8.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号:US06198671B1

    公开(公告)日:2001-03-06

    申请号:US09506102

    申请日:2000-02-17

    IPC分类号: G11C700

    CPC分类号: G11C5/14

    摘要: The semiconductor memory device formed on a semiconductor substrate includes: a memory cell array having a plurality of memory cells formed at intersections between a plurality of word lines and a plurality of bit line pairs; a plurality of sense amplifiers each formed to correspond to each of the plurality of bit line pairs for amplifying a potential difference read on the bit line pair; and a low-level potential generation section for generating a low-level potential out of high-level and low-level potentials to be applied to the memory cells, the bit line pairs, and the sense amplifiers. The low-level potential generation section has: a ground potential generation part having a ground potential generation semiconductor element for generating as the low-level potential a first potential substantially equal to a ground potential; a threshold potential generation part having a threshold potential generation semiconductor element for generating as the low-level potential a second potential substantially equal to a threshold potential, and operating when a potential exceeding the threshold potential is applied; and a ground potential control part for controlling operation of the ground potential generation semiconductor element.

    摘要翻译: 形成在半导体衬底上的半导体存储器件包括:存储单元阵列,具有形成在多个字线和多个位线对之间的交叉处的多个存储单元; 多个读出放大器,每个形成为对应于多个位线对中的每一个,用于放大位线对上读取的电位差; 以及用于在施加到存储单元,位线对和读出放大器的高电平和低电平电位之间产生低电平电位的低电平电位产生部分。 低电平电位产生部分具有:具有接地电位产生半导体元件的地电位产生部分,用于产生基本上等于地电势的第一电位作为低电位电位; 阈值电位产生部分,其具有用于产生基本上等于阈值电位的第二电位作为低电位电位的阈值电位产生半导体元件,并且当施加超过阈值电势的电位时操作; 以及用于控制地电位产生半导体元件的工作的接地电位控制部。

    IMAGE READING APPARATUS, MULTIFUNCTION PRINTER, AND IMAGE READING METHOD
    9.
    发明申请
    IMAGE READING APPARATUS, MULTIFUNCTION PRINTER, AND IMAGE READING METHOD 有权
    图像读取装置,多功能打印机和图像读取方法

    公开(公告)号:US20110157616A1

    公开(公告)日:2011-06-30

    申请号:US12955529

    申请日:2010-11-29

    IPC分类号: G06F3/12 H04N1/04

    摘要: This invention is directed to image reading capable of suppressing EMI unwanted radiation while maintaining image quality. To accomplish this, the following processing is executed when reading an original image by a photoelectric transducer. More specifically, a first driving signal where SSCG spread modulation is applied, and a second driving signal where no SSCG spread modulation is applied are generated from a reference signal. Either the first or second driving signal is selected, and a timing signal for reading the original image is generated based on the selected driving signal. The image signal obtained by the photoelectric transducer is latched using the timing signal. The latched image signal is transferred for subsequent image processing. Upon reading a one-line image original, the second driving signal is selected till the completion of the latch operation, and after the latch operation, the first driving signal is selected for an image signal transfer operation.

    摘要翻译: 本发明涉及能够在保持图像质量的同时抑制EMI不需要的辐射的图像读取。 为了实现这一点,当通过光电传感器读取原始图像时,执行以下处理。 更具体地,从参考信号产生施加SSCG扩展调制的第一驱动信号和不施加SSCG扩展调制的第二驱动信号。 选择第一或第二驱动信号,并且基于所选择的驱动信号产生用于读取原始图像的定时信号。 使用定时信号来锁存由光电变换器获得的图像信号。 被锁定的图像信号被传送用于随后的图像处理。 在读取单行图像原稿时,选择第二驱动信号直到锁存操作完成,并且在锁存操作之后,选择第一驱动信号进行图像信号传送操作。

    RECEIVING APPARATUS AND ACTIVATION CONTROL METHOD FOR RECEIVING APPARATUS
    10.
    发明申请
    RECEIVING APPARATUS AND ACTIVATION CONTROL METHOD FOR RECEIVING APPARATUS 审中-公开
    接收装置和接收装置的激活控制方法

    公开(公告)号:US20090319810A1

    公开(公告)日:2009-12-24

    申请号:US12307485

    申请日:2007-01-11

    申请人: Yasuhiro Aoyama

    发明人: Yasuhiro Aoyama

    IPC分类号: G06F13/24 G06F1/26

    摘要: A receiving apparatus does not frequently activate a host processor in a sleep mode, so that it is possible to reduce a time overhead when the host processor transitions from a sleep mode to a running mode, also suppress power consumed in the overhead time and improve communication performance. With this apparatus, a communication interface circuit (101) extracts packet data from a signal received from a network. A communication interface control circuit (102) decides whether or not packet data is packet data that must be received, and, when the packet data is packet data that must be received, issues an interrupt signal. A power supply circuit (106) supplies power. When receiving the interrupt signal, the host processor (107) executes a program including reception processing.

    摘要翻译: 接收装置在睡眠模式中不会频繁地激活主机处理器,从而当主处理器从睡眠模式转换到运行模式时,可以减少时间开销,还可以抑制在开销时间内消耗的功率并改善通信 性能。 利用该装置,通信接口电路(101)从从网络接收的信号中提取分组数据。 通信接口控制电路(102)判定分组数据是否是必须接收的分组数据,并且当分组数据是必须接收的分组数据时,发出中断信号。 电源电路(106)供电。 当接收到中断信号时,主处理器(107)执行包括接收处理的程序。