公开(公告)号：US06842377B2

公开(公告)日：2005-01-11

申请号：US10412646

申请日：2003-04-11

申请人： Yoshinori Takano ,  Yasuhiko Honda ,  Toru Tanzawa ,  Masao Kuriyama

发明人： Yoshinori Takano ,  Yasuhiko Honda ,  Toru Tanzawa ,  Masao Kuriyama

IPC分类号： G11C16/02 ,  G11C7/10 ,  G11C7/22 ,  G11C16/06 ,  G11C16/26 ,  G11C16/28

CPC分类号： G11C7/22 ,  G11C7/1021 ,  G11C16/26 ,  G11C16/28 ,  G11C2207/2281

摘要： A nonvolatile semiconductor memory device with a plurality of read modes switchably built therein is provided. This nonvolatile semiconductor memory device is the one that has a memory cell array in which electrically rewritable nonvolatile memory cells are laid out and a read circuit which performs data readout of the memory cell array. The nonvolatile semiconductor memory device has a first read mode and a second read mode. The first read mode is for reading data by means of parallel data transfer of the same bit number when sending data from the memory cell array through the read circuit up to more than one external terminal. The second read mode is for performing parallel data transfer of a greater bit number than that of the first read mode when sending data from the memory cell array to the read circuit while performing data transfer of a smaller bit number than the bit number when sending data from the read circuit up to the external terminal.

摘要翻译： 提供了一种具有可切换地构建的多个读取模式的非易失性半导体存储器件。 这种非易失性半导体存储器件是具有其中布置有电可重写非易失性存储单元的存储单元阵列，以及执行存储单元阵列的数据读出的读电路。 非易失性半导体存储器件具有第一读取模式和第二读取模式。 第一读取模式是通过从存储单元阵列通过读取电路向多于一个的外部端子发送数据时，通过相同位数的并行数据传输来读取数据。 第二读取模式用于在将数据从存储器单元阵列发送到读取电路时执行比第一读取模式更大位数的并行数据传输，同时在发送数据时执行比位数更小位数的数据传输 从读取电路到外部端子。

公开(公告)号：US20050002252A1

公开(公告)日：2005-01-06

申请号：US10896701

申请日：2004-07-22

申请人： Yoshinori Takano ,  Shigeru Atsumi ,  Toru Tanzawa

发明人： Yoshinori Takano ,  Shigeru Atsumi ,  Toru Tanzawa

IPC分类号： G11C16/06 ,  G11C7/06 ,  G11C7/14 ,  G11C16/28 ,  G11C7/02

CPC分类号： G11C7/062 ,  G11C7/067 ,  G11C7/14 ,  G11C16/28

摘要： A semiconductor memory device comprises memory cell array, a sense amp, and a reference voltage generator. The reference voltage generator includes a reference cell unit containing a reference cell to flow a reference current and a first current source load to supply a current to the reference cell; a reference transistor unit containing a reference transistor to flow a current reflecting the reference current and a second current source load to supply a current to the reference transistor; a control amp for negative feedback control of the reference transistor; a current source transistor; and a third current source load connected to a reference sense line.

摘要翻译： 半导体存储器件包括存储单元阵列，感测放大器和参考电压发生器。 参考电压发生器包括参考单元单元，其包含用于流过参考电流的参考单元和第一电流源负载以向参考单元提供电流; 参考晶体管单元，其包含用于流过反映参考电流的电流的参考晶体管和第二电流源负载以向参考晶体管提供电流; 用于参考晶体管的负反馈控制的控制放大器; 电流源晶体管; 以及连接到参考感测线的第三电流源负载。

公开(公告)号：US06826068B1

公开(公告)日：2004-11-30

申请号：US10654463

申请日：2003-09-03

申请人： Hitoshi Shiga ,  Yoshinori Takano ,  Toru Tanzawa ,  Shigeru Atsumi

发明人： Hitoshi Shiga ,  Yoshinori Takano ,  Toru Tanzawa ,  Shigeru Atsumi

IPC分类号： G11C506

CPC分类号： G11C7/1021 ,  G11C8/10

摘要： A semiconductor integrated circuit device includes first to fourth bit lines and a redundant bit line, first to fourth column gate transistors and a redundant column gate transistor coupled to each of the first to fourth bit lines and the redundant bit lines, first to fourth column select lines and a redundant column select line coupled to each of the first to fourth column gate transistors and the redundant column gate transistor. The second column select line passes through the first bit line. The third column select line passes through the first and second bit lines. The fourth column select line passes through the first, second and third bit lines. The redundant column select line passes through the first, second, third and fourth bit lines.

摘要翻译： 半导体集成电路器件包括第一至第四位线和冗余位线，第一至第四列栅极晶体管和耦合到第一至第四位线和冗余位线中的每一个的冗余列栅极晶体管，第一至第四列选择 线路以及耦合到第一至第四列栅极晶体管和冗余列栅极晶体管中的每一个的冗余列选择线。 第二列选择线通过第一位线。 第三列选择线通过第一和第二位线。 第四列选择线通过第一，第二和第三位线。 冗余列选择线通过第一，第二，第三和第四位线。

公开(公告)号：US06734719B2

公开(公告)日：2004-05-11

申请号：US10238773

申请日：2002-09-11

申请人： Toru Tanzawa ,  Yoshinori Takano

发明人： Toru Tanzawa ,  Yoshinori Takano

IPC分类号： G05F110

CPC分类号： G11C5/147

摘要： A constant voltage generating circuit comprising following elements is shown: a first constant current generation circuit including a first transistor and a second transistor, configured to generate a first voltage and a first current as determined by an operating point to be determined depending on a difference in threshold voltage between the first and second transistors; a second constant current generation circuit configured to generate a second current proportional to said first current; and a voltage generation circuit including a third transistor having its gate and drain connected together, configured to generate a second voltage when letting said second current flow in said third transistor.

摘要翻译： 示出包括以下元件的恒压产生电路：第一恒流产生电路，包括第一晶体管和第二晶体管，其被配置为产生由操作点确定的第一电压和第一电流，以根据第 所述第一和第二晶体管之间的阈值电压;被配置为产生与所述第一电流成比例的第二电流的第二恒定电流产生电路; 以及包括其栅极和漏极连接在一起的第三晶体管的电压产生电路，被配置为当使所述第二电流流过所述第三晶体管时产生第二电压。

公开(公告)号：US06693818B2

公开(公告)日：2004-02-17

申请号：US10376848

申请日：2003-02-28

申请人： Hitoshi Shiga ,  Yoshinori Takano ,  Toru Tanzawa ,  Shigeru Atsumi

发明人： Hitoshi Shiga ,  Yoshinori Takano ,  Toru Tanzawa ,  Shigeru Atsumi

IPC分类号： G11C506

CPC分类号： G11C7/1021 ,  G11C8/10

摘要： A semiconductor integrated circuit includes first to eighth column selection transistors and ninth to twelfth column selection transistors. The ninth column selection transistor is connected to the first and second column selection transistors. The tenth column selection transistor is connected to the third and fourth column selection transistors. The eleventh column selection transistor is connected to the fifth and sixth column selection transistors. The twelfth column selection transistor is connected to the seventh and eighth column selection transistors. A first column selection line is connected to gates of the first, third, fifth and seventh column selection transistors. A second column selection line is connected to gates of the second, fourth, sixth and eighth column selection transistors. Third to sixth column selection lines are connected to gates of the ninth to twelfth column selection transistors, respectively.

摘要翻译： 半导体集成电路包括第一至第八列选择晶体管和第九至第十十列选择晶体管。 第九列选择晶体管连接到第一和第二列选择晶体管。 第十列选择晶体管连接到第三和第四列选择晶体管。 第十列选择晶体管连接到第五和第六列选择晶体管。 第十二列选择晶体管连接到第七和第八列选择晶体管。 第一列选择线连接到第一，第三，第五和第七列选择晶体管的栅极。 第二列选择线连接到第二，第四，第六和第八列选择晶体管的栅极。 第三至第六列选择线分别连接到第九至第十二列选择晶体管的栅极。

公开(公告)号：US5631810A

公开(公告)日：1997-05-20

申请号：US563687

申请日：1995-11-28

申请人： Yoshinori Takano

发明人： Yoshinori Takano

IPC分类号： H02M3/28 ,  H02M3/335 ,  H02M7/21

CPC分类号： H02M3/33576

摘要： A switch controller in a DC--DC converter performs the switching control of a primary switch and a freewheel switch which are connected to the primary and the secondary of a transformer, respectively. The switch controller comprises a control voltage generator for generating two control voltages having a predetermined voltage difference, a triangular-wave oscillator for generating a triangular-wave voltage, and a control pulse generator for generating two control pulse signals which cause the primary switch and the freewheel switch to alternately turn on and off such that both the primary switch and the freewheel switch become off during a certain period when one of the primary switch and the freewheel switch is turned off.

摘要翻译： DC-DC转换器中的开关控制器执行分别连接到变压器的初级和次级的初级开关和续流开关的开关控制。 开关控制器包括用于产生具有预定电压差的两个控制电压的控制电压发生器，用于产生三角波电压的三角波振荡器和用于产生两个控制脉冲信号的控制脉冲发生器，所述控制脉冲信号使主开关和 自由切换开关以交替地开启和关闭，使得在主开关和自由轮开关之一关闭时的一定时间段内，主开关和自由轮开关都断开。

公开(公告)号：US5868486A

公开(公告)日：1999-02-09

申请号：US622359

申请日：1996-03-27

申请人： Yoshinori Takano ,  Mamoru Yoshida

发明人： Yoshinori Takano ,  Mamoru Yoshida

IPC分类号： G02B6/00 ,  F21V8/00 ,  G02F1/1335 ,  G02F1/13357

CPC分类号： G02B6/009 ,  G02B6/0031 ,  G02B6/0071

摘要： A lamp holder 11 is made of white synthetic resin by molding such as injection molding. A reflection sheet 12 made of high-reflectance material such as silver or aluminum has a central portion 12a cut out and is affixed to an inner surface 11a of the lamp holder 11. The light reached the inner surface of the lamp holder 11 of light emitted from a lamp 1 is regularly reflected by the reflection sheet 12 and is diffusively reflected by the cutout portion of the reflection sheet 12. A considerable part of the light reflected on the white surface reaches the vicinity of electrode portions 1a of a discharge tube 1 to enter from an incidence end surface of a light guide in the vicinity of electrode portions 1a. Thus, the difference of light-supplying power between the central portion and the end portions (in the vicinity of the electrode portions 1a) of the lamp is compensated. When the reflection sheet made of a resilient material is used, the reflection sheet can be fixed utilizing the resiliency by putting the reflection sheet along the inner curved surface of the lamp holder. Instead of the reflection sheet, metal (silver or aluminum) may be evaporated on the inner surface of the lamp holder.

摘要翻译： 灯座11由注射成型等成型用白色合成树脂制成。 由诸如银或铝的高反射率材料制成的反射片12具有切割出的中心部分12a并固定到灯座11的内表面11a上。光到达灯座11的内表面 来自灯1的光由反射片12规则地反射并被反射片12的切口部扩散反射。在白色表面上反射的大部分光到达放电管1的电极部分1a附近， 从电极部1a附近的导光体的入射端面入射。 因此，补偿灯的中心部分和端部（在电极部分1a附近）之间的供电能力的差异。 当使用由弹性材料制成的反射片时，可以通过将反射片沿着灯座的内部曲面放置来利用弹性来固定反射片。 代替反射片，可以在灯座的内表面上蒸发金属（银或铝）。

公开(公告)号：US08739649B2

公开(公告)日：2014-06-03

申请号：US13565066

申请日：2012-08-02

申请人： Masahito Hisada ,  Yoshinori Takano

发明人： Masahito Hisada ,  Yoshinori Takano

IPC分类号： G05G1/08

CPC分类号： G05G1/10 ,  Y10T74/20474

摘要： An operation unit includes a case and an operation member molded integrally through injection molding. The operation member includes an outer surface and a slide portion supported by the case. The slide portion is slidable and movable relative to the case. The operation member further includes a knob operated by an operator, a parting line formed continuously from the slide portion to the knob along the outer surface, and a ridge line formed on the outer surface. At least part of the parting line is formed along the ridge line.

摘要翻译： 操作单元包括通过注射成型一体模制的壳体和操作构件。 操作构件包括外表面和由壳体支撑的滑动部分。 滑动部分相对于壳体是可滑动的和可移动的。 操作构件还包括由操作者操作的旋钮，沿着外表面从滑动部分到旋钮连续形成的分型线和形成在外表面上的脊线。 分离线的至少一部分沿着脊线形成。

公开(公告)号：US06950341B2

公开(公告)日：2005-09-27

申请号：US10119840

申请日：2002-04-11

申请人： Yoshinori Takano ,  Kentaro Watanabe

发明人： Yoshinori Takano ,  Kentaro Watanabe

IPC分类号： G11C7/06 ,  G11C16/28 ,  G11C16/06 ,  G11C7/00

CPC分类号： G11C16/28

摘要： A semiconductor memory device is disclosed which includes an array of memory cells for storing data depending on whether current pull-in is present or absent or alternatively whether it is large or small, a plurality of sense lines with read data of the memory cell array transferred thereto, a reference sense line for common use in data sensing at the plurality of sense lines while being given a reference voltage for the data sense, and a sense amplifier array having a plurality of sense amplifiers for amplifying a difference voltage between the plurality of sense lines and the reference sense line to thereby determine read data.

摘要翻译： 公开了一种半导体存储器件，其包括用于根据当前引入是存在还是不存在而存储数据的存储器单元阵列，或者替代地是大还是小，存储单元阵列的读数据传输的多条感测线 在给定用于数据检测的参考电压的同时，在多个感测线上的数据感测中共同使用的参考感测线，以及具有用于放大多个感测之间的差分电压的多个读出放大器的读出放大器阵列 线和参考感测线，从而确定读取数据。

公开(公告)号：US06477092B2

公开(公告)日：2002-11-05

申请号：US09842693

申请日：2001-04-27

申请人： Yoshinori Takano

发明人： Yoshinori Takano

IPC分类号： G11C700

CPC分类号： G11C16/08

摘要： A first level shifter outputs one of a first potential and a second potential lower than the first potential from an output terminal in accordance with the level of an input signal. A second level shifter outputs one of the first potential and a third potential lower than the second potential from an output terminal in accordance with the output potential from the first level shifter. A third level shifter outputs one of the first and second potentials from an output terminal in accordance with the level of the input signal. A first switching circuit selects the output voltage from the second level shifter when a high-speed operation is required such as in a read operation.

摘要翻译： 第一电平移位器根据输入信号的电平从输出端子输出低于第一电位的第一电位和第二电位中的一个。 第二电平移位器根据来自第一电平移位器的输出电位，从输出端子输出低于第二电位的第一电位和第三电位之一。 第三电平移位器根据输入信号的电平从输出端子输出第一和第二电位之一。 当需要高速操作时，例如在读取操作中，第一开关电路选择来自第二电平移位器的输出电压。