Noise processing device and method thereof
    11.
    发明授权
    Noise processing device and method thereof 有权
    噪声处理装置及其方法

    公开(公告)号:US08059831B2

    公开(公告)日:2011-11-15

    申请号:US11436574

    申请日:2006-05-19

    IPC分类号: H04B15/00

    摘要: A noise processing device and its method are provided for a video/audio system having a high definition multimedia interface (HDMI). The noise processing device includes a detecting unit, a signal generating unit, and a decision unit. The noise processing method includes using the detecting unit to monitor a variation related to an audio signal and generate a detecting signal accordingly; using the signal generating unit to produce an adjustment signal according to the detecting signal; and using the decision unit to produce an output audio signal according to the audio signal and the adjustment signal. Another embodiment of the noise processing device includes a compensation tracking unit having a control unit. The compensation tracking unit produces an output audio signal according to a difference between the output audio signal itself and the audio signal and a gain of the control unit.

    摘要翻译: 为具有高分辨率多媒体接口(HDMI)的视频/音频系统提供噪声处理装置及其方法。 噪声处理装置包括检测单元,信号生成单元和判定单元。 噪声处理方法包括使用检测单元来监视与音频信号相关的变化并相应地生成检测信号; 使用所述信号产生单元根据所述检测信号产生调整信号; 以及使用所述判定单元根据所述音频信号和所述调整信号产生输出音频信号。 噪声处理装置的另一实施例包括具有控制单元的补偿跟踪单元。 补偿跟踪单元根据输出音频信号本身和音频信号之间的差异以及控制单元的增益产生输出音频信号。

    SIGNAL RECEIVING METHOD FOR DETERMINING TRANSMISSION FORMAT OF INPUT SIGNAL AND RELATED SIGNAL RECEIVING CIRCUIT
    12.
    发明申请
    SIGNAL RECEIVING METHOD FOR DETERMINING TRANSMISSION FORMAT OF INPUT SIGNAL AND RELATED SIGNAL RECEIVING CIRCUIT 有权
    用于确定输入信号和相关信号接收电路的传输格式的信号接收方法

    公开(公告)号:US20080298504A1

    公开(公告)日:2008-12-04

    申请号:US12125075

    申请日:2008-05-22

    IPC分类号: H04L27/06

    CPC分类号: H04L25/0272 H04L25/0262

    摘要: The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.

    摘要翻译: 本发明公开了一种用于确定输入信号和相关信号接收电路的传输格式的信号接收方法。 信号接收方法包括:接收输入信号; 根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及根据信号检测结果确定输入信号的传输格式。 信号接收电路包括:输入接口,用于接收输入信号; 检测模块,用于根据所述信号传输通道的输出结果产生与至少多个信号传输通道的信号传输通道相对应的信号检测结果; 以及确定单元,用于根据信号检测结果确定输入信号的传输格式。

    Noise processing device and method thereof
    13.
    发明申请
    Noise processing device and method thereof 有权
    噪声处理装置及其方法

    公开(公告)号:US20060263064A1

    公开(公告)日:2006-11-23

    申请号:US11436574

    申请日:2006-05-19

    IPC分类号: H04N7/00

    摘要: A noise processing device and its method are provided for a video/audio system having a high definition multimedia interface (HDMI). The noise processing device includes a detecting unit, a signal generating unit, and a decision unit. The noise processing method includes using the detecting unit to monitor a variation related to an audio signal and generate a detecting signal accordingly; using the signal generating unit to produce an adjustment signal according to the detecting signal; and using the decision unit to produce an output audio signal according to the audio signal and the adjustment signal. Another embodiment of the noise processing device includes a compensation tracking unit having a control unit. The compensation tracking unit produces an output audio signal according to a difference between the output audio signal itself and the audio signal and a gain of the control unit.

    摘要翻译: 为具有高分辨率多媒体接口(HDMI)的视频/音频系统提供噪声处理装置及其方法。 噪声处理装置包括检测单元,信号生成单元和判定单元。 噪声处理方法包括使用检测单元来监视与音频信号相关的变化并相应地生成检测信号; 使用所述信号产生单元根据所述检测信号产生调整信号; 以及使用所述判定单元根据所述音频信号和所述调整信号产生输出音频信号。 噪声处理装置的另一实施例包括具有控制单元的补偿跟踪单元。 补偿跟踪单元根据输出音频信号本身和音频信号之间的差异以及控制单元的增益产生输出音频信号。

    METHOD AND SYSTEM FOR UPDATING FIRMWARE
    14.
    发明申请
    METHOD AND SYSTEM FOR UPDATING FIRMWARE 审中-公开
    用于更新固件的方法和系统

    公开(公告)号:US20090153574A1

    公开(公告)日:2009-06-18

    申请号:US12275912

    申请日:2008-11-21

    IPC分类号: G09G5/39

    摘要: A system for updating firmware through a DisplayPort interface includes a source device with a DisplayPort interface, and a sink device with a DisplayPort interface. The source device includes a storage circuit for storing and providing an updated firmware, and a source device auxiliary channel for outputting the updated firmware with an auxiliary channel signal format. The sink device includes a sink device auxiliary channel for receiving the updated firmware with the auxiliary channel signal format and thereby generating an output signal, an I2C auxiliary channel device servicer for receiving the output signal and generating an I2C protocol updated firmware, and a memory unit for updating firmware according to the I2C protocol updated firmware. A method for updating firmware is also disclosed.

    摘要翻译: 通过DisplayPort接口更新固件的系统包括具有DisplayPort接口的源设备和具有DisplayPort接口的接收器设备。 源设备包括用于存储和提供更新的固件的存储电路,以及用于以辅助信道信号格式输出更新的固件的源设备辅助通道。 宿设备包括宿设备辅助通道,用于以辅助通道信号格式接收更新的固件,从而生成输出信号,用于接收输出信号并产生I2C协议更新固件的I2C辅助通道设备服务器,以及存储器单元 根据I2C协议更新固件更新固件。 还公开了一种用于更新固件的方法。

    Mode detecting circuit and method thereof
    15.
    发明授权
    Mode detecting circuit and method thereof 有权
    模式检测电路及其方法

    公开(公告)号:US09082332B2

    公开(公告)日:2015-07-14

    申请号:US12128372

    申请日:2008-05-28

    IPC分类号: G09G5/02 G09G5/00

    摘要: The invention discloses a mode detection circuit and a method thereof, for detecting an image signal, the image signal includes a horizontal resolution and the vertical resolution. The mode detection circuit includes a measuring unit, a calculation unit, and a decision unit. The measuring unit receives a clock signal and is used to count the clock signal to output a first counting value and the second counting value. The calculation unit is used to perform the calculation with the first counting value and the second counting value and thereby outputting a calculating value, wherein the calculating value outputted by the calculation unit is corresponding to the ratio of the first counting value to the second counting value. The decision unit is used to determine the horizontal resolution or the vertical resolution according to the calculating value.

    摘要翻译: 本发明公开了一种模式检测电路及其方法,用于检测图像信号,图像信号包括水平分辨率和垂直分辨率。 模式检测电路包括测量单元,计算单元和判定单元。 测量单元接收时钟信号,并用于对时钟信号进行计数以输出第一计数值和第二计数值。 计算单元用于执行具有第一计数值和第二计数值的计算,从而输出计算值,其中由计算单元输出的计算值对应于第一计数值与第二计数值的比率 。 决策单元用于根据计算值确定水平分辨率或垂直分辨率。

    HYBRID PHASE-LOCKED LOOP
    16.
    发明申请
    HYBRID PHASE-LOCKED LOOP 有权
    混合锁相环

    公开(公告)号:US20080094145A1

    公开(公告)日:2008-04-24

    申请号:US11874209

    申请日:2007-10-18

    IPC分类号: H03L7/087 H03L7/00

    摘要: A phase-locked loop (PLL) including a digital PFD, a digital loop filter, a decision circuit, a fractional-N PLL, and a frequency divider is provided. The digital PFD generates a first detection signal according to the phase error or frequency difference between an input signal and a feedback signal. The digital loop filter generates a first control signal according to the first detection signal. The decision circuit generates a divisor value according to the first control signal. The fractional-N PLL generates an oscillation signal according to the divisor value and a reference signal. The frequency divider divides the oscillation signal to produce the feedback signal. The fractional-N PLL includes a fractional-N frequency divider for generating a frequency-divided signal for use in tracking the reference signal according to the divisor value by employing phase swallow means.

    摘要翻译: 提供了包括数字PFD,数字环路滤波器,判决电路,分数N PLL和分频器的锁相环(PLL)。 数字PFD根据输入信号和反馈信号之间的相位误差或频率差产生第一检测信号。 数字环路滤波器根据第一检测信号产生第一控制信号。 决定电路根据第一控制信号产生除数值。 分数N PLL根据除数值和参考信号产生振荡信号。 分频器分频振荡信号产生反馈信号。 分数N PLL包括分数N分频器,用于通过采用相位吞吐装置,根据除数值产生用于跟踪参考信号的分频信号。

    Phase locked loop with nonlinear phase-error response characteristic
    17.
    发明授权
    Phase locked loop with nonlinear phase-error response characteristic 有权
    具有非线性相位误差响应特性的锁相环

    公开(公告)号:US07218177B2

    公开(公告)日:2007-05-15

    申请号:US11160767

    申请日:2005-07-07

    IPC分类号: H03L7/00

    CPC分类号: H03L7/0891 H03L7/093

    摘要: A phase-locked loop includes a phase/frequency detector for generating phase error signal according to a reference signal and an input signal, a charge pump for outputting a voltage signal according to the phase error signal, a voltage-controlled oscillator for outputting an output signal corresponding to the phase error signal according to the voltage signal, an adaptive adjusting unit for outputting a control signal according to the phase error signal, so as to form a nonlinear between the output signal and the phase error signal.

    摘要翻译: 锁相环包括用于根据参考信号和输入信号产生相位误差信号的相位/频率检测器,用于根据相位误差信号输出电压信号的电荷泵,用于输出输出的电压控制振荡器 根据电压信号对应于相位误差信号的信号,自适应调整单元,用于根据相位误差信号输出控制信号,以便在输出信号和相位误差信号之间形成非线性。

    Phase frequency detector used in phase locked loop
    18.
    发明授权
    Phase frequency detector used in phase locked loop 有权
    相位频率检测器用于锁相环

    公开(公告)号:US07102448B2

    公开(公告)日:2006-09-05

    申请号:US10812875

    申请日:2004-03-31

    IPC分类号: H03D13/00

    CPC分类号: H03L7/089

    摘要: A phase frequency detector used in a phase locked loop includes a phase error detecting unit for outputting phase error signals according to a phase error between a first input signal and a second input signal, and a reset unit coupled to the phase error detecting unit. The reset unit outputs reset signals according to the first and second input signals so as to reset the phase error detecting unit without delay time. Thus, it is possible to make the output timing of the phase error signal in a more precisely linear proportion to the phase error value and to enhance the sensitivity of the phase locked loop.

    摘要翻译: 在锁相环中使用的相位频率检测器包括相位误差检测单元,用于根据第一输入信号和第二输入信号之间的相位误差输出相位误差信号,以及耦合到相位误差检测单元的复位单元。 复位单元根据第一和第二输入信号输出复位信号,以便无延迟时间复位相位误差检测单元。 因此,可以使相位误差信号的输出定时与相位误差值更精确地成线性比例,并提高锁相环的灵敏度。

    Hybrid phase-locked loop
    19.
    发明授权
    Hybrid phase-locked loop 有权
    混合锁相环

    公开(公告)号:US07679454B2

    公开(公告)日:2010-03-16

    申请号:US11874209

    申请日:2007-10-18

    IPC分类号: H03L7/00

    摘要: A phase-locked loop (PLL) including a digital PFD, a digital loop filter, a decision circuit, a fractional-N PLL, and a frequency divider is provided. The digital PFD generates a first detection signal according to the phase error or frequency difference between an input signal and a feedback signal. The digital loop filter generates a first control signal according to the first detection signal. The decision circuit generates a divisor value according to the first control signal. The fractional-N PLL generates an oscillation signal according to the divisor value and a reference signal. The frequency divider divides the oscillation signal to produce the feedback signal. The fractional-N PLL includes a fractional-N frequency divider for generating a frequency-divided signal for use in tracking the reference signal according to the divisor value by employing phase swallow means.

    摘要翻译: 提供了包括数字PFD,数字环路滤波器,判决电路,分数N PLL和分频器的锁相环(PLL)。 数字PFD根据输入信号和反馈信号之间的相位误差或频率差产生第一检测信号。 数字环路滤波器根据第一检测信号产生第一控制信号。 决定电路根据第一控制信号产生除数值。 分数N PLL根据除数值和参考信号产生振荡信号。 分频器分频振荡信号产生反馈信号。 分数N PLL包括分数N分频器,用于通过采用相位吞吐装置,根据除数值产生用于跟踪参考信号的分频信号。

    Apparatus and related method for generating output clock
    20.
    发明授权
    Apparatus and related method for generating output clock 有权
    用于产生输出时钟的装置和相关方法

    公开(公告)号:US07663416B2

    公开(公告)日:2010-02-16

    申请号:US11847343

    申请日:2007-08-30

    IPC分类号: H03L7/06

    摘要: An apparatus for generating an audio output clock is disclosed. The apparatus at least includes a plurality of dividers and a frequency synthesizer. The apparatus utilizes the dividers to achieve dispersive frequency-division operations such that the anti-noise ability of the apparatus can be improved. In addition, the apparatus also utilizes dynamic phase adjustment to increase accuracy of the frequency of the audio output clock.

    摘要翻译: 公开了一种用于产生音频输出时钟的装置。 该装置至少包括多个分频器和频率合成器。 该装置利用分频器实现色散分频操作,从而可以提高装置的抗噪声能力。 此外,该装置还利用动态相位调整来提高音频输出时钟频率的精度。