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11.发明授权Digital circuit having delay circuit for adjustment of clock signal timing 有权具有用于调整时钟信号定时的延迟电路的数字电路公开(公告)号：US07274238B2
公开(公告)日：2007-09-25
申请号：US10520429
申请日：2003-07-08
申请人： Eiichi Takahashi , Yuji Kasai , Tetsuya Higuchi
发明人： Eiichi Takahashi , Yuji Kasai , Tetsuya Higuchi
IPC分类号： H03H11/26
CPC分类号： H03L7/07 , H03K5/133 , H03K2005/00026 , H03L7/0805 , H03L7/0812
摘要： A digital circuit according to the present invention includes a pulse delay circuit where a driving current of an inverter is variable, for causing timing of a clock signal to be variable; and the pulse delay circuit has a stabilizing circuit for an amount of a pulse delay by a delay synchronizing loop, and a generating circuit for a pulse delay amount setting voltage with nonlinear characteristics. The present invention makes it possible to realize a timing delay circuit with high resolution, which is not influenced by an operating environment and requires only a small area for the circuit.
摘要翻译： 根据本发明的数字电路包括脉冲延迟电路，其中逆变器的驱动电流是可变的，用于使时钟信号的定时可变; 并且脉冲延迟电路具有用于通过延迟同步环路的脉冲延迟量的稳定电路，以及具有非线性特性的脉冲延迟量设定电压的发生电路。 本发明使得可以实现不受操作环境影响的高分辨率的定时延迟电路，并且仅需要较小的电路面积。
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公开(公告)号：US07248095B2
公开(公告)日：2007-07-24
申请号：US11213779
申请日：2005-08-30
IPC分类号： G05F1/10
CPC分类号： H03K19/0005 , H03K19/018557
摘要： A bus driving device is provided with a driver circuit for driving a bus line thereof. The driver circuit includes an MOS transistor whose well is separated from other circuits. Further, the bus driving device is provided with a voltage control section for adjusting a well voltage, in accordance with a level of a signal in the bus line. With this bus driving device, a threshold voltage of the MOS transistor is set at a predetermined target value.
摘要翻译： 总线驱动装置设有用于驱动总线的驱动电路。 驱动电路包括一个与其他电路分离的MOS晶体管。 此外，总线驱动装置设置有用于根据总线中的信号的电平来调节阱电压的电压控制部。 利用该总线驱动装置，将MOS晶体管的阈值电压设定为规定的目标值。
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公开(公告)号：US20060046668A1
公开(公告)日：2006-03-02
申请号：US11213778
申请日：2005-08-30
CPC分类号： H03F1/0211 , H03F1/02 , H03F1/0205 , H03F1/0261 , H03F3/189 , H03F3/24 , H03F2200/294 , H03F2200/372 , H03F2200/465 , H04B2001/045
摘要： A power consumption controlling apparatus controls power consumption of a high frequency amplifier to reduce the power consumption by adjusting a power supply voltage and a bias voltage of the high frequency amplifier which amplifies a high frequency transmitting signal. The power consumption controlling apparatus includes: a receiving circuit for receiving the high frequency transmitting signal amplified by the high frequency amplifier; an evaluating section for evaluating whether or not a receiving signal obtained from the receiving circuit satisfies a predetermined quality; and an adjusting section for adjusting the power supply voltage and the bias voltage in a range in which the receiving signal evaluated by the evaluating section satisfies the predetermined quality.
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14.发明申请Digital circuit having a delay circuit for adjustment of clock signal timing 有权具有用于调整时钟信号定时的延迟电路的数字电路公开(公告)号：US20060109146A1
公开(公告)日：2006-05-25
申请号：US10520429
申请日：2003-07-08
申请人： Eiichi Takahashi , Yuji Kasai , Tetsuya Higuchi
发明人： Eiichi Takahashi , Yuji Kasai , Tetsuya Higuchi
IPC分类号： H03M7/00
CPC分类号： H03L7/07 , H03K5/133 , H03K2005/00026 , H03L7/0805 , H03L7/0812
摘要： A digital circuit according to the present invention includes a pulse delay circuit where a driving current of an inverter is variable, for causing timing of a clock signal to be variable; and the pulse delay circuit has a stabilizing circuit for an amount of a pulse delay by a delay synchronizing loop, and a generating circuit for a pulse delay amount setting voltage with nonlinear characteristics. The present invention makes it possible to realize a timing delay circuit with high resolution, which is not influenced by an operating environment and requires only a small area for the circuit.
摘要翻译： 根据本发明的数字电路包括脉冲延迟电路，其中逆变器的驱动电流是可变的，用于使时钟信号的定时可变; 并且脉冲延迟电路具有用于通过延迟同步环路的脉冲延迟量的稳定电路，以及具有非线性特性的脉冲延迟量设定电压的发生电路。 本发明使得可以实现不受操作环境影响的高分辨率的定时延迟电路，并且仅需要较小的电路面积。
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公开(公告)号：US07529528B2
公开(公告)日：2009-05-05
申请号：US11213778
申请日：2005-08-30
IPC分类号： H01Q11/12
CPC分类号： H03F1/0211 , H03F1/02 , H03F1/0205 , H03F1/0261 , H03F3/189 , H03F3/24 , H03F2200/294 , H03F2200/372 , H03F2200/465 , H04B2001/045
摘要： A power consumption controlling apparatus controls power consumption of a high frequency amplifier to reduce the power consumption by adjusting a power supply voltage and a bias voltage of the high frequency amplifier which amplifies a high frequency transmitting signal. The power consumption controlling apparatus includes: a receiving circuit for receiving the high frequency transmitting signal amplified by the high frequency amplifier; an evaluating section for evaluating whether or not a receiving signal obtained from the receiving circuit satisfies a predetermined quality; and an adjusting section for adjusting the power supply voltage and the bias voltage in a range in which the receiving signal evaluated by the evaluating section satisfies the predetermined quality.
摘要翻译： 电力消耗控制装置通过调节放大高频发送信号的高频放大器的电源电压和偏置电压来控制高频放大器的功耗来降低功耗。 功率消耗控制装置包括：接收电路，用于接收由高频放大器放大的高频发送信号; 用于评估从接收电路获得的接收信号是否满足预定质量的评估部分; 以及调整部，其在由所述评价部评价的所述接收信号满足所述规定品质的范围内，调整所述电源电压和所述偏置电压。
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公开(公告)号：US20060055449A1
公开(公告)日：2006-03-16
申请号：US11213779
申请日：2005-08-30
IPC分类号： H03K3/01
CPC分类号： H03K19/0005 , H03K19/018557
摘要： A bus driving device is provided with a driver circuit for driving a bus line thereof. The driver circuit includes an MOS transistor whose well is separated from other circuits. Further, the bus driving device is provided with a voltage control section for adjusting a well voltage, in accordance with a level of a signal in the bus line. With this bus driving device, a threshold voltage of the MOS transistor is set at a predetermined target value.
摘要翻译： 总线驱动装置设有用于驱动总线的驱动电路。 驱动电路包括一个与其他电路分离的MOS晶体管。 此外，总线驱动装置设置有用于根据总线中的信号的电平来调节阱电压的电压控制部。 利用该总线驱动装置，将MOS晶体管的阈值电压设定为规定的目标值。
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公开(公告)号：US20070217497A1
公开(公告)日：2007-09-20
申请号：US10582257
申请日：2004-12-03
申请人： Eiichi Takahashi , Tetsuya Higuchi
发明人： Eiichi Takahashi , Tetsuya Higuchi
IPC分类号： H03H17/06
CPC分类号： H03H17/0223 , H03H17/06
摘要： A necessary number of initial stage element circuits, intermediate stage element circuits, and final stage element circuits are connected in cascade and combined in parallel arrangement simultaneously. The partial sum output data on the element circuits is synchronized with the inner partial sum data. In this way, it is possible to configure a high-speed high-order and high-precision FIR filter, i.e., a large-scale digital filter. Thus, it is possible to manufacture a high-order and high-precision FIR filter capable of high-speed operation of 2 GHz or above at a low cost.
摘要翻译： 必须数量的初级元件电路，中间级元件电路和最终级元件电路级联连接并且并联并联。 元件电路上的部分和输出数据与内部部分和数据同步。 以这种方式，可以配置高速高阶和高精度FIR滤波器，即大规模数字滤波器。 因此，能够以低成本制造能够高速运行2GHz以上的高阶高精度FIR滤波器。
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公开(公告)号：US20140083288A1
公开(公告)日：2014-03-27
申请号：US14117950
申请日：2012-04-19
IPC分类号： F04B45/02
CPC分类号： F04B45/02 , F16J3/041 , F16J3/047 , H01G5/01 , H01G5/014 , H01H33/66238 , Y10T29/49877
摘要： A conductive coating layer 2a, 2b is formed on at least one of an inner peripheral side and an outer peripheral side of a base body 2 of bellows 1 by diffusion-bonding. Regarding the diffusion-bonding, the flat conductive coating layer 2a, 2b is layered on at least one end surface side of the plate-shaped base body 2, and these base body 2 and conductive coating layer 2a, 2b are diffusion-bonded. After forming this diffusion-bonded multilayer member into a tubular body by a drawing process, a side wall of the tubular body is formed into a bellows shape. With these processes, it is possible to obtain the bellows that has the conductive coating layer having a more uniform thickness on the base body of the bellows and has extremely good characteristics (the mechanical characteristics and the electric characteristics).
摘要翻译： 导电涂层2a，2b通过扩散粘合形成在波纹管1的基体2的内周侧和外周侧的至少一个上。 关于扩散接合，平板状导体被覆层2a，2b层叠在板状基体2的至少一个端面侧，这些基体2和导电性被覆层2a，2b进行扩散接合。 在通过拉伸工艺将该扩散粘合的多层构件形成管状体之后，将管状体的侧壁形成为波纹管形状。 通过这些方法，可以获得在波纹管的基体上具有更均匀厚度的导电涂层的波纹管，并且具有非常好的特性（机械特性和电特性）。
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公开(公告)号：US08335071B2
公开(公告)日：2012-12-18
申请号：US12743713
申请日：2008-11-07
申请人： Eiichi Takahashi
发明人： Eiichi Takahashi
IPC分类号： H01G5/013
摘要： At least one of the conductive members has a hollow storage portion that is formed at the conductive member and a communication hole through which the storage portion and the vacuum chamber communicate with each other, a getter is set inside the storage portion, and an adsorbed object such as metal particles and gas in a vacuum chamber is adsorbed by the getter. By prevent application of the electric field to the getter, even though the electric field appears in a vacuum casing, a temperature of the getter does not reach a re-release temperature, and also electron stimulus desorption phenomenon does not occur, then it is possible to prevent the metal particles and the gas etc. which have been adsorbed once by the getter from being released.
摘要翻译： 所述导电部件中的至少一个具有形成在所述导电部件上的中空收容部和所述收纳部与所述真空室相互连通的连通孔，所述收容部内设置有吸气体， 例如真空室中的金属颗粒和气体被吸气剂吸附。 通过防止对吸气剂施加电场，即使电场出现在真空壳体中，吸气剂的温度也不会达到再释放温度，也不会发生电子刺激解吸现象， 以防止被吸气剂一次吸附的金属颗粒和气体等被释放。
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公开(公告)号：US20100254066A1
公开(公告)日：2010-10-07
申请号：US12743713
申请日：2008-11-07
申请人： Eiichi Takahashi
发明人： Eiichi Takahashi
IPC分类号： H01G2/22
摘要： At least one of the conductive members has a hollow storage portion that is formed at the conductive member and a communication hole through which the storage portion and the vacuum chamber communicate with each other, a getter is set inside the storage portion, and an adsorbed object such as metal particles and gas in a vacuum chamber is adsorbed by the getter. By prevent application of the electric field to the getter, even though the electric field appears in a vacuum casing, a temperature of the getter does not reach a re-release temperature, and also electron stimulus desorption phenomenon does not occur, then it is possible to prevent the metal particles and the gas etc. which have been adsorbed once by the getter from being released.
摘要翻译： 所述导电部件中的至少一个具有形成在所述导电部件上的中空收容部和所述收纳部与所述真空室相互连通的连通孔，所述收容部内设置有吸气体， 例如真空室中的金属颗粒和气体被吸气剂吸附。 通过防止向吸气剂施加电场，即使电场出现在真空壳体中，吸气剂的温度也不会达到再释放温度，也不会发生电子刺激解吸现象， 以防止被吸气剂一次吸附的金属颗粒和气体等被释放。
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