公开(公告)号：US07443198B1

公开(公告)日：2008-10-28

申请号：US11929287

申请日：2007-10-30

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/177

CPC分类号： H03K19/1778 ,  H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A one input non-volatile-memory-transistor based lookup table is coupled to each of the n data inputs of the multiplexer. The multiplexer has X inputs wherein n=2X as is known in the art. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 一个输入非易失性存储器 - 晶体管的查找表被耦合到多路复用器的每个n个数据输入端。 多路复用器具有如本领域已知的具有n = 2×X的X个输入。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US07321237B2

公开(公告)日：2008-01-22

申请号：US11551973

申请日：2006-10-23

申请人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

发明人： John McCollum ,  Gregory Bakker ,  Jonathan Greene

IPC分类号： G06F7/38 ,  H03K19/173

CPC分类号： H03K19/17728

摘要： A non-volatile-memory-transistor based lookup table for an FPGA includes a n:1 multiplexer. A non-volatile memory transistor is coupled to each of the n inputs of the multiplexer. The multiplexer has x address inputs wherein 2x=n as is known in the art. The output of the multiplexer is coupled to VCC through a pullup transistor. The gate of the pullup transistor is coupled to the output of an address transition detector circuit that has inputs coupled to the address inputs of the multiplexer. A sense amplifier is coupled to the output of the multiplexer.

摘要翻译： 用于FPGA的基于非易失性存储器晶体管的查找表包括n：1多路复用器。 非易失性存储晶体管耦合到多路复用器的n个输入端中的每一个。 如本领域已知的那样，多路复用器具有x地址输入，其中2 = n。 多路复用器的输出通过上拉晶体管耦合到V CC。 上拉晶体管的栅极耦合到具有耦合到多路复用器的地址输入的输入的地址转换检测器电路的输出。 读出放大器耦合到多路复用器的输出端。

公开(公告)号：US20070252616A1

公开(公告)日：2007-11-01

申请号：US11774676

申请日：2007-07-09

申请人： Rabindranath Balasubramanian ,  Limin Zhu ,  Gregory Bakker

发明人： Rabindranath Balasubramanian ,  Limin Zhu ,  Gregory Bakker

IPC分类号： G06F13/00

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and temperature sensing and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with temperature measuring and control circuitry performs temperature measurement and control functions and can be used to create an on-chip temperature log.

摘要翻译： 可编程片上系统集成电路器件包括可编程逻辑块，至少一个用户非易失性存储器块，以及在单个半导体集成电路芯片或倒装芯片上的温度感测和控制模拟和数字电路 面对或其他多模配置。 具有温度测量和控制电路的可编程片上系统芯片集成电路执行温度测量和控制功能，可用于创建片上温度记录。

公开(公告)号：US07129746B1

公开(公告)日：2006-10-31

申请号：US10877043

申请日：2004-06-25

申请人： Rabindranath Balasubramanian ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Rabindranath Balasubramanian ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： An integrated circuit includes a plurality of inputs, a plurality of output pads, a programmable logic block, an analog circuit block, an analog-to-digital converter programmably coupleable to individual analog circuits in the analog circuit block, and an interconnect architecture programmably coupling selected ones of the plurality of inputs, the plurality of outputs, the programmable logic block, the analog circuit block, and the analog-to-digital converter. At least one of the inputs may be programmably configured as one of a digital input programmably coupleable to elements in the programmable logic block or as an analog input to an analog circuit in the analog circuit block.

公开(公告)号：US20060132250A1

公开(公告)日：2006-06-22

申请号：US11022331

申请日：2004-12-21

申请人： Gregory Bakker

发明人： Gregory Bakker

IPC分类号： H03B5/20

CPC分类号： H03K3/0231 ,  H03K3/011 ,  H03L1/022

摘要： An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and an output. A second comparator has an inverting input coupled to the RC network, a non-inverting input coupled to a second reference voltage, and an output. A set-reset flip-flop has a set input coupled to the output of the first comparator, a reset input coupled to the output of the second comparator, and an output coupled to the input of the inverter. Differential amplifiers in the comparators each have a diode-connected p-channel MOS transistor controlling a mirrored p-channel MOS transistor whose channel width is less than that of the diode-connected p-channel current mirror transistor.

公开(公告)号：US07859302B2

公开(公告)日：2010-12-28

申请号：US12555492

申请日：2009-09-08

申请人： Rabindranath Balasubramanian ,  Gregory Bakker

发明人： Rabindranath Balasubramanian ,  Gregory Bakker

IPC分类号： H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.

摘要翻译： 可编程片上系统芯片集成电路器件包括可编程逻辑块，至少一个用户非易失性存储器块，以及在单个半导体集成电路芯片或倒装芯片上的电压测量和控制模拟和数字电路， 面对面或其他多芯片配置。 具有电压测量，电流测量和控制电路的可编程片上系统芯片集成电路执行电压测量和控制功能，可用于控制和监视连接到外部负载的外部电源。

公开(公告)号：US20100134142A1

公开(公告)日：2010-06-03

申请号：US12701068

申请日：2010-02-05

申请人： Gregory Bakker ,  Joel Landry ,  William C. Plants

发明人： Gregory Bakker ,  Joel Landry ,  William C. Plants

IPC分类号： H03K19/177

CPC分类号： H03K19/1733 ,  G06F17/5054

摘要： A computer program product in a computer-readable medium for use in a microcontroller-based control system in a programmable logic integrated circuit device. The computer program product comprises first instructions for initializing the device, second instructions for reading programming data from a data source external to the programmable logic integrated circuit device, third instructions for transferring the programming data into control elements internal to the device. Provision is made for fourth instructions for saving a part of the internal logic state of the user logic programmed into the device into a non-volatile memory block and for fifth instructions for restoring a part of the internal logic state of the user logic programmed into the device from a non-volatile memory block. The device comprises a microcontroller block and a programmable logic block with programming circuitry, and has a sub-bus which couples the microcontroller block to the programming circuitry.

摘要翻译： 一种用于可编程逻辑集成电路装置中的基于微控制器的控制系统的计算机可读介质中的计算机程序产品。 计算机程序产品包括用于初始化设备的第一指令，用于从可编程逻辑集成电路设备外部的数据源读取编程数据的第二指令，用于将编程数据传送到设备内部的控制元件中的第三指令。 提供了用于将编程到设备中的用户逻辑的内部逻辑状态的一部分保存到非易失性存储器块中的第四指令，以及用于恢复被编程到该非易失性存储器块中的用户逻辑的内部逻辑状态的一部分的第五指令 设备从非易失性存储器块。 该器件包括微控制器模块和具有编程电路的可编程逻辑模块，并且具有将微控制器模块耦合到编程电路的子总线。

公开(公告)号：US07603578B2

公开(公告)日：2009-10-13

申请号：US12350419

申请日：2009-01-08

申请人： Rabindranath Balasubramanian ,  Gregory Bakker

发明人： Rabindranath Balasubramanian ,  Gregory Bakker

IPC分类号： G06F1/26

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device includes a programmable logic block, at least one user non-volatile memory block, and voltage-measuring and control analog and digital circuits on a single semiconductor integrated circuit chip or a flip chip, face-to-face, or other multiple die configuration. The programmable system-on-a-chip integrated circuit with voltage-measuring, current-measuring and control circuitry performs voltage measurement and control functions and can be used to control and monitor external power supplies connected to external loads.

公开(公告)号：US07501872B2

公开(公告)日：2009-03-10

申请号：US11871741

申请日：2007-10-12

申请人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

发明人： Shin-Nan Sun ,  Limin Zhu ,  Theodore Speers ,  Gregory Bakker

IPC分类号： H03K3/00

CPC分类号： H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises at least one of a crystal oscillator circuit, an RC oscillator circuit, and an external oscillator input. A clock conditioning circuit is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A real-time clock is selectively coupleable to one of the programmable logic block, the crystal oscillator circuit, the RC oscillator circuit, and the external oscillator input. A programmable logic block is coupled to the clock conditioning circuit and the real-time clock.

公开(公告)号：US20090031194A1

公开(公告)日：2009-01-29

申请号：US11829335

申请日：2007-07-27

申请人： Vidyadhara Bellipaddy ,  Gregory Bakker

发明人： Vidyadhara Bellipaddy ,  Gregory Bakker

IPC分类号： G11C29/00

CPC分类号： H03K19/1776 ,  G06F11/1052 ,  G11C2029/0411 ,  H03K19/17764

摘要： A method and apparatus are provided for an error-correcting FPGA. ECC data for configuration is generated and programmed into the ECC rows in the configuration memory. While booting, it is determined whether an integrity-check bit is set. If so, an integrity check is performed. If a single-bit error is detected, if the bit error is an erroneous “0” value, the memory location containing the erroneous “0” value is reprogrammed to a “1” value. If the bit error is an erroneous “1,” value, the memory block data is saved in a non-volatile memory block, the configuration memory block containing the error is erased and reprogrammed using the corrected bit. If there is more than one error, an error flag is set. The user reads the status of the error flag through the JTAG port. If the error flag is set then a full reprogramming cycle is initiated.

摘要翻译： 提供了用于纠错FPGA的方法和装置。 生成用于配置的ECC数据并将其编程到配置存储器中的ECC行中。 在引导时，确定是否设置完整性校验位。 如果是这样，则执行完整性检查。 如果检测到单位错误，如果位错误是错误的“0”值，则包含错误“0”值的存储器位置被重新编程为“1”值。 如果位错误是错误的“1”值，则存储器块数据被保存在非易失性存储器块中，包含该错误的配置存储器块被擦除并且使用校正位被重新编程。 如果存在多个错误，则设置错误标志。 用户通过JTAG端口读取错误标志的状态。 如果设置了错误标志，则启动完整的重新编程周期。