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公开(公告)号：US10686409B2
公开(公告)日：2020-06-16
申请号：US15991980
申请日：2018-05-29
Applicant: pSemi Corporation
Inventor： Kashish Pal , Emre Ayranci , Miles Sanner
Abstract: An amplifier circuit configuration capable of processing non-contiguous intra-band carrier aggregate (CA) signals using amplifiers is disclosed herein. In some cases, each of a plurality of amplifiers is an amplifier configured as a cascode (i.e., a two-stage amplifier having two transistors, the first configured as a “common source” input transistor, e.g., input field effect transistor (FET), and the second configured in a “common gate” configuration as a cascode output transistor, (e.g. cascode output FET). In other embodiments, the amplifier may have additional transistors (i.e., more than two stages and/or stacked transistors). The amplifier circuit configuration can be operated in either single mode or split mode. A switchable coupling is placed between the drain of the input FETs of each amplifier within the amplifier circuit configuration. During split mode, the coupling is added to the circuit to allow some of the signal present at the drain of each input FET to be coupled to the drain of the other input FET.
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12.发明授权公开(公告)号：US10476453B2
公开(公告)日：2019-11-12
申请号：US15910924
申请日：2018-03-02
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Miles Sanner
IPC: H03F1/22 , H03F3/191 , H03F3/195 , H03F1/02 , H03H11/28 , H04B1/16 , H03H7/38 , H03F1/56 , H03F3/193 , H03F3/72 , H04B1/00
Abstract: A front end circuit architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.
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公开(公告)号：US10199996B2
公开(公告)日：2019-02-05
申请号：US15613017
申请日：2017-06-02
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Miles Sanner , Edward Nicholas Comfoltey
Abstract: A high performance low noise amplifier integrated circuit having multiple low noise amplifiers enabling operation over a wide range for frequencies is disclosed. In particular, an auxiliary input is provided to the low noise amplifier integrated circuit that can be routed to one of several low noise amplifiers, each tuned to operate efficiently in different frequency ranges.
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公开(公告)号：US11881828B2
公开(公告)日：2024-01-23
申请号：US17671374
申请日：2022-02-14
Applicant: pSemi Corporation
Inventor： Jing Li , Emre Ayranci , Miles Sanner
CPC classification number: H03G3/3036 , H03F1/223 , H03F1/3205 , H03F3/193 , H03F3/211 , H03F3/72 , H03G1/0023 , H03G1/0029 , H03G1/0088 , H03G3/001 , H03F2200/156 , H03F2200/159 , H03F2200/294 , H03F2200/451 , H03F2200/489 , H03F2200/492 , H03F2200/61 , H03F2203/7239 , H03G3/3052 , H03G2201/504
Abstract: A multi-gain LNA with inductive source degeneration is presented. The inductive source degeneration is provided via a tunable degeneration network that includes an inductor in parallel with one or more switchable shunting networks. Each shunting network includes a shunting capacitor that can selectively be coupled in parallel to the inductor. A capacitance of the shunting capacitor is calculated so that a combined impedance of the inductor and the shunting capacitor at a narrowband frequency of operation is effectively an inductance. The inductance is calculated according to a desired gain of the LNA. According to one aspect, the switchable shunting network includes a resistor in series connection with the shunting capacitor to provide broadband frequency response stability of the tunable degeneration network. According to another aspect, the LNA includes a plurality of selectable branches to further control gain of the LNA.
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公开(公告)号：US20240022220A1
公开(公告)日：2024-01-18
申请号：US18352136
申请日：2023-07-13
Applicant: pSemi Corporation
Inventor： Miles Sanner , Emre Ayranci
CPC classification number: H03F3/195 , H03F3/211 , H03F1/56 , H03F3/193 , H03F3/72 , H03F1/223 , H03F3/16 , H03F1/0211 , H03F2203/7209 , H03F2200/391 , H03F2200/249 , H03F2200/421 , H03F2200/489 , H03F2200/372 , H03F2200/111 , H03F2200/222 , H03F2200/231 , H03F2200/267 , H03F2200/294 , H03F2200/387 , H03F2200/396 , H03F2200/451 , H03F2200/492 , H04B1/16
Abstract: A receiver front end having low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. A drain switch is provided between the drain terminals of input FETs to place the input FETs in parallel. This increases the g m of the input stage of the amplifier, thus improving the noise figure of the amplifier.
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Patent Agency Ranking
公开(公告)号：US20240007060A1
公开(公告)日：2024-01-04
申请号：US17855443
申请日：2022-06-30
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Mengsheng Rui , Phanindra Yerramilli , Jubaid Qayyum , Vijay Katta , Miles Sanner
CPC classification number: H03F1/565 , H03F3/195 , H03F3/72 , H03F2200/451 , H03F2200/294 , H03F2203/7236
Abstract: Circuits and methods for a radio frequency amplifier, such as an LNA, that include a wideband coupled input impedance matching network. One embodiment includes a first inductor coupled between a first terminal and a first node, the first terminal couplable to a degeneration terminal of an amplifier core; a second inductor coupled between a second terminal and either the first node or a second node, the second terminal couplable to an input terminal of the amplifier core; a third inductor coupled between the first node and a third terminal, the third terminal couplable to a reference potential; and, in a variant embodiment, a fourth inductor coupled between the second node and a fourth terminal, the fourth terminal couplable to the reference potential; wherein the first inductor and the second inductor are mutually coupled. Some embodiments allow multiple modes to allow tradeoffs of gain versus linearity and NF characteristics.
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公开(公告)号：US20240007058A1
公开(公告)日：2024-01-04
申请号：US17855386
申请日：2022-06-30
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Mengsheng Rui , Miles Sanner , Steve Gao
CPC classification number: H03F1/565 , H03F3/195 , H03H7/00 , H03F2200/222 , H03F2200/451 , H03F2200/387 , H03F2200/294
Abstract: Circuits and methods for an amplifier (particularly LNAs) that achieve wideband output impedance matching and high gain while simultaneously rejecting out-of-band (OOB) harmonic frequencies. Some embodiments allow multiple modes of operation to allow selection of gain versus linearity characteristics. One aspect of the present invention is improvement of the linearity and sensitivity of a whole RF “front end” (RFFE) receiver chain by suppressing OOB gain within an LNA component at higher order harmonic frequencies. Another aspect of the present invention are new wideband and ultra-wideband LNA load circuits that, while achieving high frequency OOB rejection, maintain in-band high gain and wideband output impedance matching at the same time. Yet another aspect of the present invention are new ultra-wideband LNA output impedance matching circuits.
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公开(公告)号：US20220393650A1
公开(公告)日：2022-12-08
申请号：US17337227
申请日：2021-06-02
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Mengsheng Rui , Jubaid Qayyum
Abstract: Circuits and methods for a multi-gain mode amplifier, particularly an LNA, that achieves wideband output impedance matching and high gain while maintaining low power and a low NF in a highest gain mode, and which can switch to one or more lower gain modes that achieve higher linearity with lower power. In a highest gain mode, an inductor is selectively inserted between the amplified-signal terminal of an amplification core and an output LC output matching network. The inductor, when inserted, provides wideband output impedance matching, functioning as a series peaking inductor; accordingly, the inserted inductor delays current flow to the output capacitor and lowers the rise time of signal changes across the output capacitor. In addition, higher gain can be achieved compared to a conventional LC output impedance matching topology due to a higher impedance at the amplified-signal terminal of the amplification core.
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公开(公告)号：US20210409055A1
公开(公告)日：2021-12-30
申请号：US17366614
申请日：2021-07-02
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Miles Sanner , Phanindra Yerramilli
Abstract: Methods and devices addressing design of wideband LNAs with gain modes are disclosed. The disclosed teachings can be used to reconfigure RF receiver front-end to operate in various applications imposing stringent and conflicting requirements. Wideband and narrowband input and output matching with gain modes using a combination of the same hardware and a switching network are also disclosed. The described methods and devices also address carrier aggregation requirements and provide solutions that can be used both in single-mode and split-mode operations.
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公开(公告)号：US20210336584A1
公开(公告)日：2021-10-28
申请号：US17314836
申请日：2021-05-07
Applicant: pSemi Corporation
Inventor： Emre Ayranci , Miles Sanner
Abstract: A receiver front end amplifier capable of receiving and processing intraband non-contiguous carrier aggregate (CA) signals using multiple low noise amplifiers (LNAs) is disclosed herein. A cascode having a “common source” configured input FET and a “common gate” configured output FET can be turned on or off using the gate of the output FET. A first switch is provided that allows a connection to be either established or broken between the source terminal of the input FET of each LNA. Further switches used for switching degeneration inductors, gate capacitors, and gate to ground capacitors for each leg can be used to further improve the matching performance of the invention.
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