公开(公告)号：US12095373B2

公开(公告)日：2024-09-17

申请号：US17680745

申请日：2022-02-25

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE TECHNOLOGIES CORPORATION

Inventor： Hideya Matsunaga ,  Kouhei Shinomiya

IPC: H02P27/08 ,  H02M1/00 ,  H02M1/08 ,  H02M3/158 ,  H02M7/5387 ,  H02P21/22

CPC classification number: H02M3/1586 ,  H02M1/0058 ,  H02M1/08 ,  H02M7/53871 ,  H02P21/22 ,  H02P27/08 ,  H02P2201/11

Abstract: In a power conversion apparatus, first to xth converters are connected in parallel to each other. A control unit outputs, based on command information related to an output of the power conversion apparatus, control information. A pulse generator selects, based on the control information, a number n of converters from the first to xth converters, n being an integer more than or equal to 2 and smaller than x. The number n is defined as a multiply-driven number n. The pulse generator generates, based on the control information, at least one multiple drive-pulse train that comprises n drive pulses for multiply driving the n selected converters. A variable determiner changes the multiply-driven number n.

公开(公告)号：US20240304674A1

公开(公告)日：2024-09-12

申请号：US18539610

申请日：2023-12-14

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Kazuki IKEYAMA

IPC: H01L29/20 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/2003 ,  H01L29/1095 ,  H01L29/66712 ,  H01L29/7802

Abstract: A nitride semiconductor device includes: a conductive layer; a protruding region of a nitride semiconductor provided on at least a part of an upper surface of the conductive layer; and an n-type drift layer provided above the conductive layer. The drift layer includes a tapered region having an upward tapered shape above the protruding region. The nitride semiconductor device further includes a p-type body layer adjacent to the tapered region of the drift layer. The drift layer and the body layer are an epitaxial layer.

公开(公告)号：US20240291160A1

公开(公告)日：2024-08-29

申请号：US18394770

申请日：2023-12-22

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： JUNGAUN LEE ,  TOSHIFUMI SHIROSAKI ,  TAKAHIRO KATO ,  HIROKAZU OYABU ,  TOSHIHIKO TAKAHATA

IPC: H01Q13/18 ,  H01Q1/42

CPC classification number: H01Q13/18 ,  H01Q1/422

Abstract: Each of first, second, and third stacked parts includes a resin member a conductive film that covers the resin member. The first, second, and third stacked parts are stacked one another. The first stacked part has an external port to propagate radio waves to an external device. The second stacked part has an intermediate passage to propagate the radio waves therethrough. The third stacked part has antenna radiating elements to propagate the radio waves to an external space. The first stacked part and the second stacked part are stacked to form a waveguide that is extended. The waveguide is connected to the external port of the first stacked part and to one end of the intermediate passage to propagate the radio waves therethrough. The antenna radiating elements are coupled to the one end of the intermediate passage.

公开(公告)号：US12073087B2

公开(公告)日：2024-08-27

申请号：US18173880

申请日：2023-02-24

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Tetsuro Takizawa

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0659 ,  G06F3/0673

Abstract: A memory controller issues a command to a semiconductor memory device in response to an access request from an arithmetic unit to the semiconductor memory device having multiple ranks. The memory controller includes an access request holder, an access request selector, a command generator, a refresh interval counter and a refresh counter. The access request selector calculates a total processing period for each of the ranks, selects multiple access requests as an access request group sent to an access target rank, and determines a processing order of the access requests in the selected access request group. The command generator issues an access command to the access target rank in order, and issues a refresh command to a refresh target rank.

公开(公告)号：US20240250166A1

公开(公告)日：2024-07-25

申请号：US18533354

申请日：2023-12-08

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Hidemoto TOMITA

IPC: H01L29/78 ,  H01L21/18 ,  H01L29/10 ,  H01L29/16 ,  H01L29/66

CPC classification number: H01L29/7813 ,  H01L21/187 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/66068

Abstract: A trench gate semiconductor device includes a semiconductor substrate, first and second trenches, a gate insulating film, a gate electrode, and an upper electrode. The semiconductor substrate includes an n-type first semiconductor region in contact with the upper electrode, a p-type body region extending from the gate insulating film in the first trench to the gate insulating film in the second trench below the first semiconductor region, and an n-type second semiconductor region extending from the gate insulating film in the first trench to the gate insulating film in the second trench below the body region. A maximum value of a distance between the first trench and the second trench in a depth range in which the body region is disposed is less than 200 nm. The distance between the first trench and the second trench at the upper surface of the semiconductor substrate is larger than the maximum value.

公开(公告)号：US20240243743A1

公开(公告)日：2024-07-18

申请号：US18537108

申请日：2023-12-12

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Takasuke ITO ,  Shigeki OTSUKA ,  Yoshikazu FURUTA ,  Tomohiro NEZUKA

IPC: H03K17/687 ,  H03K19/20

CPC classification number: H03K17/6871 ,  H03K19/20

Abstract: A deterioration inhibiting circuit includes a switchover circuit that inhibits characteristic deterioration of first and second transistors included in a differential pair circuit having first and second input terminals. A gate of the first transistor is connected to the first input terminal, and a gate of the second transistor is connected to the second input terminal. The switchover circuit executes switchover between a first state and a second state. In the first state, a first voltage is applied to the gate of the first transistor and a second voltage is applied to the gate of the second transistor. In the second state, the second voltage is applied to the gate of the first transistor and the first voltage is applied to the gate of the second transistor. the first voltage is higher than an intermediate voltage, and the second voltage is lower than the intermediate voltage.

公开(公告)号：US20240243199A1

公开(公告)日：2024-07-18

申请号：US18524036

申请日：2023-11-30

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： MASATO NOBORIO

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/739

CPC classification number: H01L29/7813 ,  H01L29/4236 ,  H01L29/7397

Abstract: A first impurity region and a second impurity region are alternately formed along a longitudinal direction of a first trench. The second impurity region has: a first contact side in contact with the first trench; and a second contact side in contact with a second trench adjacent to the first trench. A first linear portion is defined to extend from a boundary of the first contact side toward the second trench, and a second linear portion is defined to extend from a boundary of the second contact side toward the first trench. A first angle between the first trench and the first linear portion connected to the first contact side is less than 90° and a second angle between the second trench and the second linear portion connected to the second contact side is less than 90° .

公开(公告)号：US20240234515A9

公开(公告)日：2024-07-11

申请号：US18471463

申请日：2023-09-21

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Hideyuki UEHIGASHI

IPC: H01L29/36 ,  C30B29/36 ,  H01L29/16 ,  H01L29/78 ,  H01L29/872

CPC classification number: H01L29/36 ,  C30B29/36 ,  H01L29/1608 ,  H01L29/7813 ,  H01L29/872 ,  C30B25/20

Abstract: A silicon carbide wafer includes a substrate made of silicon carbide and an epitaxial layer made of silicon carbide and disposed on the substrate. A concentration of carbon vacancies in the substrate and the epitaxial layer continuously decreases from the substrate toward the epitaxial layer. The concentration of the carbon vacancies in the substrate is 3.0×1015 cm−3 or more.

公开(公告)号：US20240213332A1

公开(公告)日：2024-06-27

申请号：US18507621

申请日：2023-11-13

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： HIDEYUKI UEHIGASHI

IPC: H01L29/36 ,  H01L29/16

CPC classification number: H01L29/36 ,  H01L29/1608 ,  H01L29/7813

Abstract: A silicon carbide wafer includes: a substrate made of silicon carbide; and an epitaxial layer made of silicon carbide and arranged on the substrate. A chip formation region is defined in which a semiconductor element is formed, and an outer peripheral region is defined to surround the chip formation region. The epitaxial layer has a trap density of 1.0×1013 cm−3 or less at an activation energy of 0.10 to 0.20 eV derived by a DLTS method in the chip formation region. The substrate has a Ti density of 1.0×1017 cm−3 or less measured by a SIMS method and a Cr density of 1.0×1017 cm−3 or less measured by a SIMS method.

公开(公告)号：US20240213019A1

公开(公告)日：2024-06-27

申请号：US18531929

申请日：2023-12-07

Applicant: DENSO CORPORATION ,  TOYOTA JIDOSHA KABUSHIKI KAISHA ,  MIRISE Technologies Corporation

Inventor： Hiroaki FUJIBAYASHI

IPC: H01L21/02 ,  H01L21/67

CPC classification number: H01L21/02378 ,  H01L21/0262 ,  H01L21/67098

Abstract: In a silicon carbide wafer manufacturing apparatus, a cooling unit is capable of cooling a separation space to 400° C. or lower, and a supply pipe includes a dopant gas supply pipe through which an ammonia-based gas included in a reactant gas is to be supplied, a growth gas supply pipe through which a growth gas containing a silane-based gas and a chlorine-based gas and included in the reactant gas is to be supplied, and an inert gas supply pipe through which an inert gas included in the reactant gas is to be supplied between a portion of the separation space to which the ammonia-based gas is to be supplied and a portion of the separation space to which the chlorine-based gas is to be supplied.