公开(公告)号：US20100178933A1

公开(公告)日：2010-07-15

申请号：US12667387

申请日：2008-09-03

Applicant: Zhongda Du ,  Peng Hao ,  Junfeng Zhang ,  Bin Yu

Inventor： Zhongda Du ,  Peng Hao ,  Junfeng Zhang ,  Bin Yu

IPC: H04W24/00

CPC classification number: H04W74/08 ,  H04W4/06 ,  H04W8/26

Abstract: A terminal random access method for a cellular radio communications system and a method for generating a group identifier are provided. The terminal random access method for a cellular radio communications system includes steps of: transmitting random access preamble message by a terminal to a base station in a random access time slot in a radio frame; combining location information of the random access time slot in the radio frame and that in the frequency domain to generate a group identifier and sending a random access response message to the terminal after adding the group identifier and an individual identifier that corresponds to the random access preamble message to the random access response message by the base station; judging whether the random access response message that corresponds to the sent random access preamble message is received, by judging whether the group identifier and the individual identifier within the received random access response message are all expected values. This invention provides fast and accurate access to the cellular radio communications system for the terminal and allows simple and easy operations to set a group identifier in the same way regardless of whether or not the configuration of the random access time slot changes.

Abstract translation: 提供了用于蜂窝无线电通信系统的终端随机接入方法和用于生成组标识符的方法。 蜂窝无线电通信系统的终端随机接入方法包括以下步骤：在无线电帧中的随机接入时隙中向终端发送随机接入前同步码消息; 组合无线帧中的随机接入时隙的位置信息和频域中的随机接入时隙的位置信息，以生成组标识符，并且在添加组标识符和对应于随机接入前导码的单个标识符之后向终端发送随机接入响应消息 由基站向随机接入响应消息发送消息; 通过判断接收到的随机接入响应消息中的组标识符和个人标识符是否都是期望值来判断是否接收到与所发送的随机接入前导消息相对应的随机接入响应消息。 本发明提供对终端的蜂窝无线电通信系统的快速和准确的访问，并且允许简单和容易的操作以相同的方式设置组标识符，而不管随机接入时隙的配置是否改变。

公开(公告)号：US07655497B1

公开(公告)日：2010-02-02

申请号：US11513431

申请日：2006-08-25

Applicant: Bin Yu ,  Xuhui Sun ,  Meyya Meyyappan

Inventor： Bin Yu ,  Xuhui Sun ,  Meyya Meyyappan

IPC: H01L21/00

CPC classification number: B82Y30/00 ,  C30B11/12 ,  C30B25/00 ,  C30B29/46 ,  C30B29/52 ,  H01L45/06 ,  H01L45/144 ,  H01L45/1608 ,  Y10S977/70 ,  Y10S977/902

Abstract: A method for growth of an alloy for use in a nanostructure, to provide a resulting nanostructure compound including at least one of GexTey, InxSby, InxSey, SbxTey, GaxSby, GexSby,Tez, InxSbyTez, GaxSeyTez, SnxSbyTez, InxSbyGez, GewSnxSbyTez, GewSbxSeyTez, and TewGexSbySz, where w, x, y and z are numbers consistent with oxidization states (2, 3, 4, 5, 6) of the corresponding elements. The melt temperatures for some of the resulting compounds are in a range 330-420° C., or even lower with some compounds.

Abstract translation: 一种用于生长用于纳米结构的合金的方法，以提供所得纳米结构化合物，其包括GexTey，InxSby，InxSey，SbxTey，GaxSby，GexSby，Tez，InxSbyTez，GaxSeyTez，SnxSbyTez，InxSbyGez，GewSnxSbyTez，GewSbxSeyTez， 和TewGexSbySz，其中w，x，y和z是与相应元素的氧化态（2,3,4,5,6）一致的数字。 一些所得化合物的熔融温度在330-420℃的范围内，或者甚至更低一些化合物。

公开(公告)号：US20090061464A1

公开(公告)日：2009-03-05

申请号：US12176942

申请日：2008-07-21

Applicant: Kalle LEVON ,  Bin Yu ,  Yanxiu Zhou

Inventor： Kalle LEVON ,  Bin Yu ,  Yanxiu Zhou

IPC: G01N33/554

CPC classification number: C12Q1/00 ,  C07K9/00 ,  C07K14/32 ,  C07K17/00 ,  C12Q1/003 ,  G01N33/53 ,  G01N33/54353 ,  G01N33/5438 ,  G01N33/54393 ,  G01N33/552

Abstract: A real-time method employing a portable peptide-containing potentiometric biosensor, can directly detect and/or quantify bacterial spores. Two peptides for specific recognition of B. subtilis and B. anthracis Sterne may be immobilized by a polysiloxane monolayer immobilization (PMI) technique. The sensors translate the biological recognition event into a potential change by detecting, for example, B. subtilis spores in a concentration range of 0.08-7.3×104 CFU/ml. The sensing method exhibited highly selective recognition properties towards Bacillus subtilis spores over other kinds of spores. The selectivity coefficients of the sensors for other kinds of spores are in the range of 0-1.0×10−5. The biosensor method not only has the specificity to distinguish Bacillus subtilis spores in a mixture of B. subtilis and B. thuringiensis (thur.) Kurstaki spores, but also can discriminate between live and dead B. subtilis spores. Furthermore, the sensing method can distinguish a Bacillus subtilis 1A700 from other B. subtilis strain. Assay time may be as low as about 5 minutes for a single test. Rapid identification of B. anthracis Sterne and B. anthracis ΔAmes was also provided.

Abstract translation: 采用便携式含肽电位生物传感器的实时方法可以直接检测和/或定量细菌孢子。 用于特异性识别枯草芽孢杆菌和炭疽芽孢杆菌的两种肽可以通过聚硅氧烷单层固定（PMI）技术来固定。 传感器通过检测例如浓度范围为0.08-7.3×10 4 CFU / ml的枯草芽孢杆菌孢子将生物识别事件转化为潜在的变化。 该感测方法在其他种类的孢子上表现出对枯草芽孢杆菌孢子的高选择性识别性能。 其他类型孢子的传感器的选择性系数在0-1.0x10-5的范围内。 生物传感器方法不仅具有区分枯草芽孢杆菌和苏云金芽孢杆菌（Thur。）Kurstaki孢子的混合物中的枯草芽孢杆菌孢子的特异性，而且可以区分活枯枯病芽孢杆菌孢子和死枯病芽孢杆菌孢子。 此外，感测方法可以将枯草芽孢杆菌1A700与其他枯草芽孢杆菌菌株区分开。 单次测试的测定时间可能低至约5分钟。 炭疽杆菌和炭疽杆菌的快速鉴定也提供了DeltaAmes。

公开(公告)号：US07498225B1

公开(公告)日：2009-03-03

申请号：US11428722

申请日：2006-07-05

Applicant: Haihong Wang ,  Shibly S. Ahmed ,  Ming-Ren Lin ,  Bin Yu

Inventor： Haihong Wang ,  Shibly S. Ahmed ,  Ming-Ren Lin ,  Bin Yu

IPC: H01L21/336 ,  H01L21/3205 ,  H01L21/4763

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/02672 ,  H01L29/785

Abstract: A method for forming fin structures for a semiconductor device that includes a substrate and a dielectric layer formed on the substrate is provided. The method includes etching the dielectric layer to form a first structure, depositing an amorphous silicon layer over the first structure, and etching the amorphous silicon layer to form second and third fin structures adjacent first and second side surfaces of the first structure. The second and third fin structures may include amorphous silicon material. The method further includes depositing a metal layer on upper surfaces of the second and third fin structures, performing a metal-induced crystallization operation to convert the amorphous silicon material of the second and third fin structures to a crystalline silicon material, and removing the first structure.

Abstract translation: 提供了一种用于形成半导体器件的鳍结构的方法，该半导体器件包括衬底和形成在衬底上的电介质层。 该方法包括蚀刻介电层以形成第一结构，在第一结构上沉积非晶硅层，以及蚀刻非晶硅层以形成与第一结构的第一和第二侧表面相邻的第二和第三鳍结构。 第二和第三鳍结构可以包括非晶硅材料。 该方法还包括在第二和第三鳍结构的上表面上沉积金属层，执行金属诱导结晶操作以将第二鳍和第三鳍结构的非晶硅材料转化成晶体硅材料，并且去除第一结构 。

公开(公告)号：US07432558B1

公开(公告)日：2008-10-07

申请号：US10863392

申请日：2004-06-09

Applicant: Shibly S. Ahmed ,  Judy Xilin An ,  Srikanteswara Dakshina-Murthy ,  Cyrus E. Tabery ,  Bin Yu

Inventor： Shibly S. Ahmed ,  Judy Xilin An ,  Srikanteswara Dakshina-Murthy ,  Cyrus E. Tabery ,  Bin Yu

IPC: H01L29/72

CPC classification number: H01L29/045 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device may include a substrate and an insulating layer formed on the substrate. A fin may be formed on the insulating layer. The fin may include a side surface and a top surface, and the side surface may have a orientation. A first gate may be formed on the insulating layer proximate to the side surface of the fin.

Abstract translation: 半导体器件可以包括衬底和形成在衬底上的绝缘层。 可以在绝缘层上形成翅片。 翅片可以包括侧表面和顶表面，并且侧表面可以具有<100>取向。 第一栅极可以形成在靠近鳍片的侧表面的绝缘层上。

公开(公告)号：US07279735B1

公开(公告)日：2007-10-09

申请号：US10838215

申请日：2004-05-05

Applicant: Bin Yu ,  Haihong Wang

Inventor： Bin Yu ,  Haihong Wang

IPC: H01L29/788

CPC classification number: H01L29/7883 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/785

Abstract: A non-volatile memory device includes a substrate, an insulating layer, a fin structure, a floating gate, an inter-gate dielectric and a control gate. The insulating layer is formed on the substrate and the fin structure is formed on the insulating layer. The fin structure may include a strained layer formed on a non-strained layer.

Abstract translation: 非易失性存储器件包括衬底，绝缘层，翅片结构，浮动栅极，栅极间电介质和控制栅极。 绝缘层形成在基板上，翅片结构形成在绝缘层上。 翅片结构可以包括形成在非应变层上的应变层。

公开(公告)号：US20070118868A1

公开(公告)日：2007-05-24

申请号：US11286651

申请日：2005-11-23

Applicant: Cha Zhang ,  Bin Yu ,  Yong Rui

Inventor： Cha Zhang ,  Bin Yu ,  Yong Rui

IPC: H04N7/173

CPC classification number: H04N7/181 ,  H04N21/4223 ,  H04N21/4316

Abstract: A computer network-based distributed presentation system and process is presented that controls the display of one or more video streams output by multiple video cameras located across multiple presentation sites on display screens located at each presentation site. The distributed presentation system and process provides the ability for a user at a site to customize the screen configuration (i.e., what video streams are display at any one time and in what format) for that site via a two-layer display director module. In the design layer of the module, a user interface is provided for a user to specify display priorities dictating what video streams are to be displayed on the screen over time. These display priorities are then provided to the execution layer of the module which translates them into probabilistic timed automata and uses the automata to control what is displayed on the display screen.

Abstract translation: 提出了一种基于计算机网络的分布式呈现系统和过程，其控制由位于每个呈现站点的显示屏幕上的多个呈现站点上的多个摄像机输出的一个或多个视频流的显示。 分布式呈现系统和过程提供了一个站点用户通过两层显示导演模块定制屏幕配置（即，任何一个时间和以什么格式显示什么视频流）的能力。 在模块的设计层中，为用户提供用户界面，以指定显示优先级，指定在屏幕上随时间显示哪些视频流。 然后将这些显示优先级提供给模块的执行层，将其转换为概率定时自动机，并使用自动机来控制显示屏上显示的内容。

公开(公告)号：US07196372B1

公开(公告)日：2007-03-27

申请号：US10614177

申请日：2003-07-08

Applicant: Bin Yu ,  Ming-Ren Lin ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic

Inventor： Bin Yu ,  Ming-Ren Lin ,  Srikanteswara Dakshina-Murthy ,  Zoran Krivokapic

IPC: H01L29/788

CPC classification number: H01L29/7887 ,  H01L21/28273 ,  H01L27/11568 ,  H01L29/785

Abstract: A non-volatile memory device includes a substrate, an insulating layer, a fin, an oxide layer, spacers and one or more control gates. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The oxide layer is formed on the fin and acts as a tunnel oxide for the memory device. The spacers are formed adjacent the side surfaces of the fin and the control gates are formed adjacent the spacers. The spacers act as floating gate electrodes for the non-volatile memory device.

Abstract translation: 非易失性存储器件包括衬底，绝缘层，鳍，氧化物层，间隔物和一个或多个控制栅极。 绝缘层形成在基板上，并且鳍形成在绝缘层上。 氧化层形成在翅片上并用作存储器件的隧道氧化物。 间隔件邻近翅片的侧表面形成，并且控制栅极邻近间隔件形成。 间隔件用作非易失性存储器件的浮栅电极。

公开(公告)号：US07125776B2

公开(公告)日：2006-10-24

申请号：US11030191

申请日：2005-01-07

Applicant: Krishnashree Achuthan ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

Inventor： Krishnashree Achuthan ,  Shibly S. Ahmed ,  Haihong Wang ,  Bin Yu

IPC: H01L21/336 ,  H01L21/00 ,  H01L21/84

CPC classification number: H01L29/785 ,  C09G1/02 ,  H01L21/31053 ,  H01L21/3212 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66795 ,  H01L29/6681 ,  Y10S438/959

Abstract: A method of manufacturing a MOSFET type semiconductor device includes planarizing a gate material layer that is deposited over a channel. The planarization is performed in a multi-step process that includes an initial “rough” planarization and then a “fine” planarization. The slurry used for the finer planarization may include added material that tends to adhere to low areas of the gate material.

Abstract translation: 制造MOSFET型半导体器件的方法包括平坦化沉积在沟道上的栅极材料层。 平面化在包括初始“粗糙”平坦化然后是“精细”平坦化的多步骤过程中进行。 用于更精细平坦化的浆料可以包括倾向于粘附到栅极材料的低区域的添加材料。

公开(公告)号：US07091097B1

公开(公告)日：2006-08-15

申请号：US10933424

申请日：2004-09-03

Applicant: Eric N. Paton ,  Qi Xiang ,  Cyrus E. Tabery ,  Bin Yu ,  Robert B. Ogle

Inventor： Eric N. Paton ,  Qi Xiang ,  Cyrus E. Tabery ,  Bin Yu ,  Robert B. Ogle

IPC: H01L21/336

CPC classification number: H01L21/268 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/2658 ,  H01L29/6659 ,  H01L29/7833

Abstract: A method of fabricating a semiconductor device comprises forming a gate electrode over a substrate and forming deep amorphous regions within the substrate. And implanting dopants to form deep source/drain regions at a depth less than that of the deep amorphous regions, partially re-crystallizing portions of the deep amorphous regions to reduce their depth, and re-crystallizing the reduced amorphous regions to form activated final source/drain regions.

Abstract translation: 制造半导体器件的方法包括在衬底上形成栅电极并在衬底内形成深非晶区域。 并且注入掺杂剂以在深非晶区域的深度处形成深的源极/漏极区域，部分地重新结晶深非晶区域的部分以减小它们的深度，并且将还原的非晶区域再结晶以形成激活的最终光源 /漏区。