Integrated circuit comprising a test mode secured by detection of the state of a control signal
    201.
    发明申请
    Integrated circuit comprising a test mode secured by detection of the state of a control signal 有权
    集成电路包括通过检测控制信号的状态而保证的测试模式

    公开(公告)号:US20070033463A1

    公开(公告)日:2007-02-08

    申请号:US11484359

    申请日:2006-07-10

    CPC classification number: G01R31/31719 G01R31/318533

    Abstract: An electronic circuit comprises configurable cells driven by command signals to adopt either a standard mode of operation in which they are integrated into a logic circuit, or a test mode in which they provide information on this logic circuit. The circuit includes a spy circuit capable of detecting an abnormal excitation of certain of the conductors through which the command signals travel, thus preventing fraudulent extraction of data out of the configurable cells. The spy circuit includes a logic combination circuit and a state detection cell.

    Abstract translation: 电子电路包括由命令信号驱动的可配置单元,以采用将它们集成到逻辑电路中的标准工作模式,或者提供关于该逻辑电路的信息的测试模式。 该电路包括能够检测命令信号通过的某些导体的异常激励的间谍电路,从而防止数据从可配置单元中的欺骗性提取。 间谍电路包括逻辑组合电路和状态检测单元。

    BAND PASS FILTERING CIRCUIT FITTED WITH ACOUSTIC RESONATORS
    202.
    发明申请
    BAND PASS FILTERING CIRCUIT FITTED WITH ACOUSTIC RESONATORS 有权
    带声道谐振器的带通滤波电路

    公开(公告)号:US20070030099A1

    公开(公告)日:2007-02-08

    申请号:US11427591

    申请日:2006-06-29

    CPC classification number: H03H9/6433 H03H9/58

    Abstract: A band pass filtering circuit based on a quadripole includes a serial branch having a first acoustic resonator presenting a frequency of resonance and a frequency of anti-resonance and mounted in serial with a first capacitor; a parallel branch having a second acoustic resonator resulting from the same manufacturing process as the first resonator and mounted in parallel with a second capacitor of identical value to that the first capacitor. The filtering circuit is particularly but not exclusively adapted to the realization of integrated filtering circuits used in mobile telephony.

    Abstract translation: 基于四极的带通滤波电路包括具有呈现谐振频率的第一声谐振器和反共振频率并与第一电容器串联安装的串行分支; 具有由与第一谐振器相同的制造工艺产生的第二声谐振器的并联支路,并且与第一电容器具有相同值的第二电容器并联安装。 滤波电路特别但不排他地适用于在移动电话中使用的集成滤波电路的实现。

    Device and method for mixing circuits
    204.
    发明申请
    Device and method for mixing circuits 有权
    混合电路的装置和方法

    公开(公告)号:US20070018507A1

    公开(公告)日:2007-01-25

    申请号:US11481240

    申请日:2006-07-05

    Applicant: Vincent Knopik

    Inventor: Vincent Knopik

    CPC classification number: H03D7/125 Y10T307/839

    Abstract: A first and a second signal (base band and local oscillator), respectively modulated to a first and a second frequency, are mixed to deliver an output signal at a frequency obtained by combining the first and second frequencies. The mixing is accomplished through a variable resistance stage controlled by the second signal and connected between a first and a second potential to deliver the mixed output signal. A control stage is configured to drive the resistance variation of the variable resistance stage according to the first signal.

    Abstract translation: 分别调制到第一和第二频率的第一和第二信号(基带和本地振荡器)被混合以以通过组合第一和第二频率获得的频率传送输出信号。 混合通过由第二信号控制的可变电阻级来实现,并连接在第一和第二电位之间以传送混合输出信号。 控制级被配置为根据第一信号驱动可变电阻级的电阻变化。

    Image sensor
    205.
    发明申请
    Image sensor 有权
    图像传感器

    公开(公告)号:US20070018075A1

    公开(公告)日:2007-01-25

    申请号:US11490308

    申请日:2006-07-20

    Abstract: An image sensor including a pixel assembly, each pixel including a photodiode and an access transistor connected to a read circuit, the photodiode and the access transistor being formed in and above a first semiconductor substrate, all or part of the read circuit being formed in a second semiconductor substrate, the second substrate being placed above the first substrate and separated therefrom by an intermediary insulating layer covering the access transistor, the photodiode receiving incident photons on its lower surface side opposite to the intermediary insulating layer.

    Abstract translation: 一种图像传感器,包括像素组件,每个像素包括光电二极管和连接到读取电路的存取晶体管,所述光电二极管和存取晶体管形成在第一半导体衬底中和上方,全部或部分读取电路形成为 第二半导体衬底,第二衬底被放置在第一衬底之上,并通过覆盖存取晶体管的中间绝缘层与其隔开,光电二极管在其与中间绝缘层相对的下表面侧接收入射光子。

    Switching power supply source
    206.
    发明申请
    Switching power supply source 审中-公开
    开关电源

    公开(公告)号:US20070013348A1

    公开(公告)日:2007-01-18

    申请号:US11366081

    申请日:2006-03-02

    CPC classification number: H02M1/38 H03K17/165

    Abstract: A switching power supply source including an inductance with first and second terminals; an output node; an NMos transistor, the drain of which is connected to the first terminal; a PMos transistor, the drain of which is connected to the first terminal; a control device generating control signals for NMos and PMos transistors assuring that these transistors are not conducting simultaneously; a capacitor with a third terminal connected to the first terminal and a fourth terminal; a resistance with a fifth terminal connected to the fourth terminal and a sixth terminal; and an NMos transistor the drain of which is connected to the grid of the PMos transistor and the gate of which is connected to the fourth terminal.

    Abstract translation: 一种开关电源,包括具有第一和第二端子的电感; 输出节点; NMos晶体管,其漏极连接到第一端子; PMOS晶体管,其漏极连接到第一端子; 产生用于NMos和PMos晶体管的控制信号的控制装置,确保这些晶体管不同时导通; 电容器,其具有连接到所述第一端子的第三端子和第四端子; 具有连接到第四端子的第五端子和第六端子的电阻; 以及NMos晶体管,其漏极连接到PMos晶体管的栅极,栅极连接到第四端子。

    Method and circuit of digital measurement of the phase of a sinusoidal signal

    公开(公告)号:US07154943B2

    公开(公告)日:2006-12-26

    申请号:US10273016

    申请日:2002-10-16

    Inventor: Patrick Simeoni

    CPC classification number: G11B7/0901 H04L7/0334 H04L2007/047

    Abstract: A method for measuring with a maximum error E the phase of a substantially sinusoidal signal, of angular frequency ω=2π/T, sampled with a sampling period T/r, in which the phase is calculated as the time at which a straight line crossing two consecutive samples located on either side of a median value of the signal reaches said value, including the step of selecting number r from a range included between a value r0 and a value equal to from two to three times value r0, such that: E ≥ max t ∈ [ - T r0 , 0 ] ⁢ [ t - T r0 · round ⁡ ( G · sin ⁢ ⁢ ω ⁢ ⁢ t ) round ⁡ ( sin ⁡ [ G · ω · t + 2 ⁢ π r0 ] ) - round ⁡ ( G · sin ⁢ ⁢ ω ⁢ ⁢ t ) ] round(x) being the integer closest to a real number x and G being equal to 2iG1, where i is the number of bits on which are coded the samples and where G1 is a term of correction of the amplitude of the sampled signal.

    Normalizing circuit with reduced error voltage
    208.
    发明授权
    Normalizing circuit with reduced error voltage 有权
    具有降低误差电压的归一化电路

    公开(公告)号:US07148700B2

    公开(公告)日:2006-12-12

    申请号:US10467378

    申请日:2002-02-11

    CPC classification number: H03G1/0088

    Abstract: A circuit for calibrating a voltage signal that includes a first voltage-to-current converter receiving the signal to be calibrated and a reference voltage and providing a current proportional to the voltage difference between the voltage of the signal to be calibrated and the reference voltage, a first current amplifier driven by the first voltage-to-current converter, a second voltage-to-current converter receiving an adjustment voltage and the reference voltage and providing a current proportional to the voltage difference between the adjustment voltage and the reference voltage, a second current amplifier driven by the second voltage-to-current converter, and a circuit for providing a calibrated voltage signal based on the difference between the currents provided by the first and second current amplifiers.

    Abstract translation: 一种用于校准包括接收待校准信号的第一电压 - 电流转换器和参考电压并且提供与被校准信号的电压与参考电压之间的电压差成比例的电流的电压信号的电路, 由第一电压 - 电流转换器驱动的第一电流放大器,接收调节电压的第二电压 - 电流转换器和参考电压,并提供与调节电压和参考电压之间的电压差成比例的电流, 由第二电压 - 电流转换器驱动的第二电流放大器,以及用于基于由第一和第二电流放大器提供的电流之间的差提供校准电压信号的电路。

    High-density MOS transistor
    209.
    发明授权
    High-density MOS transistor 有权
    高密度MOS晶体管

    公开(公告)号:US07141837B2

    公开(公告)日:2006-11-28

    申请号:US10817147

    申请日:2004-04-02

    Abstract: A MOS transistor formed in a silicon substrate comprising an active area surrounded with an insulating wall, a first conductive strip covering a central strip of the active area, one or several second conductive strips placed in the active area right above the first strip, and conductive regions placed in two recesses of the insulating wall and placed against the ends of the first and second strips, the silicon surfaces opposite to the conductive strips and regions being covered with an insulator forming a gate oxide.

    Abstract translation: 一种形成在硅衬底中的MOS晶体管,包括被绝缘壁包围的有源区域,覆盖有源区域的中心条带的第一导电条,放置在位于第一条带正上方的有源区域中的一个或多个第二导电条,以及导电 放置在绝缘壁的两个凹部中并且抵靠第一和第二条带的端部放置的区域,与导电条带和区域相对的硅表面被形成栅极氧化物的绝缘体覆盖。

    Dynamic random access memory integrated element
    210.
    发明申请
    Dynamic random access memory integrated element 审中-公开
    动态随机存取存储器集成元件

    公开(公告)号:US20060261390A1

    公开(公告)日:2006-11-23

    申请号:US11398855

    申请日:2006-04-06

    Applicant: Pierre Malinge

    Inventor: Pierre Malinge

    Abstract: A dynamic random access memory integrated element includes a transistor and a region for the storage of electrical charges. The surface area of an electrical junction between a source region of the transistor and the storage region is smaller than the surface area of an electrical junction between a drain region of the transistor and the storage region. Such a memory element can be fabricated from a standard substrate using SOI technology or from a bulk silicon substrate, and a bit stored in the element can be erased with reduced power consumption.

    Abstract translation: 动态随机存取存储器集成元件包括晶体管和用于存储电荷的区域。 晶体管的源极区域和存储区域之间的电连接的表面积小于晶体管的漏极区域和存储区域之间的电连接的表面积。 这样的存储元件可以由使用SOI技术的标准衬底或从体硅衬底制造,并且可以以降低的功耗消除存储在元件中的位。

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