Abstract:
An electronic circuit comprises configurable cells driven by command signals to adopt either a standard mode of operation in which they are integrated into a logic circuit, or a test mode in which they provide information on this logic circuit. The circuit includes a spy circuit capable of detecting an abnormal excitation of certain of the conductors through which the command signals travel, thus preventing fraudulent extraction of data out of the configurable cells. The spy circuit includes a logic combination circuit and a state detection cell.
Abstract:
A band pass filtering circuit based on a quadripole includes a serial branch having a first acoustic resonator presenting a frequency of resonance and a frequency of anti-resonance and mounted in serial with a first capacitor; a parallel branch having a second acoustic resonator resulting from the same manufacturing process as the first resonator and mounted in parallel with a second capacitor of identical value to that the first capacitor. The filtering circuit is particularly but not exclusively adapted to the realization of integrated filtering circuits used in mobile telephony.
Abstract:
A first and a second signal (base band and local oscillator), respectively modulated to a first and a second frequency, are mixed to deliver an output signal at a frequency obtained by combining the first and second frequencies. The mixing is accomplished through a variable resistance stage controlled by the second signal and connected between a first and a second potential to deliver the mixed output signal. A control stage is configured to drive the resistance variation of the variable resistance stage according to the first signal.
Abstract:
An image sensor including a pixel assembly, each pixel including a photodiode and an access transistor connected to a read circuit, the photodiode and the access transistor being formed in and above a first semiconductor substrate, all or part of the read circuit being formed in a second semiconductor substrate, the second substrate being placed above the first substrate and separated therefrom by an intermediary insulating layer covering the access transistor, the photodiode receiving incident photons on its lower surface side opposite to the intermediary insulating layer.
Abstract:
A switching power supply source including an inductance with first and second terminals; an output node; an NMos transistor, the drain of which is connected to the first terminal; a PMos transistor, the drain of which is connected to the first terminal; a control device generating control signals for NMos and PMos transistors assuring that these transistors are not conducting simultaneously; a capacitor with a third terminal connected to the first terminal and a fourth terminal; a resistance with a fifth terminal connected to the fourth terminal and a sixth terminal; and an NMos transistor the drain of which is connected to the grid of the PMos transistor and the gate of which is connected to the fourth terminal.
Abstract:
A method for measuring with a maximum error E the phase of a substantially sinusoidal signal, of angular frequency ω=2π/T, sampled with a sampling period T/r, in which the phase is calculated as the time at which a straight line crossing two consecutive samples located on either side of a median value of the signal reaches said value, including the step of selecting number r from a range included between a value r0 and a value equal to from two to three times value r0, such that: E ≥ max t ∈ [ - T r0 , 0 ] [ t - T r0 · round ( G · sin ω t ) round ( sin [ G · ω · t + 2 π r0 ] ) - round ( G · sin ω t ) ] round(x) being the integer closest to a real number x and G being equal to 2iG1, where i is the number of bits on which are coded the samples and where G1 is a term of correction of the amplitude of the sampled signal.
Abstract:
A circuit for calibrating a voltage signal that includes a first voltage-to-current converter receiving the signal to be calibrated and a reference voltage and providing a current proportional to the voltage difference between the voltage of the signal to be calibrated and the reference voltage, a first current amplifier driven by the first voltage-to-current converter, a second voltage-to-current converter receiving an adjustment voltage and the reference voltage and providing a current proportional to the voltage difference between the adjustment voltage and the reference voltage, a second current amplifier driven by the second voltage-to-current converter, and a circuit for providing a calibrated voltage signal based on the difference between the currents provided by the first and second current amplifiers.
Abstract:
A MOS transistor formed in a silicon substrate comprising an active area surrounded with an insulating wall, a first conductive strip covering a central strip of the active area, one or several second conductive strips placed in the active area right above the first strip, and conductive regions placed in two recesses of the insulating wall and placed against the ends of the first and second strips, the silicon surfaces opposite to the conductive strips and regions being covered with an insulator forming a gate oxide.
Abstract:
A dynamic random access memory integrated element includes a transistor and a region for the storage of electrical charges. The surface area of an electrical junction between a source region of the transistor and the storage region is smaller than the surface area of an electrical junction between a drain region of the transistor and the storage region. Such a memory element can be fabricated from a standard substrate using SOI technology or from a bulk silicon substrate, and a bit stored in the element can be erased with reduced power consumption.