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公开(公告)号:US11094533B2
公开(公告)日:2021-08-17
申请号:US16590734
申请日:2019-10-02
Applicant: Applied Materials, Inc.
Inventor: Eswaranand Venkatasubramanian , Srinivas Gandikota , Kelvin Chan , Atashi Basu , Abhijit Basu Mallick
Abstract: A microelectronic device on a semiconductor substrate comprises: a gate electrode; and a spacer adjacent to the gate electrode, the spacer comprising: a the low-k dielectric film comprising one or more species of vanadium oxide, which is optionally doped, and an optional silicon nitride or oxide film. Methods comprise depositing a low-k dielectric film optionally sandwiched by a silicon nitride or oxide film to form a spacer adjacent to a gate electrode of a microelectronic device on a semiconductor substrate, wherein the low-k dielectric film comprises a vanadium-containing film.
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公开(公告)号:US11081348B2
公开(公告)日:2021-08-03
申请号:US16001251
申请日:2018-06-06
Applicant: Applied Materials, Inc.
Inventor: Rui Cheng , Fei Wang , Abhijit Basu Mallick , Robert Jan Visser
IPC: H01L21/02 , A61K9/00 , A61K31/438 , A61K31/4409 , A61K31/47 , A61K31/497 , A61K47/12 , A61K47/26 , A61K47/36 , H01L21/3065
Abstract: Methods for selective silicon film deposition on a substrate comprising a first surface and a second surface are described. More specifically, the process of depositing a film, treating the film to change some film property and selectively etching the film from various surfaces of the substrate are described. The deposition, treatment and etching can be repeated to selectively deposit a film on one of the two substrate surfaces.
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公开(公告)号:US11069568B2
公开(公告)日:2021-07-20
申请号:US16803211
申请日:2020-02-27
Applicant: Applied Materials, Inc.
Inventor: Susmit Singha Roy , Yihong Chen , Abhijit Basu Mallick , Srinivas Gandikota
IPC: H01L21/768 , H01L21/02 , H01L21/3105 , H01L21/324
Abstract: In one embodiment, a method of forming a barrier layer is provided. The method includes positioning a substrate in a processing chamber, forming a barrier layer over the substrate and in contact with the underlayer, and annealing the substrate. The substrate comprises at least one underlayer having cobalt, tungsten, or copper. The barrier layer has a thickness of less than 70 angstroms.
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公开(公告)号:US11062939B2
公开(公告)日:2021-07-13
申请号:US16445654
申请日:2019-06-19
Applicant: Applied Materials, Inc.
IPC: H01L21/768 , H01L21/683 , H01L21/02 , H01L21/762 , H01J37/32 , H01L21/67
Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of high quality gapfill. Some embodiments utilize chemical vapor deposition, plasma vapor deposition, physical vapor deposition and combinations thereof to deposit the gapfill. The gapfill is of high quality and similar in properties to similarly composed bulk materials.
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公开(公告)号:US11011384B2
公开(公告)日:2021-05-18
申请号:US15946107
申请日:2018-04-05
Applicant: Applied Materials, Inc.
Inventor: Abhijit Basu Mallick , Pramit Manna , Shishi Jiang
IPC: H01L21/76 , H01L21/36 , H01L21/20 , H01L21/205 , H01L21/3105 , H01L21/02
Abstract: Methods for seam-less gapfill comprising forming a flowable film by PECVD, annealing the flowable film with a reactive anneal to form an annealed film and curing the flowable film or annealed film to solidify the film. The flowable film can be formed using a higher order silane and plasma. The reactive anneal may use a silane or higher order silane. A UV cure, or other cure, can be used to solidify the flowable film or the annealed film.
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公开(公告)号:US11004689B2
公开(公告)日:2021-05-11
申请号:US16435910
申请日:2019-06-10
Applicant: Applied Materials, Inc.
Inventor: Zihui Li , Rui Cheng , Anchuan Wang , Nitin K. Ingle , Abhijit Basu Mallick
IPC: H01L21/3065 , H01L21/311 , B81C1/00 , H01L21/3213 , H01J37/00 , H01L27/11582
Abstract: Exemplary methods for selectively removing silicon (e.g. polysilicon) from a patterned substrate may include flowing a fluorine-containing precursor into a substrate processing chamber to form plasma effluents. The plasma effluents may remove silicon (e.g. polysilicon, amorphous silicon or single crystal silicon) at significantly higher etch rates compared to exposed silicon oxide, silicon nitride or other dielectrics on the substrate. The methods rely on the temperature of the substrate in combination with some conductivity of the surface to catalyze the etch reaction rather than relying on a gas phase source of energy such as a plasma.
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公开(公告)号:US10950498B2
公开(公告)日:2021-03-16
申请号:US16583749
申请日:2019-09-26
Applicant: Applied Materials, Inc.
Inventor: Susmit Singha Roy , Srinivas Gandikota , Pramit Manna , Abhijit Basu Mallick
IPC: H01L21/301 , H01L21/46 , H01L21/78 , H01L21/768 , H01L21/02 , H01L27/11582 , H01L27/11556 , H01L23/528 , H01L21/285 , H01L23/532 , H01L21/311
Abstract: Methods of dep-etch in semiconductor devices (e.g. V-NAND) are described. A metal layer is deposited in a feature. The metal layer is removed by low temperature atomic layer etching by oxidizing the surface of the metal layer and etching the oxide in a layer-by-layer fashion. After removal of the metal layer, the features are filled with a metal.
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公开(公告)号:US20210028055A1
公开(公告)日:2021-01-28
申请号:US17069195
申请日:2020-10-13
Applicant: Applied Materials, Inc.
Inventor: Pramit Manna , Ludovic Godet , Rui Cheng , Erica Chen , Ziqing Duan , Abhijit Basu Mallick , Srinivas Gandikota
IPC: H01L21/762 , H01L21/02 , H01L21/768 , H01L23/31 , H01L29/06
Abstract: Methods for seam-less gapfill comprising sequentially depositing a film with a seam, reducing the height of the film to remove the seam and repeating until a seam-less film is formed. Some embodiments include optional film doping and film treatment (e.g., ion implantation and annealing).
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公开(公告)号:US10886172B2
公开(公告)日:2021-01-05
申请号:US16848754
申请日:2020-04-14
Applicant: Applied Materials, Inc.
Inventor: Yihong Chen , Ziqing Duan , Abhijit Basu Mallick , Kelvin Chan
IPC: H01L21/4763 , H01L21/768 , H01L21/3213 , H01L21/02 , H01L27/11582 , H01L27/11556 , H01L21/285 , H01L23/532 , H01L21/311 , H01L23/528
Abstract: Methods of wordline separation in semiconductor devices (e.g., 3D-NAND) are described. A metal film is deposited in the wordlines and on the surface of a stack of spaced oxide layers. The metal film is removed by high temperature oxidation and etching of the oxide or low temperature atomic layer etching by oxidizing the surface and etching the oxide in a monolayer fashion. After removal of the metal overburden, the wordlines are filled with the metal film.
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公开(公告)号:US20200279772A1
公开(公告)日:2020-09-03
申请号:US16647310
申请日:2018-09-14
Applicant: Applied Materials, Inc.
Inventor: Susmit Singha Roy , Srinivas Gandikota , Abhijit Basu Mallick , Amrita B. Mullick
IPC: H01L21/768 , C23C16/04 , C23C16/44 , C23C16/42 , C23C16/56
Abstract: Methods of producing a self-aligned structure are described. The methods comprise forming a metal-containing film in a substrate feature and silicidizing the metal-containing film to form a self-aligned structure comprising metal silicide. In some embodiments, the rate of formation of the self-aligned structure is controlled. In some embodiments, the amount of volumetric expansion of the metal-containing film to form the self-aligned structure is controlled. Methods of forming self-aligned vias are also described.
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