公开(公告)号：US09223555B2

公开(公告)日：2015-12-29

申请号：US14074623

申请日：2013-11-07

Applicant: Netronome Systems, Inc.

Inventor： Espen Skoglund ,  Rolf Neugebauer ,  Francois Henri Theron ,  Gavin J. Stark

IPC: G06F9/445 ,  G06F9/45

CPC classification number: G06F8/54 ,  G06F8/45 ,  G06F8/453

Abstract: A novel declare instruction can be used in source code to declare a sub-pool of resource instances to be taken from the resource instances of a larger declared pool. Using such declare instructions, a hierarchy of pools and sub-pools can be declared. A novel allocate instruction can then be used in the source code to instruct a novel linker to make resource instance allocations from a desired pool or a desired sub-pool of the hierarchy. After compilation, the declare and allocate instructions appear in the object code. The linker uses the declare and allocate instructions in the object code to set up the hierarchy of pools and to make the indicated allocations of resource instances to symbols. After resource allocation, the linker replaces instances of a symbol in the object code with the address of the allocated resource instance, thereby generating executable code.

Abstract translation: 源代码中可以使用一个新颖的声明指令来声明从更大的声明池的资源实例获取的资源实例的子池。 使用这样的声明指令，可以声明池和子池的层次结构。 然后可以在源代码中使用新颖的分配指令来指示新颖的链接器从期望的池或层级的期望子池进行资源实例分配。 在编译之后，声明和分配指令将出现在目标代码中。 链接器使用对象代码中的声明和分配指令来设置池的层次结构，并将资源实例的指定分配指定为符号。 资源分配后，链接器将使用分配的资源实例的地址替换目标代码中的符号实例，从而生成可执行代码。

公开(公告)号：US09176905B1

公开(公告)日：2015-11-03

申请号：US14724824

申请日：2015-05-29

Applicant: Netronome Systems, Inc.

Inventor： Gavin J. Stark

IPC: G06F12/00 ,  G06F13/16 ,  G06F9/46 ,  G06F9/35

CPC classification number: G06F13/1615 ,  G06F9/3004 ,  G06F9/34 ,  G06F9/35 ,  G06F9/467 ,  G06F13/1663 ,  G06F13/40

Abstract: A lookup engine of a transactional memory (TM) has multiple hardware lookup structures, each usable to perform a different type of lookup. In response to a lookup command, the lookup engine reads a first block of first information from a memory unit. The first information configures the lookup engine to perform a first type of lookup, thereby identifying a first result value. If the first result value is not a final result value, then the lookup engine uses address information in the first result value to read a second block of second information. The second information configures the lookup engine to perform a second type of lookup, thereby identifying a second result value. This process repeats until a final result value is obtained. The type of lookup performed is determined by the result value of the preceding lookup and/or type information of the block of information for the next lookup.

公开(公告)号：US09152452B2

公开(公告)日：2015-10-06

申请号：US13598448

申请日：2012-08-29

Applicant: Gavin J. Stark

Inventor： Gavin J. Stark

IPC: G06F9/46 ,  G06F9/30 ,  H04L12/741 ,  H04L12/851

CPC classification number: G06F9/467 ,  G06F9/3004 ,  G06F9/30087 ,  H04L45/745 ,  H04L47/2441

Abstract: A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a base address, a starting bit position, and a mask size. In response to the command, the TM pulls an input value (IV). A selecting circuit within the TM uses the starting bit position and the mask size to select a first portion of the IV. The first portion of the IV and the base address value are summed to generate a memory address. The memory address is used to read a word containing multiple result values and multiple reference values from memory. A second portion of the IV is compared with each reference value using a comparator circuit. A result value associated with the matching reference value is selected using a multiplexing circuit and a select value generated by the comparator circuit. The TM sends the selected result value to the processor.

Abstract translation: 事务存储器（TM）从处理器接收总线上的查找命令。 该命令包括基地址，起始位位置和掩码大小。 响应该命令，TM拉动输入值（IV）。 TM内的选择电路使用起始位位置和掩模尺寸来选择IV的第一部分。 IV的第一部分和基地址值相加以生成存储器地址。 存储器地址用于从存储器读取包含多个结果值和多个参考值的单词。 使用比较器电路将IV的第二部分与每个参考值进行比较。 使用复用电路和由比较器电路产生的选择值来选择与匹配参考值相关联的结果值。 TM将选定的结果值发送到处理器。

公开(公告)号：US09146920B2

公开(公告)日：2015-09-29

申请号：US13609039

申请日：2012-09-10

Applicant: Gavin J. Stark ,  Johann Heinrich Tönsing

Inventor： Gavin J. Stark ,  Johann Heinrich Tönsing

IPC: G06F17/30 ,  G06F9/46

CPC classification number: G06F12/1466 ,  G06F9/467 ,  G06F17/30 ,  G06F17/30362 ,  G06F2212/1052

Abstract: A transactional memory (TM) receives an Atomic Look-up, Add and Lock (ALAL) command across a bus from a client. The command includes a first value. The TM pulls a second value. The TM uses the first value to read a set of memory locations, and determines if any of the locations contains the second value. If no location contains the second value, then the TM locks a vacant location, adds the second value to the vacant location, and sends a result to the client. If a location contains the second value and it is not locked, then the TM locks the location and returns a result to the client. If a location contains the second value and it is locked, then the TM returns a result to the client. Each location has an associated data structure. Setting the lock field of a location locks access to its associated data structure.

Abstract translation: 事务性存储器（TM）通过客户机的总线接收原子查询，添加和锁定（ALAL）命令。 该命令包含第一个值。 TM拉第二个值。 TM使用第一个值来读取一组存储器位置，并确定是否有任何位置包含第二个值。 如果没有位置包含第二个值，则TM锁定空闲位置，将第二个值添加到空闲位置，并将结果发送给客户端。 如果某个位置包含第二个值并且未锁定，则TM锁定位置并将结果返回给客户端。 如果一个位置包含第二个值并被锁定，那么TM将结果返回给客户机。 每个位置都有相关的数据结构。 设置位置的锁定字段锁定其相关数据结构的访问。

公开(公告)号：US20150263967A1

公开(公告)日：2015-09-17

申请号：US14205824

申请日：2014-03-12

Applicant: Netronome Systems, Inc.

Inventor： Ron Lamar Swartzentruber

IPC: H04L12/823 ,  H04L12/863

CPC classification number: H04L47/326 ,  H04L47/29 ,  H04L47/30 ,  H04L47/54

Abstract: A device that receives a packet descriptor and a queue number that indicates a queue stored within a memory unit, and in response determines an instantaneous queue depth of the queue. The instantaneous queue depth is used to determine a drop probability. The drop probability is used to randomly determine if the packet descriptor should be stored in the queue. The queue has a first queue depth range and a second queue depth range that do not overlap. A first drop probability is associated with the first queue depth range and a second drop probability is associated with the second queue depth range. The first drop probability is used when the queue depth is within the first queue depth range. The second drop probability is used with the queue depth is within the second queue depth range. The device includes a random value generator and a drop indicator generator.

Abstract translation: 接收分组描述符的设备和指示存储在存储器单元中的队列的队列号，并且作为响应确定队列的瞬时队列深度。 瞬时队列深度用于确定丢弃概率。 丢弃概率用于随机确定包描述符是否应该存储在队列中。 队列具有不重叠的第一队列深度范围和第二队列深度范围。 第一丢弃概率与第一队列深度范围相关联，并且第二丢弃概率与第二队列深度范围相关联。 当队列深度在第一队列深度范围内时，使用第一个丢弃概率。 第二个丢弃概率用于队列深度在第二个队列深度范围内。 该装置包括随机值发生器和下降指示器发生器。

公开(公告)号：US20150220446A1

公开(公告)日：2015-08-06

申请号：US14172862

申请日：2014-02-04

Applicant: Netronome Systems, Inc.

Inventor： Gavin J. Stark ,  Rolf Neugebauer

IPC: G06F12/10 ,  G06F9/46 ,  G06F13/24 ,  G06F12/08 ,  G06F13/16

CPC classification number: G06F9/467 ,  G06F12/1081 ,  G06F12/109 ,  G06F13/385 ,  G06F2212/657 ,  G06F2213/0026

Abstract: A transactional memory receives a command, where the command includes an address and a novel GAA (Generate Alert On Action) bit. If the GAA bit is set and if the transactional memory is enabled to generate alerts and if the command is a write into a memory of the transactional memory, then the transactional memory outputs an alert in accordance with preconfigured parameters. For example, the alert may be preconfigured to carry a value or key usable by the recipient of the alert to determine the reason for the alert. The alert may be set up to include the address of the memory location in the transactional memory that was written. The transactional memory may be set up to send the alert to a predetermined destination. The outputting of the alert may be a writing of information into a predetermined destination, or may be an outputting of an interrupt signal.

Abstract translation: 事务存储器接收命令，其中命令包括地址和新颖的GAA（生成警报在动作）位。 如果GAA位被设置，并且事务存储器被启用以产生警报，并且如果命令是写入事务存储器的存储器，则事务存储器根据预先配置的参数输出警报。 例如，警报可以被预配置为携带警报的接收者可使用的值或密钥来确定警报的原因。 警报可能被设置为将内存位置的地址包括在写入的事务内存中。 事务存储器可以被设置为将警报发送到预定的目的地。 警报的输出可以是将信息写入预定目的地，或者可以是中断信号的输出。

公开(公告)号：US20150193266A1

公开(公告)日：2015-07-09

申请号：US14151677

申请日：2014-01-09

Applicant: Netronome Systems, Inc.

Inventor： Gavin J. Stark ,  Steven W. Zagorianakos

IPC: G06F9/46 ,  G06F9/38

CPC classification number: G06F9/467

Abstract: An automaton hardware engine employs a transition table organized into 2n rows, where each row comprises a plurality of n-bit storage locations, and where each storage location can store at most one n-bit entry value. Each row corresponds to an automaton state. In one example, at least two NFAs are encoded into the table. The first NFA is indexed into the rows of the transition table in a first way, and the second NFA is indexed in to the rows of the transition table in a second way. Due to this indexing, all rows are usable to store entry values that point to other rows.

Abstract translation: 自动机硬件引擎采用组织成2n行的转换表，其中每行包括多个n位存储位置，并且其中每个存储位置最多可以存储一个n位输入值。 每行对应于自动机状态。 在一个示例中，至少两个NFA被编码到表中。 第一个NFA以第一种方式索引到转换表的行中，第二个NFA以第二种方式索引到转换表的行中。 由于此索引，所有行都可用于存储指向其他行的条目值。

公开(公告)号：US20140136813A1

公开(公告)日：2014-05-15

申请号：US13675353

申请日：2012-11-13

Applicant: Gavin J. Stark

Inventor： Gavin J. Stark

IPC: G06F12/08

CPC classification number: G06F9/467 ,  G06F9/34 ,  G06F12/023 ,  G06F12/08 ,  G06F2212/251

Abstract: A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address. In response to the command, the TM pulls an input value (IV). The memory address is used to read a word containing multiple result values (RVs), multiple reference values, and multiple mask values from memory. A selecting circuit within the TM uses a starting bit position and a mask size to select a portion of the IV. The portion of the IV is a lookup key value (LKV). The LKV is masked by each mask value thereby generating multiple masked values. Each masked value is compared to a reference value thereby generating multiple comparison values. A lookup table generates a selector value based upon the comparison values. A result value is selected based on the selector value. The selected result value is then communicated to the processor via the bus.

Abstract translation: 事务存储器（TM）从处理器接收总线上的查找命令。 该命令包括一个内存地址。 响应该命令，TM拉动输入值（IV）。 存储器地址用于从存储器读取包含多个结果值（RV），多个参考值和多个掩码值的单词。 TM内的选择电路使用起始位位置和掩码大小来选择IV的一部分。 IV的部分是查询键值（LKV）。 每个掩码值屏蔽LKV，从而产生多个掩蔽值。 将每个屏蔽值与参考值进行比较，从而生成多个比较值。 查找表根据比较值生成选择器值。 根据选择器值选择结果值。 所选择的结果值然后经由总线传送到处理器。

公开(公告)号：US20140136812A1

公开(公告)日：2014-05-15

申请号：US13675309

申请日：2012-11-13

Applicant: Gavin J. Stark

Inventor： Gavin J. Stark

IPC: G06F12/10

CPC classification number: G06F13/287 ,  G06F7/10 ,  G06F9/34 ,  G06F9/467 ,  G06F12/00 ,  G06F13/00 ,  G06F13/4234 ,  G06F17/30 ,  Y02D10/14 ,  Y02D10/151

Abstract: A transactional memory (TM) receives a lookup command across a bus from a processor. The command includes a memory address, a starting bit position, and a mask size. In response to the command, the TM pulls an input value (IV). The memory address is used to read a word containing multiple result values (RVs) and multiple key values from memory. Each key value is indicates a single RV to be output by the TM. A selecting circuit within the TM uses the starting bit position and mask size to select a portion of the IV. The portion of the IV is a key selector value. A key value is selected based upon the key selector value. A RV is selected based upon the key value. The key value is selected by a key selection circuit. The RV is selected by a result value selection circuit.

Abstract translation: 事务存储器（TM）从处理器接收总线上的查找命令。 该命令包括存储器地址，起始位位置和掩码大小。 响应该命令，TM拉动输入值（IV）。 存储器地址用于从存储器读取包含多个结果值（RV）和多个键值的单词。 每个键值表示由TM输出的单个RV。 TM内的选择电路使用起始位位置和掩码大小来选择IV的一部分。 IV的部分是关键选择器值。 基于键选择器值选择键值。 基于键值选择RV。 键值由键选择电路选择。 RV由结果值选择电路选择。

公开(公告)号：US20140136683A1

公开(公告)日：2014-05-15

申请号：US13675453

申请日：2012-11-13

Applicant: Gavin J. Stark ,  Nicolass J. Viljoen ,  Niel Viljoen

Inventor： Gavin J. Stark ,  Nicolass J. Viljoen ,  Niel Viljoen

IPC: G06F15/173

CPC classification number: H04L49/3063 ,  H04L43/00 ,  H04L43/18 ,  H04L47/2483 ,  H04L47/34

Abstract: An appliance receives packets that are part of a flow pair, each packet sharing an application protocol. The appliance determines an estimated application protocol of the packets without performing deep packet inspection on any packets. The estimated application protocol may be determined by using an application protocol estimation table. The appliance then predicts the inter-packet interval between a packet previously received by the appliance and a next packet not yet received by the appliance. The inter-packet interval may be determined by using an inter-packet interval prediction table. The appliance then preloads packet flow data in a cache before the next packet is predicted to arrive at the appliance. Upon receiving the next packet, the packet flow data is preloaded in the cache. This reduces packet processing time by removing waiting periods previously required to cache packet flow data from an external memory after receiving the next packet.

Abstract translation: 设备接收作为流对的一部分的数据包，每个数据包共享一个应用协议。 设备在不对任何数据包执行深度包检测的情况下确定数据包的估计应用协议。 估计的应用协议可以通过使用应用协议估计表来确定。 然后，设备预测由设备先前接收的分组与尚未由设备接收的下一个分组之间的分组间间隔。 可以通过使用分组间间隔预测表来确定分组间间隔。 然后，设备在下一个数据包预计到达设备之前，预先在缓存中加载数据包流数据。 在接收到下一个分组时，分组流数据被预加载在高速缓存中。 这通过在接收到下一个分组之后消除先前从外部存储器缓存分组流数据所需的等待时间来减少分组处理时间。