公开(公告)号：US20120100583A1

公开(公告)日：2012-04-26

申请号：US13114647

申请日：2011-05-24

Applicant: Rajesh Kumar ,  Arthur C. Watterson ,  Virinder Singh Parmar ,  Jayant Kumar ,  Lynne Ann Samuelson

Inventor： Rajesh Kumar ,  Arthur C. Watterson ,  Virinder Singh Parmar ,  Jayant Kumar ,  Lynne Ann Samuelson

IPC: C12P7/26

CPC classification number: C12P7/62 ,  C12P9/00

Abstract: The invention relates to new methods of enzymatic synthesis of polymers such as polyorganosilicones and polyesters, and new polymers made by these methods.

Abstract translation: 本发明涉及聚合物如聚有机硅氧烷和聚酯的酶合成新方法，以及通过这些方法制备的新型聚合物。

公开(公告)号：US20120099538A1

公开(公告)日：2012-04-26

申请号：US12912556

申请日：2010-10-26

Applicant: Balaji Venkat Venkataswami ,  Kowsalya Subramanian ,  Jegan Kumar Somi Ramasamy Subramanian ,  Manikandan Dhayalan ,  Rajesh Kumar Andhavaram ,  Girish Sivasubramanian

Inventor： Balaji Venkat Venkataswami ,  Kowsalya Subramanian ,  Jegan Kumar Somi Ramasamy Subramanian ,  Manikandan Dhayalan ,  Rajesh Kumar Andhavaram ,  Girish Sivasubramanian

IPC: H04W28/02

CPC classification number: H04L47/24 ,  H04W76/12 ,  H04W76/15

Abstract: An example method is provided and includes receiving a request from a mobile node for an Internet protocol (IP) address and establishing a point-to-point (PPP) link for the mobile node. The method also includes provisioning a first tunnel associated with a first communication flow for the mobile node, and provisioning a sub-tunnel with the first tunnel for a second communication flow. The second communication flow is associated with a high priority type of data to be transported on the sub-tunnel. In more specific embodiments, a call admission control (CAC) mechanism is used to establish the sub-tunnel with the first tunnel for the second communication flow. Additionally, an inner label is installed in a header of a packet associated with the second communication flow in order to identify the sub-tunnel.

Abstract translation: 提供了一种示例性方法，包括从移动节点接收针对因特网协议（IP）地址的请求，并为移动节点建立点对点（PPP）链路。 该方法还包括配置与移动节点的第一通信流相关联的第一隧道，以及为第二通信流提供具有第一隧道的子隧道。 第二通信流与要在子隧道上传输的高优先级数据相关联。 在更具体的实施例中，使用呼叫许可控制（CAC）机制来建立具有用于第二通信流的第一隧道的子隧道。 另外，为了识别子隧道，内标签安装在与第二通信流相关联的分组的报头中。

公开(公告)号：US08097917B2

公开(公告)日：2012-01-17

申请号：US12458377

申请日：2009-07-09

Applicant: Malhan Rajesh Kumar ,  Yuichi Takeuchi

Inventor： Malhan Rajesh Kumar ,  Yuichi Takeuchi

IPC: H01L29/66

CPC classification number: H01L29/7828 ,  H01L29/1608 ,  H01L29/66666 ,  H01L29/7391 ,  H01L29/7397 ,  Y10S438/931

Abstract: A silicon carbide semiconductor device includes: a semiconductor substrate having a silicon carbide substrate, a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer; a trench penetrating the second and the third semiconductor layers to reach the first semiconductor layer; a channel layer on a sidewall and a bottom of the trench; an oxide film on the channel layer; a gate electrode on the oxide film; a first electrode connecting to the third semiconductor layer; and a second electrode connecting to the silicon carbide substrate. A position of a boundary between the first semiconductor layer and the second semiconductor layer is disposed lower than an utmost lowest position of the oxide film.

Abstract translation: 碳化硅半导体器件包括：具有碳化硅衬底，第一半导体层，第二半导体层和第三半导体层的半导体衬底; 穿过第二和第三半导体层的沟槽到达第一半导体层; 在沟槽的侧壁和底部上的沟道层; 沟道层上的氧化膜; 氧化膜上的栅电极; 连接到第三半导体层的第一电极; 以及连接到碳化硅衬底的第二电极。 第一半导体层和第二半导体层之间的边界的位置被设置为低于氧化膜的最低位置。

公开(公告)号：US20120003844A1

公开(公告)日：2012-01-05

申请号：US13153254

申请日：2011-06-03

Applicant: Rajesh Kumar ,  Monte P. Dreyer ,  Michael J. Taylor

Inventor： Rajesh Kumar ,  Monte P. Dreyer ,  Michael J. Taylor

IPC: H01R12/51 ,  H05K3/42 ,  H05K3/46

CPC classification number: H05K3/4623 ,  H05K3/4069 ,  H05K3/4614 ,  H05K2201/0195 ,  H05K2201/096 ,  H05K2203/061 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49146 ,  Y10T29/49165 ,  Y10T29/532

Abstract: Systems and methods of manufacturing printed circuit boards using blind and internal micro vias to couple subassemblies. An embodiment of the invention provides a method of manufacturing a printed circuit including attaching a plurality of metal layer carriers to form a first subassembly including at least one copper foil pad on a first surface, applying an encapsulation material onto the first surface of the first subassembly, curing the encapsulation material and the first subassembly; applying a lamination adhesive to a surface of the cured encapsulation material, forming at least one via in the lamination adhesive and the cured encapsulation material to expose the at least one copper foil pad, attaching a plurality of metal layer carriers to form a second subassembly, and attaching the first subassembly and the second subassembly.

Abstract translation: 使用盲孔和内部微通孔来制造印刷电路板来耦合子组件的系统和方法。 本发明的一个实施例提供一种制造印刷电路的方法，包括附接多个金属层载体以形成第一子组件，该第一子组件包括在第一表面上的至少一个铜箔焊盘，将封装材料施加到第一子组件的第一表面上 固化封装材料和第一子组件; 在所述固化的包封材料的表面上施加层压粘合剂，在所述层压粘合剂和所述固化的封装材料中形成至少一个通孔，以暴露所述至少一个铜箔垫，附接多个金属层载体以形成第二子组件， 以及附接第一子组件和第二子组件。

公开(公告)号：US08008423B2

公开(公告)日：2011-08-30

申请号：US12789832

申请日：2010-05-28

Applicant: Vijayendra Kumar ,  Rajesh Kumar ,  Ashish Dhawan ,  Sui-Zhou Yang ,  Ashok L. Cholli

Inventor： Vijayendra Kumar ,  Rajesh Kumar ,  Ashish Dhawan ,  Sui-Zhou Yang ,  Ashok L. Cholli

IPC: C08G63/00 ,  C08G64/00

CPC classification number: C09K15/322 ,  C07C231/02 ,  C08G61/00 ,  C08G61/10 ,  C08G2261/1422 ,  C08G2261/1426 ,  C08G2261/1432 ,  C08K5/04 ,  C08K5/20 ,  C08K5/52 ,  C08K13/02 ,  C07C235/38

Abstract: Disclosed are compositions comprising antioxidants and stabilizers, such as, acid scavengers or organic phosphorus stabilizers, and optionally further comprising co-stabilizers. The disclosed compositions are useful as stabilizers for polyolefins and other polymeric materials. The disclosed compositions and methods generally provide longer shelf lifes and better oxidative resistance to materials than currently available antioxidants.

Abstract translation: 公开了包含抗氧化剂和稳定剂的组合物，例如酸清除剂或有机磷稳定剂，以及任选地还包含共稳定剂。 所公开的组合物可用作聚烯烃和其它聚合物材料的稳定剂。 所公开的组合物和方法通常比目前可获得的抗氧化剂提供更长的保质期和对材料的更好的抗氧化性。

公开(公告)号：US07999369B2

公开(公告)日：2011-08-16

申请号：US11511516

申请日：2006-08-29

Applicant: Rajesh Kumar Malhan ,  C. Mark Johnson ,  Cyril Buttay ,  Jeremy Rashid ,  Florin Udrea

Inventor： Rajesh Kumar Malhan ,  C. Mark Johnson ,  Cyril Buttay ,  Jeremy Rashid ,  Florin Udrea

IPC: H01L23/48

CPC classification number: H01L23/49844 ,  H01L23/5385 ,  H01L24/31 ,  H01L24/83 ,  H01L25/072 ,  H01L25/18 ,  H01L2224/33 ,  H01L2224/81894 ,  H01L2224/83801 ,  H01L2224/83894 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13062 ,  H01L2924/13091 ,  H01L2924/00

Abstract: A power electronic package includes: first and second high thermal conductivity insulating non-planar substrates; and multiple semiconductor chips and electronic components between the substrates. Each substrate includes multiple electrical insulator layers and patterned electrical conductor layers connecting to the electronic components, and further includes multiple raised regions or posts, which are bonded together so that the substrates are mechanically and electrically connected. The number, arrangement, and shape of the raised regions or posts are adjusted to have mechanical separation between the substrates. The electrical conductor layers are separated and isolated one another so that multiple electric circuits are provided on at least one of the substrates.

Abstract translation: 电力电子封装包括：第一和第二高导热绝缘非平面基板; 以及基板之间的多个半导体芯片和电子部件。 每个衬底包括多个电绝缘体层和连接到电子部件的图案化电导体层，并且还包括多个凸起区域或柱体，这些凸起区域或柱体被结合在一起，使得衬底机械地和电连接。 调整凸起区域或柱的数量，布置和形状以在基板之间具有机械分离。 电导体层彼此分离和隔离，使得在至少一个基板上设置多个电路。

公开(公告)号：US20110191904A1

公开(公告)日：2011-08-04

申请号：US12972408

申请日：2010-12-17

Applicant: Rajesh Kumar ,  Henry T. Nguyen

Inventor： Rajesh Kumar ,  Henry T. Nguyen

IPC: C12N15/82 ,  A01H5/00

CPC classification number: C12N15/8247

Abstract: Cytochrome b5 (Cb5) is a haem-binding protein located in the endoplasmic reticulum (ER) and the outer mitochondrial membranes of higher eukaryotes. In higher plants, animals, and fungi, the ER resident Cb5 has been shown to play a role in desaturation of acyl CoA fatty acids. Higher plants Cb5 isoforms from plants such as soybean or Arabidopsis are capable of modulating omega-3 desaturation. Co-expression of certain Cb5 isoforms with FAD3 in a host plant results in increased production of seed oil content as well as altered ratio between different fatty acids. It is also disclosed here that overexpression of Yarrowia ACL enzymes in the plastids of a host plant helps boost the synthesis of acetyl CoA, which in turn, may lead to increased synthesis of fatty acids and enhanced oil accumulation in the seeds.

Abstract translation: 细胞色素b5（Cb5）是位于内质网（ER）中的血液结合蛋白和高等真核生物的外线粒体膜。 在高等植物，动物和真菌中，已经显示ER居民Cb5在酰基辅酶A脂肪酸的去饱和中起作用。 来自植物如大豆或拟南芥的高等植物Cb5异构体能够调节ω-3去饱和。 某些Cb5异构体与宿主植物中的FAD3的共表达导致种子油含量的产量增加以及不同脂肪酸之间的比例改变。 这里还公开了耶氏酵母属ACL酶在宿主植物的质体中的过表达有助于促进乙酰辅酶A的合成，这反过来可能导致脂肪酸的合成增加并增强种子中的油积聚。

公开(公告)号：US07978656B2

公开(公告)日：2011-07-12

申请号：US12055019

申请日：2008-03-25

Applicant: Nileshkumar J. Parekh ,  Rajesh Kumar ,  Maksim (Max) Krasnyanskiy ,  Eric Hall

Inventor： Nileshkumar J. Parekh ,  Rajesh Kumar ,  Maksim (Max) Krasnyanskiy ,  Eric Hall

IPC: H04L12/28 ,  H04L12/56

CPC classification number: H04L1/1642

Abstract: Systems and methodologies are described that facilitate maintaining consistent radio-link layer protocol (RLP) sequence numbers in the event of an RLP sequence number reset. An offset can be adjusted upon occurrence of the event to reflect a subsequent expected sequence number. The offset can be added to the RLP sequence numbers such that receiving devices and/or higher layer applications can operate without realizing the sequence number reset. Additionally, the offset can be synchronized among base stations to facilitate operability following handoff of the receiving device.

Abstract translation: 描述了在RLP序列号重置的情况下有助于维持一致的无线电链路层协议（RLP）序列号的系统和方法。 发生事件时可以调整偏移量以反映随后的预期序列号。 可以将偏移量添加到RLP序列号，使得接收设备和/或更高层应用可以在不实现序列号重置的情况下操作。 此外，可以在基站之间同步偏移，以便于在接收设备切换之后的可操作性。

公开(公告)号：US20110156054A1

公开(公告)日：2011-06-30

申请号：US12976116

申请日：2010-12-22

Applicant: Yuuichi TAKEUCHI ,  Rajesh Kumar Malhan ,  Naohiro Sugiyama

Inventor： Yuuichi TAKEUCHI ,  Rajesh Kumar Malhan ,  Naohiro Sugiyama

IPC: H01L29/24 ,  H01L21/337 ,  H01L21/336

CPC classification number: H01L29/0847 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/7828

Abstract: A silicon carbide semiconductor device having a JFET or a MOSFET includes a semiconductor substrate and a trench. The semiconductor substrate has a silicon carbide substrate, a drift layer on the silicon carbide substrate, a first gate region on the drift layer, and a source region on the first gate region. The trench has a strip shape with a longitudinal direction and reaches the drift layer by penetrating the source region and the first gate region. The trench is filled with a channel layer and a second gate region on the channel layer. The source region is not located at an end portion of the trench in the longitudinal direction.

Abstract translation: 具有JFET或MOSFET的碳化硅半导体器件包括半导体衬底和沟槽。 半导体衬底具有碳化硅衬底，碳化硅衬底上的漂移层，漂移层上的第一栅极区域和第一栅极区域上的源极区域。 沟槽具有纵向方向的带状，并通过穿透源极区域和第一栅极区域而到达漂移层。 在沟道层上填充沟道层和第二栅极区域。 源极区域不位于沟槽的纵向方向的端部。

公开(公告)号：US20110156052A1

公开(公告)日：2011-06-30

申请号：US12926894

申请日：2010-12-16

Applicant: Rajesh Kumar Malhan ,  Yuuichi Takeuchi ,  Naohiro Sugiyama

Inventor： Rajesh Kumar Malhan ,  Yuuichi Takeuchi ,  Naohiro Sugiyama

IPC: H01L29/24 ,  H01L29/80 ,  H01L21/337

CPC classification number: H01L29/808 ,  H01L29/045 ,  H01L29/1066 ,  H01L29/1608 ,  H01L29/66068

Abstract: A semiconductor device having a JFET includes: a substrate made of semi-insulating semiconductor material; a gate region in a surface portion of the substrate; a channel region disposed on and contacting the gate region; a source region and a drain region disposed on both sides of the gate region so as to sandwich the channel region, respectively; a source electrode electrically coupled with the source region; a drain electrode electrically coupled with the drain region; and a gate electrode electrically coupled with the gate region. An impurity concentration of each of the source region and the drain region is higher than an impurity concentration of the channel region.

Abstract translation: 具有JFET的半导体器件包括：由半绝缘半导体材料制成的衬底; 在所述基板的表面部分中的栅极区域; 设置在栅区上并与其接触的沟道区; 源极区域和漏极区域，分别设置在栅极区域的两侧，以夹持沟道区域; 源极，与源极电耦合; 漏极，与漏极区电耦合; 以及与栅极区域电耦合的栅电极。 源极区域和漏极区域中的每一个的杂质浓度高于沟道区域的杂质浓度。