公开(公告)号：US12266058B2

公开(公告)日：2025-04-01

申请号：US17897608

申请日：2022-08-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinseon Yoo ,  Sujin Lee ,  Minkyu Jung ,  Jongwoo Jung

IPC: G09G5/00 ,  G02B1/04 ,  G06T19/00 ,  G02B27/01

Abstract: An electronic device according to various embodiments may include: a frame, a window supported by the frame, a display configured to output visual information to the window, a camera disposed in the frame configured to photograph a front of the frame, a communication module comprising communication circuitry, a memory, and a processor. The memory may store instructions that, when executed, cause the processor to: establish a communication connection with an external device through the communication module, acquire display attribute information of at least one first display connected to the external device, and display at least one virtual object having a same display attribute as the at least one first display in at least a portion of an area corresponding to a field of view of a user wearing the electronic device, based on the acquired display attribute information. The display attribute information may include at least one of a magnification, a resolution, a display orientation, or a use or not of multiple displays, of the first display.

公开(公告)号：US12265835B2

公开(公告)日：2025-04-01

申请号：US18322919

申请日：2023-05-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinshik Bae ,  Kwanjin Jung ,  Hyunchul Seok ,  Daehyun Cho ,  Hanju Bae ,  Mooyoung Kim ,  Minjung Kim

IPC: G06F9/451 ,  G06F1/16

Abstract: An electronic device may include: a housing including a first housing and a second housing movable with respect to the first housing; a flexible display in which a display area for displaying a screen is expanded or reduced as the second housing moves with respect to the first housing; a memory; and a processor, wherein the processor is configured to: identify a change in the size of the display area on the basis of the movement of the second housing relative to the first housing; determine an application to be preloaded from among a plurality of applications on the basis of the identified size of the display area; load, into the memory, a preload process including some of resources for executing the determined application to be preloaded; and, in response to the occurrence of an event associated with the execution of the application to be preloaded, load an activity for the execution of the application by using the loaded preload process.

公开(公告)号：US12265741B2

公开(公告)日：2025-04-01

申请号：US18345492

申请日：2023-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Wonik Seo ,  Dong-Uk Ryu ,  Sungduk Cho

IPC: G06F3/06

Abstract: A method including updating memory allocation information of a UVM based on block information of model data blocks used for an execution of a deep learning model by a deep learning framework, and performing a least recently used (LRU) eviction based on the updated memory allocation information.

公开(公告)号：US12265200B2

公开(公告)日：2025-04-01

申请号：US17512658

申请日：2021-10-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Haeri Park Hanania ,  Hyuck Choo

IPC: G02B1/00 ,  A61B3/16 ,  G01L11/02 ,  G02B5/00

Abstract: The present example embodiment relates generally to creating a specific nanostructure on a substrate to improve the angle independence of a surface plasmon resonance mode. It may comprise a metamaterial structure comprising nanostructures located in a pattern on or within a substrate. The nanostructures may be paraboloid shaped and periodic.

公开(公告)号：US12264431B2

公开(公告)日：2025-04-01

申请号：US17309347

申请日：2019-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Pil Seo ,  Eui Young Chang ,  Seong-Min Oak

IPC: D06F58/12 ,  D06F58/20

Abstract: The clothes care apparatus includes a main body having a clothes care compartment, a blowing device configured such that an airflow is formed inside the clothes care compartment, a hanger configured to hang clothes in the clothes care compartment and allow the airflow generated by the blowing device to flow through the inside of the hanger, a hanger plate on which the hanger is detachably provided, and a tilting device configured to tilt the hanger plate.

公开(公告)号：US20250107461A1

公开(公告)日：2025-03-27

申请号：US18753575

申请日：2024-06-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Changyup PARK ,  Young Jae Kang ,  DongGeon Gu ,  Bonwon Koo ,  Segab Kwon ,  Dongho Ahn ,  Changseung Lee ,  Yongnam Ham

IPC: H10N70/00 ,  C22C30/00 ,  H10B63/00

Abstract: Provided are variable resistance materials and a variable resistance memory devices including the same. The variable resistance memory device includes: a first electrode; a first variable resistance material on the first electrode; and a second electrode on the first variable resistance material. The first variable resistance material includes germanium, antimony, tellurium, carbon, and sulfur and is expressed by CpSqGexSbyTez, where p is an atomic concentration of carbon, q is an atomic concentration of sulfur, x is an atomic concentration of germanium, y is an atomic concentration of antimony, and z is an atomic concentration of tellurium, wherein a sum of p, q, x, y, and z equals 1, wherein each of p, q, x, y, and z is greater than zero, and wherein q is greater than 0.01 and is less than or equal to about 0.2.

公开(公告)号：US20250107208A1

公开(公告)日：2025-03-27

申请号：US18976637

申请日：2024-12-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changhyun KIM ,  Seunggeol NAM ,  Keunwook SHIN ,  Dohyun LEE

IPC: H01L29/45 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/78 ,  H01L29/786

Abstract: A semiconductor device includes a first source/drain structure including a first semiconductor region and a first electrode in electrical contact with the first semiconductor region; a second source/drain structure including a second semiconductor region and a second electrode in electrical contact with the second semiconductor region; a channel between the first semiconductor region and the second semiconductor region; and a gate structure including a gate insulating film covering the channel and a gate electrode covering the gate insulating film. The first source/drain structure further includes a silicide film between the first semiconductor region and the first electrode and a conductive barrier between the silicide film and the first electrode. The conductive barrier includes a conductive two-dimensional material.

公开(公告)号：US20250107201A1

公开(公告)日：2025-03-27

申请号：US18972067

申请日：2024-12-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byounghak Hong ,  Seunghyun Song ,  Kang-ill Seo ,  Daewon Ha ,  Jason Martineau

IPC: H01L29/40 ,  H01L21/8238 ,  H01L27/092 ,  H01L29/49

Abstract: Presented are structures and methods for forming such structures that allow for electrical or diffusion breaks between transistors of one level of a stacked transistor device, without necessarily requiring that a like electrical or diffusion break exists in another level of the stacked transistor device. Also presented, an electrical break between transistor devices may be formed by providing a channel of a first polarity with a false gate comprising a work-function metal of an opposite polarity.

公开(公告)号：US20250107185A1

公开(公告)日：2025-03-27

申请号：US18738197

申请日：2024-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyohoon BYEON ,  Seokhoon Kim ,  Pankwi Park ,  Sungkeun Lim ,  Yuyeong Jo

IPC: H01L29/08 ,  H01L21/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, and including a plurality of semiconductor patterns spaced apart from each other and vertically stacked, a gate electrode on the plurality of semiconductor patterns, and extending in a first horizontal direction, a gate spacer disposed on a sidewall of the gate electrode in a second horizontal direction crossing the first horizontal direction, a source/drain pattern electrically connected to the plurality of semiconductor patterns, and including a first epitaxial pattern and a second epitaxial pattern on a side surface of the first epitaxial pattern in the second horizontal direction, and a protection pattern between at least one of the plurality of semiconductor patterns and the gate spacer and including a material having an etch selectivity with the first epitaxial pattern.

公开(公告)号：US20250107172A1

公开(公告)日：2025-03-27

申请号：US18974171

申请日：2024-12-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Byounghak Hong ,  Seungchan Yun ,  Kang-ill Seo

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786

Abstract: A multi-stack semiconductor device includes: a substrate; a multi-stack transistor formed on the substrate and including a nanosheet transistor and a fin field-effect transistor (FinFET) above the nanosheet transistor, wherein the nanosheet transistor includes a plurality nanosheet layers surrounded by a lower gate structure except between the nanosheet layers, the FinFET includes at least one fin structure, of which at least top and side surfaces are surrounded by an upper gate structure, and each of the lower and upper gate structures includes: a gate oxide layer formed on the nanosheet layers and the at least one fin structure; and a gate metal pattern formed on the gate oxide layer. At least one of the lower and upper gate structures includes an extra gate (EG) oxide layer formed between the gate oxide layer and the nanosheet layers and/or between the gate oxide layer and the at least one fin structure.