公开(公告)号：US20170162115A1

公开(公告)日：2017-06-08

申请号：US15364350

申请日：2016-11-30

Applicant: InnoLux Corporation

Inventor： Lien-Hsiang CHEN ,  Kung-Chen KUO ,  Ming-Chun TSENG ,  Cheng-Hsu CHOU ,  Kuan-Feng LEE

IPC: G09G3/3233 ,  H01L27/32

CPC classification number: G09G3/3233 ,  G09G2300/0426 ,  G09G2300/043 ,  G09G2300/0809 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0233 ,  G09G2320/045 ,  G09G2330/021 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/3262

Abstract: A driving circuit includes a current drive unit and a reset compensation and light emitting control circuit. The current drive unit includes a first transistor and a second transistor. The first transistor and the second transistor are connected in series, wherein the first transistor and the second transistor include a silicon semiconductor layer. The reset compensation and light emitting control circuit is coupled to the current drive unit. The reset compensation and light emitting control circuit includes a third transistor connected to a control terminal of the first transistor, wherein the third transistor is an oxide semiconductor transistor.

公开(公告)号：US20170117303A1

公开(公告)日：2017-04-27

申请号：US15333232

申请日：2016-10-25

Applicant: InnoLux Corporation

Inventor： Kuan-Feng LEE ,  Yuan-Lin WU ,  Shou-Pu YEH

IPC: H01L27/12 ,  H01L21/66 ,  H01L29/786

CPC classification number: H01L27/1233 ,  H01L22/14 ,  H01L27/1225 ,  H01L27/127 ,  H01L29/78678 ,  H01L29/7869 ,  H01L29/78696

Abstract: A display device is disclosed, which includes: a substrate having a display region; and a first thin film transistor (TFT) unit disposed on the display region and comprising: a first gate electrode disposed on the substrate; a first insulating layer disposed on the first gate electrode; a first semiconductor layer disposed on the first insulating layer, wherein the first semiconductor layer has a top surface which comprises a concave region and a non-concave region; and a first source electrode and a first drain electrode disposed on the top surface of the first semiconductor layer, wherein the first semiconductor layer has a first thickness corresponding to the concave region, and the first semiconductor layer has a second thickness corresponding to the non-concave region, wherein the second thickness is greater than the first thickness.

公开(公告)号：US20160225879A1

公开(公告)日：2016-08-04

申请号：US15096616

申请日：2016-04-12

Applicant: INNOCOM TECHNOLOGY(SHENZHEN) CO., LTD. ,  InnoLux Corporation

Inventor： Kuan-Feng LEE

IPC: H01L29/66 ,  H01L21/033

CPC classification number: H01L29/66742 ,  H01L21/0274 ,  H01L21/0334 ,  H01L29/66765 ,  H01L29/66969 ,  H01L29/786 ,  H01L29/7869

Abstract: The invention provides a manufacturing method of a thin film transistor substrate including: sequentially forming a gate electrode, a gate insulating layer covering the gate electrode, an active material layer, and a photo-sensitive material layer on a first substrate; performing a photolithography process by using a half tone mask to form a protective layer which is above the gate electrode and has a first recess and a second recess; wet etching the active material layer by using the protective layer as a mask to form an active layer; removing a portion of the protective layer at bottoms of the first recess and the second recess to expose a first portion and a second portion of the active layer respectively; forming a first electrode connecting to the first portion; and forming a second electrode connecting to the second portion.

Abstract translation: 本发明提供一种薄膜晶体管衬底的制造方法，包括：在第一衬底上依次形成栅电极，覆盖栅电极的栅极绝缘层，活性材料层和光敏材料层; 通过使用半色调掩模进行光刻处理以形成位于栅电极上方并具有第一凹部和第二凹部的保护层; 通过使用保护层作为掩模来湿法蚀刻活性物质层以形成活性层; 在所述第一凹部和所述第二凹部的底部移除所述保护层的一部分以分别暴露所述活性层的第一部分和第二部分; 形成连接到所述第一部分的第一电极; 以及形成连接到所述第二部分的第二电极。

公开(公告)号：US20160172384A1

公开(公告)日：2016-06-16

申请号：US15019853

申请日：2016-02-09

Applicant: INNOLUX CORPORATION

Inventor： Kuan-Feng LEE

IPC: H01L27/12 ,  G02F1/1368 ,  H01L27/32

CPC classification number: H01L27/1225 ,  G02F1/1368 ,  H01L21/02362 ,  H01L27/124 ,  H01L27/3258 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869

Abstract: The invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall of the gate electrode; a gate insulating layer disposed on the first diffusion barrier layer; an active layer disposed on the gate insulating layer and over the gate electrode; a source electrode disposed on the substrate and electrically connected to the active layer; a drain electrode disposed on the substrate and electrically connected to the active layer; and a protective layer covering the source electrode and the drain electrode.

Abstract translation: 本发明提供一种薄膜晶体管基板，包括：基板; 以及多个晶体管，其中每个所述晶体管包括设置在所述衬底上的栅电极; 第一扩散阻挡层，设置在所述基板上并覆盖所述栅电极的上表面和环侧壁; 设置在所述第一扩散阻挡层上的栅绝缘层; 设置在所述栅极绝缘层上并在所述栅电极上方的有源层; 源电极，其设置在所述基板上并电连接到所述有源层; 漏电极，设置在所述基板上并电连接到所述有源层; 以及覆盖源电极和漏电极的保护层。

公开(公告)号：US20160111453A1

公开(公告)日：2016-04-21

申请号：US14880472

申请日：2015-10-12

Applicant: InnoLux Corporation

Inventor： Kuan-Feng LEE ,  Tzu-Min YAN

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1248 ,  H01L27/1225 ,  H01L27/124

Abstract: Disclosed is a TFT substrate, including a substrate and a gate electrode thereon. A gate insulation layer over the substrate covers the gate electrode. An active layer is disposed over the gate insulation layer. An etch stop layer is disposed over the active layer and the gate insulation layer. A first opening penetrates the etch stop layer to expose a first part of the active layer. A source electrode over the etch stop layer is electrically connected to the first part of the active layer through the first opening. A first inorganic insulation layer is disposed over the source electrode and the etch stop layer. A second opening penetrates the first inorganic insulation layer and the etch stop layer to expose a second part of the active layer.

Abstract translation: 公开了一种TFT基板，其上包括基板和栅电极。 衬底上的栅极绝缘层覆盖栅电极。 有源层设置在栅绝缘层上。 蚀刻停止层设置在有源层和栅极绝缘层之上。 第一开口穿透蚀刻停止层以暴露活性层的第一部分。 蚀刻停止层上的源电极通过第一开口电连接到有源层的第一部分。 第一无机绝缘层设置在源电极和蚀刻停止层上。 第二开口穿透第一无机绝缘层和蚀刻停止层，以露出活性层的第二部分。

公开(公告)号：US20160091744A1

公开(公告)日：2016-03-31

申请号：US14962796

申请日：2015-12-08

Applicant: InnoLux Corporation

Inventor： Kuan-Feng LEE ,  Ming-Chang LIN ,  Ying-Tong LIN

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1362

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/136227

Abstract: A display panel includes a thin film transistor substrate, an opposite substrate and a liquid crystal layer. A thin film transistor is disposed on a substrate and has a drain. A first insulating layer is disposed on the drain and has a first via above the drain. A planarization layer is disposed on the first insulating layer and has a second via above the drain. The first via and the second via are partially overlapped to form an overlap portion. A second insulating layer is disposed on the planarization layer. A pixel electrode layer is disposed on the second insulating layer and in the overlap portion to connect to the drain. The opposite substrate is disposed opposite to the thin film transistor substrate. The liquid crystal layer is disposed between the thin film transistor substrate and the opposite substrate.

Abstract translation: 显示面板包括薄膜晶体管基板，相对基板和液晶层。 薄膜晶体管设置在基板上并具有漏极。 第一绝缘层设置在漏极上并且在漏极上方具有第一通孔。 平坦化层设置在第一绝缘层上，并且在漏极上方具有第二通孔。 第一通孔和第二通孔部分地重叠以形成重叠部分。 第二绝缘层设置在平坦化层上。 像素电极层设置在第二绝缘层上和重叠部分中以连接到漏极。 相对的基板与薄膜晶体管基板相对设置。 液晶层设置在薄膜晶体管基板和相对基板之间。

公开(公告)号：US20130320317A1

公开(公告)日：2013-12-05

申请号：US13910424

申请日：2013-06-05

Applicant: INNOLUX CORPORATION

Inventor： Kuan-Feng LEE

IPC: H01L29/786

CPC classification number: H01L27/1225 ,  G02F1/1368 ,  H01L21/02362 ,  H01L27/124 ,  H01L27/3258 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/786 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869

Abstract: An embodiment of the invention provides a thin film transistor substrate includes: a substrate; and a plurality of transistors, wherein each of the transistors includes a gate electrode disposed on the substrate; a first diffusion barrier layer disposed on the substrate and covering an upper surface and a ring sidewall of the gate electrode; a gate insulating layer disposed on the first diffusion barrier layer; an active layer disposed on the gate insulating layer and over the gate electrode; a source electrode disposed on the substrate and electrically connected to the active layer; a drain electrode disposed on the substrate and electrically connected to the active layer; and a protective layer covering the source electrode and the drain electrode.