Home network system
    242.
    发明申请
    Home network system 审中-公开
    家庭网络系统

    公开(公告)号:US20070019615A1

    公开(公告)日:2007-01-25

    申请号:US10558432

    申请日:2004-05-14

    Abstract: The present invention discloses a home network system (1) using a living network control protocol. The home network system (1) includes: at least two electric devices (41-49); and a network based on a predetermined protocol for connecting the electric devices (41-49), wherein a message transmitted between one electric device (41-49) and the other electric device (41-49) includes a command code field implying an operation that is to be performed by the other electric device (41-49), and an argument field according to a version of a protocol applied to one electric device (41-49) for performing the operation.

    Abstract translation: 本发明公开了一种使用生活网络控制协议的家庭网络系统(1)。 家庭网络系统(1)包括:至少两个电子设备(41-49); 以及基于用于连接电气设备的预定协议的网络(41-49),其中在一个电气设备(41-49)和另一个电子设备(41-49)之间传输的消息包括指示操作的命令代码字段 (41-49),以及根据应用于一个电气设备(41-49)的协议的版本的参数字段来执行该操作。

    Fabrication method of self-aligned ferroelectric gate transistor using buffer layer of high etching selectivity
    243.
    发明授权
    Fabrication method of self-aligned ferroelectric gate transistor using buffer layer of high etching selectivity 有权
    使用高蚀刻选择性的缓冲层的自对准铁电栅极晶体管的制造方法

    公开(公告)号:US07151001B2

    公开(公告)日:2006-12-19

    申请号:US10922949

    申请日:2004-08-23

    CPC classification number: H01L29/6684 H01L21/2652 H01L21/28291 H01L29/66575

    Abstract: A fabrication method of a self-aligned ferroelectric gate transistor using a buffer layer of high etching selectivity is disclosed. A stacked structure is formed with a buffer layer with high etching selectivity inserted between a silicon substrate and a ferroelectric layer, and etching is performed on a portion where a source and a drain will be formed and then stopped at the buffer layer, thereby fabricating a self-aligned ferroelectric gate transistor without damage to the silicon thin film, and thus, an integration degree of a chip can be improved.

    Abstract translation: 公开了使用具有高蚀刻选择性的缓冲层的自对准铁电栅极晶体管的制造方法。 在硅衬底和铁电体层之间形成具有高蚀刻选择性的缓冲层的堆叠结构,并且对形成源极和漏极的部分进行蚀刻,然后在缓冲层处停止, 自对准的铁电栅极晶体管,而不损坏硅薄膜,从而可以提高芯片的集成度。

    Uv-cured multi-component polymer blend electrolyte, lithium secondary battery and their fabrication method
    245.
    发明申请
    Uv-cured multi-component polymer blend electrolyte, lithium secondary battery and their fabrication method 有权
    Uv固化多组分聚合物共混电解质,锂二次电池及其制造方法

    公开(公告)号:US20050221194A1

    公开(公告)日:2005-10-06

    申请号:US10275384

    申请日:2001-01-31

    Abstract: The present invetion relates to a UV-cured multi-component polymer blend electrolyte, lithium secondary battery and their fabrication method, wherein the UV-cured multi-component polymer blend electrolyte, comprises: A) function-I polymer obtained by curing ethyleneglycoldi-(meth)acrylate oligomer of formula 1 by UV irradiation, CH2═CR1COO(CH2CH2O)nCOCR2═CH2 (1) wherein,R1 and R2 are independently a hydrogen or methyl group, and n is an integer of 3-20;B) function-II polymer selected from the group consisting of PAN-based polymer, PMMA-based polymer and mixtures thereof; C) function-III polymer selected from the group consisting of PVdF-based polymer, PVC-based polymer and mixtures thereof; and D) organic electrolyte solution in which lithium salt is dissolved in a solvent.

    Abstract translation: 本发明涉及一种UV固化多组分聚合物共混电解质,锂二次电池及其制造方法,其中UV固化的多组分聚合物共混电解质包括:A)通过将乙二醇(( 甲基)丙烯酸酯低聚物,通过UV照射,CH 2 CO 2(CH 2 CH 2 CH 2) (1)其中,R 1和R 2各自独立地为氢, / SUP>独立地为氢或甲基,n为3-20的整数; B)选自PAN基聚合物,PMMA基聚合物及其混合物的官能团II聚合物; C)选自PVdF基聚合物,基于PVC的聚合物及其混合物的功能III聚合物; 和D)其中锂盐溶解在溶剂中的有机电解质溶液。

    Split gate type nonvolatile semiconductor memory device, and method of fabricating the same
    246.
    发明申请
    Split gate type nonvolatile semiconductor memory device, and method of fabricating the same 失效
    分路型非易失性半导体存储器件及其制造方法

    公开(公告)号:US20050208744A1

    公开(公告)日:2005-09-22

    申请号:US11083130

    申请日:2005-03-17

    Abstract: A split gate type nonvolatile semiconductor memory device and a method of fabricating a split gate type nonvolatile semiconductor memory device are provided. A gate insulating layer and a floating-gate conductive layer are formed on a semiconductor substrate. A mask layer pattern is formed on the floating-gate conductive layer to define a first opening extending in a first direction. First sacrificial spacers having a predetermined width are formed on both sidewalls corresponding to the mask layer pattern. An inter-gate insulating layer is formed on the floating-gate conductive layer. The first sacrificial spacers are removed, and the floating-gate conductive layer is etched until the gate insulating layer is exposed. A tunneling insulating layer is formed on an exposed portion of the floating-gate conductive layer. A control-gate conductive layer is formed on a surface of the semiconductor substrate. Second sacrificial spacers having predetermined widths are formed on the control-gate conductive layer. A split control gate is formed in the first opening, by etching the exposed control-gate conductive layer. The remaining mask layer pattern and inter-gate insulating layer are etched until the floating-gate conductive layer is exposed. The exposed floating-gate conductive layer is etched to form a split floating gate in the first opening.

    Abstract translation: 提供一种分离栅极型非易失性半导体存储器件及其制造分离栅型非易失性半导体存储器件的方法。 在半导体衬底上形成栅绝缘层和浮栅导电层。 掩模层图案形成在浮栅导电层上以限定沿第一方向延伸的第一开口。 具有预定宽度的第一牺牲间隔物形成在对应于掩模层图案的两个侧壁上。 栅极间绝缘层形成在浮栅导电层上。 去除第一牺牲间隔物,并且蚀刻浮栅导电层,直到露出栅极绝缘层。 隧道绝缘层形成在浮栅导电层的露出部分上。 在半导体衬底的表面上形成控制栅导电层。 在控制栅极导电层上形成具有预定宽度的第二牺牲间隔物。 通过蚀刻暴露的控制栅极导电层,在第一开口中形成分裂控制栅极。 蚀刻剩余的掩模层图案和栅极间绝缘层,直到浮栅导电层露出。 蚀刻暴露的浮栅导电层,以在第一开口中形成分离浮栅。

    Memory device using a transistor and its fabrication method
    248.
    发明授权
    Memory device using a transistor and its fabrication method 失效
    使用晶体管的存储器件及其制造方法

    公开(公告)号:US06532166B1

    公开(公告)日:2003-03-11

    申请号:US09623501

    申请日:2000-09-19

    CPC classification number: G11C11/22 H01L27/108 H01L27/1203 H01L29/78391

    Abstract: The present invention provides a memory device by using a single transistor, comprising a circuit including a gate of a memory cell and a P type well substrate for inputting(writing) information and another circuit including a source and a drain for outputting(reading) information. In other word, the memory device includes an information input/output circuit by using a pair of respective read and write terminals. The transistor comprises a source, a drain, and a ferroelectric element gate which are formed in a P type(or N type) well substrate. And the present invention provides a fabrication method for manufacturing the memory circuit, comprising depositing the P type (or N type) well structure on a Si wafer and forming the source, the drain and then the gate in the P type(or N type) well structure.

    Abstract translation: 本发明提供了一种使用单个晶体管的存储器件,包括一个包括一个存储单元的栅极的电路和一个用于输入(写入)信息的P型阱衬底,另一个电路包括用于输出(读取)信息的源极和漏极 。 换句话说,存储器件通过使用一对相应的读取和写入端子包括信息输入/输出电路。 晶体管包括形成在P型(或N型)阱衬底中的源极,漏极和铁电元件栅极。 本发明提供一种用于制造存储电路的制造方法,包括在Si晶片上沉积P型(或N型)阱结构,并形成P型(或N型)源极,漏极和栅极, 井结构。

    Transmitter for transmitting data for constituting content, receiver for receiving and processing data, and method therefor
    249.
    发明授权
    Transmitter for transmitting data for constituting content, receiver for receiving and processing data, and method therefor 有权
    用于发送用于构成内容的数据的发送器,用于接收和处理数据的接收器及其方法

    公开(公告)号:US09491437B2

    公开(公告)日:2016-11-08

    申请号:US13992297

    申请日:2011-12-07

    Abstract: A receiver is disclosed. The receiver comprises: a first receiving unit for receiving non-real-time data for constituting multimedia content; a storage unit for storing the non-real-time data; a second receiving unit for receiving real-time data for constituting multimedia content; a data processing unit which, if the real-time data has been received, detects the non-real-time data, in conjunction with the real-time data, from among the data stored in the storage unit, binds the detected non-real-time data and the received real-time data, and outputs multimedia content; and a control unit for controlling the data processing unit so as to restrict the output of the non-real-time data prior to the time of the output of the real-time data.

    Abstract translation: 公开了接收机。 接收机包括:第一接收单元,用于接收用于构成多媒体内容的非实时数据; 用于存储非实时数据的存储单元; 第二接收单元,用于接收用于构成多媒体内容的实时数据; 数据处理单元,如果已经接收到实时数据,则结合实时数据,从存储在存储单元中的数据中检测非实时数据,将检测到的非真实数据 时间数据和接收到的实时数据,并输出多媒体内容; 以及控制单元,用于控制数据处理单元,以便在实时数据的输出时间之前限制非实时数据的输出。

    Linear compressor having a controller and method for controlling a linear compressor
    250.
    发明授权
    Linear compressor having a controller and method for controlling a linear compressor 有权
    具有用于控制线性压缩机的控制器和方法的线性压缩机

    公开(公告)号:US09194386B2

    公开(公告)日:2015-11-24

    申请号:US13510294

    申请日:2010-11-18

    CPC classification number: F04B35/045 F04B49/065 F04B2203/0402

    Abstract: A linear compressor is provided that provides a greater power by changing a frequency at high load. The linear compressor includes a mechanical device having a fixed member, a movable member linearly reciprocated in the fixed member, one or more springs provided to elastically support the movable member, and a motor connected to the movable member, and an electric controller having a rectifier, an inverter that receives a DC voltage from the rectifier, converts the DC voltage to an AC voltage, and supplies the AC voltage to the motor, a voltage sensor that senses the DC voltage, a current sensor that senses a current, and a controller that calculates a required voltage for the motor, generates a control signal, and applies the control signal to the inverter, if the required voltage is greater than the DC voltage of the voltage sensor.

    Abstract translation: 提供了一种线性压缩机,通过在高负载下改变频率来提供更大的功率。 线性压缩机包括具有固定构件的机械装置,在固定构件中直线往复运动的可动构件,设置成弹性地支撑可动构件的一个或多个弹簧和连接到可动构件的电动机,以及具有整流器 接收来自整流器的直流电压的逆变器将直流电压转换为交流电压,将交流电压提供给电动机,检测直流电压的电压传感器,检测电流的电流传感器以及控制器 如果所需电压大于电压传感器的直流电压,则计算电动机的所需电压,产生控制信号,并将控制信号施加到逆变器。

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