公开(公告)号：US06451632B1

公开(公告)日：2002-09-17

申请号：US09934666

申请日：2001-08-22

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L2100

CPC分类号： H01L29/66765 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78618

摘要： The present invention provides a thin-film transistor substrate comprising: a gate electrode 40 and a gate insulating film 41 formed on a substrate 36; a semiconductor active film 42 oppositely provided on the gate electrode via the gate insulating film; a pair of ohmic contact films 43 and 44 separately provided on the semiconductor active film; a low-resistance silicon compound film 45 ranging from the ohmic contact films to the gate insulating film so as to cover the ohmic contact films and the portions of the semiconductor active film superposing with the ohmic contact films; and a source electrode 46 and a drain electrode 48 provided on the low-resistance silicon compound film.

摘要翻译： 本发明提供一种薄膜晶体管基板，包括：形成在基板36上的栅极40和栅极绝缘膜41; 通过栅极绝缘膜在栅电极上相对设置的半导体有源膜42; 分别设置在半导体活性膜上的一对欧姆接触膜43和44; 从欧姆接触膜到栅极绝缘膜的低电阻硅化合物膜45，以覆盖欧姆接触膜和与欧姆接触膜重叠的半导体有源膜的部分; 以及设置在低电阻硅化合物膜上的源电极46和漏电极48。

公开(公告)号：US06303946B1

公开(公告)日：2001-10-16

申请号：US09118481

申请日：1998-07-17

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L29786

CPC分类号： H01L29/66765 ,  H01L29/41733 ,  H01L29/458 ,  H01L29/78618

摘要： The present invention provides a thin-film transistor substrate comprising: a gate electrode 40 and a gate insulating film 41 formed on a substrate 36; a semiconductor active film 42 oppositely provided on the gate electrode via the gate insulating film; a pair of ohmic contact films 43 and 44 separately provided on the semiconductor active film; a low-resistance silicon compound film 45 ranging from the ohmic contact films to the gate insulating film so as to cover the ohmic contact films and the portions of the semiconductor active film superposing with the ohmic contact films; and a source electrode 46 and a drain electrode 48 provided on the low-resistance silicon compound film.

摘要翻译： 本发明提供一种薄膜晶体管基板，包括：形成在基板36上的栅极40和栅极绝缘膜41; 通过栅极绝缘膜在栅电极上相对设置的半导体有源膜42; 分别设置在半导体活性膜上的一对欧姆接触膜43和44; 从欧姆接触膜到栅极绝缘膜的低电阻硅化合物膜45，以覆盖欧姆接触膜和与欧姆接触膜重叠的半导体有源膜的部分; 以及设置在低电阻硅化合物膜上的源电极46和漏电极48。

公开(公告)号：US06852998B2

公开(公告)日：2005-02-08

申请号：US10385377

申请日：2003-03-07

申请人： Chae Gee Sung ,  Jo Gyoo Chul ,  Makoto Sasaki ,  Kazuyuki Arai

发明人： Chae Gee Sung ,  Jo Gyoo Chul ,  Makoto Sasaki ,  Kazuyuki Arai

IPC分类号： G09F9/30 ,  G02F1/1343 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/00 ,  H01L21/336 ,  H01L21/77 ,  H01L27/12 ,  H01L29/45 ,  H01L29/786 ,  H01L29/12

CPC分类号： H01L27/124 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/136295 ,  H01L27/1214 ,  H01L29/458 ,  H01L29/66757

摘要： A source line is directly connected to a source terminal composed of indium zinc oxide in a thin-film transistor substrate. A gate line is directly connected to a gate terminal composed of indium zinc oxide. Alternatively, drain electrodes of thin-film transistors for switching a plurality of pixel electrodes are directly connected to pixel electrodes composed of indium zinc oxide. These configurations do not require a passivation film which is essential for conventional thin-film transistor substrates, and the resulting thin-film transistor substrate can be made by a reduced number of manufacturing steps.

摘要翻译： 源极线直接连接到由薄膜晶体管衬底中的氧化铟锌构成的源极端子。 栅极线直接连接到由氧化铟锌构成的栅极端子。 或者，用于切换多个像素电极的薄膜晶体管的漏极直接连接到由氧化铟锌构成的像素电极。 这些配置不需要对于传统的薄膜晶体管衬底是必需的钝化膜，并且所得到的薄膜晶体管衬底可以通过减少数量的制造步骤来制造。

公开(公告)号：US06417900B1

公开(公告)日：2002-07-09

申请号：US09044568

申请日：1998-03-19

申请人： Hyunho Shin ,  Kuniaki Suzuki ,  Chae Gee Sung

发明人： Hyunho Shin ,  Kuniaki Suzuki ,  Chae Gee Sung

IPC分类号： G02F11333

CPC分类号： G02F1/133512 ,  G02F2001/136218

摘要： A liquid crystal display unit has wider viewing angles and a brighter display. In this display unit, an alignment film is not required to be processed for alignment of a liquid crystal, thereby simplifying the manufacturing process. A first substrate and a second substrate are disposed such that they face each other. A liquid crystal having a negative anisotropy of dielectric constant is provided between the substrates. A common electrode and an alignment film which has a pretilt angle of 90°±1° and which is not rubbed are sequentially disposed on the surface of the first substrate facing the second substrate. A plurality of pixel electrodes are provided on the surface of the second substrate facing the first substrate so as to cover a display area of the liquid crystal. A conductive light-shielding member is disposed on the second substrate and positioned around each of the pixel electrodes in a non-display area of the liquid crystal. The conductive light-shielding member is electrically insulated from the pixel electrode. An alignment film which has a pretilt angle of 90°±1° and which is not rubbed is formed on the pixel electrodes and on the light-shielding members. The conductive light-shielding member is set at substantially the same potential as the common electrode.

摘要翻译： 液晶显示单元具有更宽的视角和更亮的显示。 在该显示单元中，不需要对液晶的取向进行取向膜的取向膜，因此简化了制造工序。 第一基板和第二基板被设置为使得它们彼此面对。 在基板之间设置具有负的各向异性介电常数的液晶。 在第一基板的面向第二基板的表面上依次设置具有90°±1°的预倾角并且不被摩擦的公共电极和取向膜。 在与第一基板相对的第二基板的表面上设置多个像素电极以覆盖液晶的显示区域。 导电遮光构件设置在第二基板上并且位于液晶的非显示区域中的每个像素电极周围。 导电遮光部件与像素电极电绝缘。 在像素电极和遮光构件上形成具有90°±1°的预倾角且不被摩擦的取向膜。 导电遮光部件被设定为与公共电极大致相同的电位。

公开(公告)号：US06355943B1

公开(公告)日：2002-03-12

申请号：US09413653

申请日：1999-10-06

申请人： Chae Gee Sung

发明人： Chae Gee Sung

IPC分类号： H01L2904

CPC分类号： H01L29/4908

摘要： The invention intends to provide a TFT having a gate insulating film which has a high dielectric withstand voltage and can ensure a desired carrier mobility in an adjacent semiconductor active film. A gate electrode and a semiconductor active film are formed on a transparent substrate with a gate insulating film, which is formed of two layered insulating films, held between them. The gate insulating film is made up of a first gate insulating film which improves a withstand voltage between the gate electrode and the semiconductor active film, and a second gate insulating film which improves an interface characteristic between the gate insulating film and the semiconductor active film . The first and second gate insulating films are each formed of a SiNx film. The optical band gap of the first gate insulating film has a value in the range of 3.0 to 4.5 eV, and the optical band gap of the second gate insulating film has a value in the range of 5.0 to 5.3 eV.

摘要翻译： 本发明意图提供一种具有栅极绝缘膜的TFT，该栅极绝缘膜具有高的介电耐受电压并且可以确保相邻的半导体有源膜中所需的载流子迁移率。 在具有栅极绝缘膜的透明基板上形成栅电极和半导体有源膜，该绝缘膜由保持在它们之间的两层绝缘膜形成。 栅极绝缘膜由提高栅电极和半导体有源膜之间的耐受电压的第一栅极绝缘膜和改善栅极绝缘膜和半导体活性膜之间的界面特性的第二栅极绝缘膜构成。 第一和第二栅极绝缘膜各自由SiNx膜形成。 第一栅极绝缘膜的光学带隙的值在3.0〜4.5eV的范围内，第二栅极绝缘膜的光学带隙的值在5.0〜5.3eV的范围内。

公开(公告)号：US5824572A

公开(公告)日：1998-10-20

申请号：US825447

申请日：1997-03-28

申请人： Hirofumi Fukui ,  Chae Gee Sung

发明人： Hirofumi Fukui ,  Chae Gee Sung

IPC分类号： H01L21/28 ,  H01L21/306 ,  H01L21/336 ,  H01L29/45 ,  H01L29/786 ,  H01L21/00

CPC分类号： H01L29/66765 ,  H01L29/458 ,  H01L29/78669

摘要： A method of manufacturing a thin film transistor comprising the steps of: forming a gate electrode on the surface of a substrate; forming a gate insulation film covering the gate electrode; forming an active semiconductor layer and an ohmic contact layer on the gate insulation film; forming a source/drain electrode made of Cr; and removing a portion of the ohmic contact layer except for the portion in contact with the source/drain electrode by an etching solution, wherein the step of removing the ohmic contact layer is conducted in a state of at least partially or entirely peeling a resist on the source/drain electrode made of Cr.

摘要翻译： 一种制造薄膜晶体管的方法，包括以下步骤：在衬底的表面上形成栅电极; 形成覆盖所述栅电极的栅极绝缘膜; 在栅极绝缘膜上形成有源半导体层和欧姆接触层; 形成由Cr制成的源极/漏电极; 以及通过蚀刻溶液去除除与源/漏电极接触的部分之外的欧姆接触层的一部分，其中去除欧姆接触层的步骤在至少部分或完全剥离抗蚀剂的状态下进行 源极/漏极由Cr制成。