公开(公告)号：US08072570B2

公开(公告)日：2011-12-06

申请号：US12346850

申请日：2008-12-31

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： G02F1/1343

CPC分类号： G02F1/136227 ,  G02F1/133555 ,  G02F1/136213

摘要： A liquid crystal display panel includes a plurality of scan lines, a plurality of data lines, a pixel array, a plurality of first common electrode lines and at least one second common electrode line. The first common electrode lines receive a common electrode signal through at least one first input node positioned at a first side of the pixel array. The second common electrode line receives the common electrode signal through at least one second input node positioned at a second side of the pixel array. In addition, at least one first common electrode line is electrically connected to the second common electrode lines in the pixel array.

摘要翻译： 液晶显示面板包括多条扫描线，多条数据线，像素阵列，多条第一公共电极线和至少一条第二公共电极线。 第一公共电极线通过位于像素阵列的第一侧的至少一个第一输入节点接收公共电极信号。 第二公共电极线通过位于像素阵列的第二侧的至少一个第二输入节点接收公共电极信号。 此外，至少一个第一公共电极线电连接到像素阵列中的第二公共电极线。

公开(公告)号：US20100039598A1

公开(公告)日：2010-02-18

申请号：US12346850

申请日：2008-12-31

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： G02F1/1343

CPC分类号： G02F1/136227 ,  G02F1/133555 ,  G02F1/136213

摘要： A liquid crystal display panel includes a plurality of scan lines, a plurality of data lines, a pixel array, a plurality of first common electrode lines and at least one second common electrode line. The first common electrode lines receive a common electrode signal through at least one first input node positioned at a first side of the pixel array. The second common electrode line receives the common electrode signal through at least one second input node positioned at a second side of the pixel array. In addition, at least one first common electrode line is electrically connected to the second common electrode lines in the pixel array.

摘要翻译： 液晶显示面板包括多条扫描线，多条数据线，像素阵列，多条第一公共电极线和至少一条第二公共电极线。 第一公共电极线通过位于像素阵列的第一侧的至少一个第一输入节点接收公共电极信号。 第二公共电极线通过位于像素阵列的第二侧的至少一个第二输入节点接收公共电极信号。 此外，至少一个第一公共电极线电连接到像素阵列中的第二公共电极线。

公开(公告)号：US20070072322A1

公开(公告)日：2007-03-29

申请号：US11162867

申请日：2005-09-27

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： H01L21/00 ,  H01L51/40 ,  H01L21/44

CPC分类号： H01L27/1248 ,  H01L27/1214 ,  H01L27/1288 ,  H01L27/3246 ,  H01L27/3258 ,  H01L51/5206 ,  H01L51/56 ,  H01L2227/323

摘要： A method for fabricating a thin film transistor array substrate is provided. Wherein, a plurality of contact holes and recesses are formed in a protection layer disposed upon thin film transistors. Each recess comprises an under-cut profile while each contact hole exposes a drain-metal layer of a corresponding thin film transistor. Then, a transparent conductor layer is formed on the protection layer, which in turn fills in the contact holes so as to be electrically connected to the drain-metal layer. Besides, the transparent conductor layer automatically segregates at the recesses to form a plurality of pixel electrodes, whereby the plurality of pixel electrodes can be formed without the utilization of photolithography and etching processes and thus fabricating cost is lowered.

摘要翻译： 提供一种制造薄膜晶体管阵列基板的方法。 其中，在设置在薄膜晶体管上的保护层中形成多个接触孔和凹部。 每个凹槽包括底切轮廓，而每个接触孔暴露相应的薄膜晶体管的漏极 - 金属层。 然后，在保护层上形成透明导体层，该保护层又填充接触孔，以便电连接到漏极 - 金属层。 此外，透明导体层在凹部处自动分离以形成多个像素电极，由此可以在不利用光刻和蚀刻工艺的情况下形成多个像素电极，从而降低制造成本。

公开(公告)号：US20060214564A1

公开(公告)日：2006-09-28

申请号：US11089821

申请日：2005-03-24

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： H05B33/22 ,  H05B33/02 ,  H05B33/10

CPC分类号： H01L27/3272 ,  H01L27/3248 ,  H01L27/326

摘要： An organic electroluminescent display and a method for fabricating the same are provided. The present invention provides an organic electroluminescent display panel, including: a substrate with a plurality of pixel regions, wherein a device region and a light-emitting region is defined in each pixel region; an active device array, disposed in the device regions of the substrate; a transparent electrode layer, disposed over the substrate and coupled to the active device array; a light-shielding layer, disposed over the substrate, wherein the light-shielding layer at least covers the active device array and exposes the transparent electrode layer in the light-emitting regions; an organic functional layer, disposed over the transparent electrode layer exposed by the light-shielding layer; and an upper electrode layer, disposed over the organic functional layer.

摘要翻译： 提供一种有机电致发光显示器及其制造方法。 本发明提供了一种有机电致发光显示面板，包括：具有多个像素区域的基板，其中在每个像素区域中限定了器件区域和发光区域; 有源器件阵列，设置在衬底的器件区域中; 透明电极层，设置在所述衬底上并耦合到所述有源器件阵列; 遮光层，其设置在所述基板上，其中所述遮光层至少覆盖所述有源器件阵列并且在所述发光区域中露出所述透明电极层; 设置在由遮光层露出的透明电极层上的有机功能层; 和设置在有机功能层上的上电极层。

公开(公告)号：US07041540B1

公开(公告)日：2006-05-09

申请号：US10906041

申请日：2005-02-01

申请人： Hsi-Ming Chang ,  Chia-Nan Shen

发明人： Hsi-Ming Chang ,  Chia-Nan Shen

IPC分类号： H01L21/84

CPC分类号： H01L29/66757 ,  H01L21/26513 ,  H01L29/78621 ,  H01L29/78624

摘要： A thin film transistor includes a substrate, a polysilicon layer, a patterned gate dielectric layer, a gate layer, a channel region, a source region, a drain region, and a LDD region. The polysilicon layer is positioned over the substrate. The patterned gate dielectric layer is positioned over the polysilicon layer. The patterned gate dielectric layer has a third and a fourth portion, wherein the fourth portion has a thickness smaller than that of the third portion. The gate layer is positioned over the third portion. The source region and the drain region are positioned in the polysilicon layer under the fourth portion. The channel region is positioned in the polysilicon layer under the gate layer. The LDD region is positioned in the polysilicon layer under the third portion and is between the channel region and the source region or between the channel region and the drain region.

摘要翻译： 薄膜晶体管包括衬底，多晶硅层，图案化栅极介电层，栅极层，沟道区，源极区，漏极区和LDD区。 多晶硅层位于衬底上。 图案化的栅介质层位于多晶硅层上。 图案化的栅介质层具有第三部分和第四部分，其中第四部分的厚度小于第三部分的厚度。 栅极层位于第三部分上。 源极区域和漏极区域位于第四部分下面的多晶硅层中。 沟道区位于栅极层下面的多晶硅层中。 LDD区域位于第三部分下面的多晶硅层中，并且位于沟道区域和源极区域之间或沟道区域和漏极区域之间。

公开(公告)号：US20060060919A1

公开(公告)日：2006-03-23

申请号：US10711473

申请日：2004-09-21

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： H01L29/06 ,  H01L21/84 ,  H01L29/04

CPC分类号： H01L29/78621 ,  H01L29/42384 ,  H01L29/66757

摘要： A method of fabricating a lightly doped drain region of a low temperature polysilicon thin film transistor is provided. First, a polysilicon layer is formed over a substrate, and then a gate insulation layer is formed over the polysilicon layer. A gate buffer layer and a gate are formed over the gate insulation layer, wherein the gate is formed on the gate buffer layer and a portion of the gate buffer layer is exposed. Next, a doping process is performed to form the lightly doped drain region in the polysilicon layer underneath the exposed portion of the gate buffer layer. Thus, a low temperature polysilicon thin film transistor is formed via a simplified process and the overall fabrication cost can be reduced and the production efficiency can be substantially improved.

摘要翻译： 提供了制造低温多晶硅薄膜晶体管的轻掺杂漏极区的方法。 首先，在衬底上形成多晶硅层，然后在多晶硅层上形成栅极绝缘层。 栅极缓冲层和栅极形成在栅极绝缘层上，其中栅极形成在栅极缓冲层上并且栅极缓冲层的一部分被暴露。 接下来，执行掺杂处理以在栅极缓冲层的暴露部分下方的多晶硅层中形成轻掺杂漏极区。 因此，通过简化的工艺形成低温多晶硅薄膜晶体管，并且可以降低总体制造成本，并且可以显着提高生产效率。

公开(公告)号：US20050016469A1

公开(公告)日：2005-01-27

申请号：US10824433

申请日：2004-04-15

申请人： Ching-Hong Wong ,  Hsi-Ming Chang

发明人： Ching-Hong Wong ,  Hsi-Ming Chang

IPC分类号： C23C16/00 ,  C23C16/458 ,  C23C16/54 ,  H01L21/205 ,  H01L21/687

CPC分类号： H01L21/68742 ,  C23C16/4586 ,  C23C16/54 ,  H01L21/68778 ,  Y10S414/135 ,  Y10S414/136 ,  Y10S414/141

摘要： A downward mechanism for support pins is applicable to a reactor of removable type. Support pins are located on the base of the reactor, and each support pin has a base thereunder. The downward mechanism has an elevator mechanism and a board fixed thereto. The board has several holes for the pin and the base to pass respectively therethrough. Each hole elongates into a slit allowing each of the support pins, only, to pass respectively therethrough.

摘要翻译： 支撑销的向下机构适用于可拆卸型的反应堆。 支撑销位于反应堆的底部，每个支撑销具有底座。 向下机构具有电梯机构和固定在其上的板。 该板有多个孔用于销和底座分别通过。 每个孔延伸到狭缝中，允许每个支撑销仅分别通过。

公开(公告)号：US08242507B2

公开(公告)日：2012-08-14

申请号：US12626689

申请日：2009-11-27

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： H01L27/14 ,  H01L29/04 ,  H01L29/15 ,  H01L31/036

CPC分类号： H01L27/124 ,  H01L29/41733

摘要： A pixel structure having capacitor compensation includes a thin-film transistor, and the thin-film transistor includes a source electrode, a drain electrode, a semiconductor layer and a gate electrode. The gate electrode includes a bar-shaped main part, and at least a protrusion part or two indention parts. One of the characteristics of the present invention lies in layout patterns of the drain electrode and gate electrode. An overlapping area between the drain electrode and gate electrode, and the position of the overlapping area can both be kept by virtue of the arrangement of the protrusion part or the indention parts of the gate electrode, even when the alignment between the drain electrode and gate electrode is changed. Therefore, the gate-drain capacitor (Cgd) will not be changed so that the quality of the liquid crystal display will be improved accordingly.

摘要翻译： 具有电容补偿的像素结构包括薄膜晶体管，薄膜晶体管包括源电极，漏电极，半导体层和栅电极。 栅极电极包括棒状主要部分和至少一个突出部分或两个缩进部分。 本发明的特征之一在于漏电极和栅电极的布局图案。 漏极电极和栅电极之间的重叠区域和重叠区域的位置可以通过突起部分或栅电极的凹入部分的布置来保持，即使当漏电极和栅极之间的对准 电极改变。 因此，栅极 - 漏极电容器（Cgd）将不会改变，从而相应地提高液晶显示器的质量。

公开(公告)号：US20120120227A1

公开(公告)日：2012-05-17

申请号：US13118197

申请日：2011-05-27

申请人： Hsi Ming CHANG

发明人： Hsi Ming CHANG

IPC分类号： H04N7/18

CPC分类号： G02F1/1345 ,  G02F1/13458 ,  G02F2001/133374

摘要： A panel conductive film configuration system and method thereof are presented. A panel is configured with a plurality of groups of lines staggered in different groups, and ends of the lines are arranged in a staggered manner at two different lengths and include a film contact unit. A processing unit analyzes line widths of the groups of lines through images of the panel photographed by a photographing unit, and when configuring a film on the panel, a setting unit controls a configuration position of the film to adjust attachment areas between a plurality of line contact blocks of the film and each film contact unit.

摘要翻译： 提出了面板导电膜配置系统及其方法。 面板被配置为具有交错在不同组中的多组线组，并且线的端部以交错方式布置成两个不同长度并且包括膜接触单元。 处理单元通过拍摄单元拍摄的面板的图像分析线组的线宽，并且当在面板上配置胶片时，设置单元控制胶片的配置位置，以调整多行之间的连接区域 胶片和每个胶片接触单元的接触块。

公开(公告)号：US08120374B2

公开(公告)日：2012-02-21

申请号：US12358250

申请日：2009-01-23

申请人： Hsi-Ming Chang

发明人： Hsi-Ming Chang

IPC分类号： G01R31/26

CPC分类号： G09G3/006 ,  G09G3/3648

摘要： An inspection circuit is used for inspecting signal wires of a display area. The inspection circuit includes a shorting bar, plural first shorting switches, and plural second shorting switches. The plurality of the first and the second shorting switches are disposed at different sides of the display area for increasing space between each adjacent shorting switch so as to reduce coupling effect. In the inspection circuit, a first shorting switch is electrically connected between the shorting bar and first end of one signal wire, and a second shorting switch is electrically connected between the second end of that signal wire and second end of another signal wire.

摘要翻译： 检查电路用于检查显示区域的信号线。 检查电路包括短路棒，多个第一短路开关和多个第二短路开关。 多个第一和第二短路开关设置在显示区域的不同侧，用于增加每个相邻的短路开关之间的空间，从而减小耦合效应。 在检查电路中，第一短路开关电连接在短路棒和一条信号线的第一端之间，第二短路开关电连接在该信号线的第二端和另一根信号线的第二端之间。