Abstract:
A method for power load management is provided in the present invention, wherein two different standard values are determined to be a basis for regulating power consumption. When power consumption exceeds a first standard value, a monitoring procedure is started to monitor consumption status. If the power consumption exceeds a second standard value, an unloading procedure is processed to reduce the power consumption of electrical devices under operation. In another embodiment, the present invention also provides a system for power load management comprising a control unit coupled to at least one electrical device and a power meter. By means of real-time recording of power consumption in the power meter, the control unit is capable of determining the power consumption status and determining whether it is necessary to unload or reload the at least one electrical device.
Abstract:
A method for power load management is provided in the present invention, wherein two different standard values are determined to be a basis for regulating power consumption. When power consumption exceeds a first standard value, a monitoring procedure is started to monitor consumption status. If the power consumption exceeds a second standard value, an unloading procedure is processed to reduce the power consumption of electrical devices under operation. In another embodiment, the present invention also provides a system for power load management comprising a control unit coupled to at least one electrical device and a power meter. By means of real-time recording of power consumption in the power meter, the control unit is capable of determining the power consumption status and determining whether it is necessary to unload or reload the at least one electrical device.
Abstract:
A method of directly depositing a polysilicon film at a low temperature is disclosed. The method comprises providing a substrate and performing a sequential deposition process. The sequential deposition process comprises first and second deposition steps. In the first deposition step, a first bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a first polysilicon sub-layer on the substrate. In the second deposition step, a second bias voltage is applied to the substrate, and plasma chemical vapor deposition is utilized to form a second polysilicon sub-layer on the first sub-layer. The first and second sub-layers constitute the polysilicon film, and the first bias voltage differs from the second bias voltage.
Abstract:
A double-gate thin-film transistor and a method for forming the same, using low-temperature poly-silicon formed by direct deposition on a substrate so as to simplify the manufacturing process and improve the electrical characteristics. The double-gate thin-film transistor comprises: a first patterned electrode formed on a substrate; a first dielectric layer; a poly-silicon film, formed by direct deposition on the first dielectric layer so as to form between the poly-silicon film and the first dielectric layer an incubation layer comprising amorphous silicon; a pair of second patterned electrodes, formed on the poly-silicon film so as to define in the poly-silicon film and the incubation layer between the second patterned electrodes a channel region corresponding to the first patterned electrode; a second dielectric layer; and a third patterned electrode corresponding to the channel region. The method comprises steps of: providing a substrate, a first patterned electrode being formed on the substrate; forming a first dielectric layer; forming a poly-silicon film by direct deposition on the first dielectric layer so as to form between the poly-silicon film and the first dielectric layer an incubation layer comprising amorphous silicon; forming a pair of second patterned electrodes on the poly-silicon film so as to define in the poly-silicon film and the incubation layer between the second patterned electrodes a channel region corresponding to the first patterned electrode; forming a second dielectric layer; and forming a third patterned electrode corresponding to the channel region.
Abstract:
A stacked package for electronic elements is provided, a plurality of stud bumps are formed on a substrate by means of a stud bump process to align with a plurality of vias of one provided electronic element. The stud bumps respectively pass through the vias and electrically connect the electronic element. Furthermore, additional electronic elements are stacked on the carrier according to a similar way to form a stacked electronic package.
Abstract:
An antenna connection module adopted for use on electronic devices has an anchoring and rotary structure to provide discrete and staged positioning. It includes a rotary tray, which has a plurality of anchor troughs formed thereon, and an antenna dock coupled with the rotary tray to turn relative to the rotary tray without separating. The antenna dock houses rolling balls that engage with the anchor troughs to provide discrete and staged clicking and anchoring effects.
Abstract:
A stopping mechanism is disposed on a machine body and a removable device. The stopping mechanism includes a rectilinearly moving action member, a rotationally moving clipping member, and a stopping member fixedly disposed on the machine body, in which the action member pushes and presses against the clipping member so that the clipping member rotates to a holder position. The action member presses against the stopping member fixedly disposed on the machine body through a tilt angle relation at the holder position, so that an accelerating force generated by the removable device under impact is transferred to the machine body, thus dispersing the impact force.