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    Capacitor coupled Ethernet
    21.
    发明授权
    Capacitor coupled Ethernet 有权
    电容耦合以太网

    公开(公告)号：US08044747B2

    公开(公告)日：2011-10-25

    申请号：US12433080

    申请日：2009-04-30

    Applicant: James Yu ,  Minh Tran

    Inventor： James Yu ,  Minh Tran

    IPC: H03H2/00 ,  H04B3/00

    CPC classification number: H04L12/10

    Abstract: A system and method for enabling power applications over a single conductor pair. In one embodiment, data transformers are coupled to a single conductor pair using one or more direct current (DC) blocking elements that preserve an alternating current path. Power is injected onto the single conductor pair after the DC blocking elements and power is extracted from the single conductor pair before the DC blocking elements. Saturation of the data transformers by the injection of power onto the single pair is thereby prevented.

    Abstract translation: 一种用于在单个导体对上实现电力应用的系统和方法。 在一个实施例中，使用保持交流路径的一个或多个直流（DC）阻塞元件将数据变压器耦合到单个导体对。 在直流阻塞元件之后，在直流阻塞元件之前从单个导体对提取功率，在单个导体对上注入功率。 从而防止了通过将电力注入到单对上的数据变压器的饱和度。

    SYSTEMS AND METHODS FOR CUSTOMIZING AN ADVERTISEMENT
    24.
    发明申请
    SYSTEMS AND METHODS FOR CUSTOMIZING AN ADVERTISEMENT 审中-公开
    用于自定义广告的系统和方法

    公开(公告)号：US20090307081A1

    公开(公告)日：2009-12-10

    申请号：US12412320

    申请日：2009-03-26

    Applicant: Michael Rabbitt ,  Olumide Adebayo ,  Kiran Thomas ,  James Yu ,  Andy Peter Schön ,  Jonathan Levine

    Inventor： Michael Rabbitt ,  Olumide Adebayo ,  Kiran Thomas ,  James Yu ,  Andy Peter Schön ,  Jonathan Levine

    IPC: G06Q30/00 ,  G06F17/30

    CPC classification number: G06Q30/02 ,  G06Q30/0243 ,  G06Q30/0251 ,  G06Q30/0255

    Abstract: The disclosed technology provides systems, architectures, and methods for providing to a Web page electronic advertisements related to the content of the Web page. In one aspect, the disclosed technology manages and serves electronic advertisements for affiliated Web page publishers and advertisers. A computer-implemented method in accordance with the disclosed technology receives a request for an electronic advertisement for a Web page, wherein the Web page is associated with a Web page publisher, accesses one or more keywords appearing in the Web page, identifies one or more relevant electronic advertisements related to the keyword(s), wherein the relevant electronic advertisement(s) are associated with an advertiser affiliated with the Web page publisher, and communicates one or more the relevant electronic advertisements to the Web page for display. The disclosed technology also includes a computer executing software, wherein the executed software causes the computer to perform the steps above.

    Abstract translation: 所公开的技术提供用于向网页提供与网页的内容相关的电子广告的系统，架构和方法。 一方面，所公开的技术管理和服务于附属网页发布者和广告商的电子广告。 根据所公开的技术的计算机实现的方法接收对网页的电子广告的请求，其中网页与网页发布者相关联，访问出现在网页中的一个或多个关键字，识别一个或多个 与关键词相关的相关电子广告，其中相关电子广告与与网页发布者相关联的广告商相关联，并将一个或多个相关电子广告传送到网页以供显示。 所公开的技术还包括计算机执行软件，其中所执行的软件使计算机执行上述步骤。

    ACTIVE POWERED DEVICE FOR THE APPLICATION OF POWER OVER ETHERNET
    26.
    发明申请
    ACTIVE POWERED DEVICE FOR THE APPLICATION OF POWER OVER ETHERNET 审中-公开
    用于以太网供电的主动供电装置

    公开(公告)号：US20090222678A1

    公开(公告)日：2009-09-03

    申请号：US12040593

    申请日：2008-02-29

    Applicant: James Yu ,  Minh Tran

    Inventor： James Yu ,  Minh Tran

    IPC: G06F1/26

    CPC classification number: G06F1/266 ,  H04L12/10 ,  H04L43/0817

    Abstract: An active powered device (PD) for the application of power over Ethernet (PoE). In a fixed power budget environment, it is important for the power sourcing equipment (PSE) to accurately determine a power budget for the various powered ports. An active PD can be designed to gather additional information (e.g., current and input voltage) during PD operation and to forward the additional information to the PSE. The PSE can then use the additional information to adjust operational parameters such as a power budget.

    Abstract translation: 用于以太网供电（PoE）的主动供电设备（PD）。 在固定功率预算环境中，对于供电设备（PSE）来说，准确地确定各种供电端口的功率预算是很重要的。 可以设计有源PD以在PD操作期间收集附加信息（例如，电流和输入电压），并将附加信息转发到PSE。 然后，PSE可以使用附加信息来调整操作参数，如功率预算。

    Method to form decoupling capacitors on IC chip and the structure thereof
    27.
    发明申请
    Method to form decoupling capacitors on IC chip and the structure thereof 审中-公开
    在IC芯片上形成去耦电容的方法及其结构

    公开(公告)号：US20080076229A1

    公开(公告)日：2008-03-27

    申请号：US11527488

    申请日：2006-09-27

    Applicant: Jason Mao ,  James Yu Peng

    Inventor： Jason Mao ,  James Yu Peng

    IPC: H01L21/20

    CPC classification number: H01L23/5223 ,  H01L23/5286 ,  H01L24/06 ,  H01L28/60 ,  H01L2924/14 ,  H01L2924/00

    Abstract: A method to form decoupling capacitors on an IC chip and the structure thereof includes forming several metal layers on a low-metal-covering-ratio region of the IC chip and connecting these metal layers to the ground, source voltage respectively, in order to form parasite metal capacitors that can be as decoupling capacitors with satisfying the metal covering rules so as to make good use of the IC chip space.

    Abstract translation: 在IC芯片上形成去耦电容器的方法及其结构包括在IC芯片的低金属覆盖比区域上形成几个金属层，并将这些金属层分别连接到地源电压以形成 寄生金属电容器可以作为去耦电容器，满足金属覆盖规则，以充分利用IC芯片空间。

    Method for efficiently controlling read/write of flash memory
    29.
    发明申请
    Method for efficiently controlling read/write of flash memory 审中-公开
    有效控制闪存读写的方法

    公开(公告)号：US20050055532A1

    公开(公告)日：2005-03-10

    申请号：US10933266

    申请日：2004-09-03

    Applicant: James Yu

    Inventor： James Yu

    IPC: G06F3/06 ,  G06F12/02 ,  G06F12/08

    CPC classification number: G06F12/0246 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0679 ,  G06F12/0292 ,  G06F2212/7201

    Abstract: A method for efficiently controlling read/write of a flash memory is proposed, wherein two address mapping tables and an empty block FIFO mechanism are built. A zone address mapping table matched with its empty block FIFO data is used for the logical address of the file allocation table (FAT). When a host end performs read/write to a flash memory, no matter to which zone the zone address mapping table corresponds, it is not necessary to rebuild the FAT address mapping table. Moreover, a cache address mapping table and its empty block FIFO data can be added. When the logical address is not in the zone address mapping table and the FAT address mapping table, a smaller cache address mapping table is first built to increase the system speed, let control of the flash memory be more efficient, and distribute the utility rate of each block.

    Abstract translation: 提出了一种有效控制闪速存储器的读/写的方法，其中构建了两个地址映射表和一个空块FIFO机制。 与其空块FIFO数据匹配的区域地址映射表用于文件分配表（FAT）的逻辑地址。 当主机端对闪存执行读/写操作时，无论区域地址映射表对应于哪个区域，都不需要重建FAT地址映射表。 此外，可以添加高速缓存地址映射表及其空块FIFO数据。 当逻辑地址不在区域地址映射表和FAT地址映射表中时，首先构建较小的缓存地址映射表，以提高系统速度，使闪存的控制更有效率，并分配 每个块。

    Flexible circuit with two stiffeners for optical module packaging
    30.
    发明授权
    Flexible circuit with two stiffeners for optical module packaging 有权
    具有两个加强件的柔性电路用于光学模块封装

    公开(公告)号：US06492698B2

    公开(公告)日：2002-12-10

    申请号：US09739530

    申请日：2000-12-15

    Applicant: Brian H. Kim ,  James-Yu Chang

    Inventor： Brian H. Kim ,  James-Yu Chang

    IPC: H01L3100

    CPC classification number: H05K1/189 ,  G02B6/4201 ,  G02B6/4249 ,  G02B6/4292 ,  H01L23/5387 ,  H01L31/0203 ,  H01L31/024 ,  H01L2924/0002 ,  H05K3/0061 ,  H05K2201/2009 ,  H01L2924/00

    Abstract: Packaging for components of an optical module. The packaging includes a flexible circuit coupled to two stiffeners. The packaging has a first sub-assembly with the first stiffener for receiving a first component. The packaging also has a second sub-assembly with the second stiffener for receiving a second component and for coupling to an external circuit. The packaging has a flexible portion with a first end for coupling to the first sub-assembly and a second end for coupling to the second sub-assembly. The flexible portion allows the first sub-assembly to be oriented with respect to the second sub-assembly to form an angle that is greater than zero degrees and less than 180 degrees.

    Abstract translation: 包装光学模块的组件。 该包装包括耦合到两个加强件的柔性电路。 包装具有第一子组件，第一子组件具有用于接收第一组件的第一加强件。 该包装还具有第二子组件，第二加强件用于接收第二部件并用于耦合到外部电路。 该包装具有柔性部分，其具有用于联接到第一子组件的第一端和用于联接到第二子组件的第二端。 柔性部分允许第一子组件相对于第二子组件定向以形成大于零度且小于180度的角度。

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