公开(公告)号：US06977969B2

公开(公告)日：2005-12-20

申请号：US09894100

申请日：2001-06-28

Applicant: Kyung-Ha Lee ,  Young-Jin Kim ,  Sung-Joo Kim

Inventor： Kyung-Ha Lee ,  Young-Jin Kim ,  Sung-Joo Kim

IPC: H04B1/7075 ,  H04L27/06

CPC classification number: H04B1/7075

Abstract: There is provided a digital data receiver for recovering at least one message word signal from a digital data frame. The digital receiver includes a digital FM demodulator for receiving frequency modulated signals, and for demodulating a dotting sequence signal, a word sync signal and a message word signal of each sub-frame which is in digital data frame, a dotting detector for detecting a dotting sequence signal of at least one sub-frame among the signals demodulated by the digital FM demodulator, based upon a predetermined signal which is shorter than the length of each dotting sequence signal of the each sub-frame, detecting means for determining the termination of receiving of the digital data frame after the dotting detector detects the dotting sequence signal, and for detecting a new digital data frame followed by the digital data frame; and a message processor means for recovering a message word signal in the digital signal frame which is related to the dotting sequence signal detected by the dotting detector. A method for recovering at least one message word signal from a digital data frame is also disclosed.

Abstract translation: 提供了一种用于从数字数据帧中恢复至少一个消息字信号的数字数据接收器。 数字接收机包括用于接收频率调制信号的数字FM解调器，用于解调数字数据帧中每个子帧的点划线信号，字同步信号和消息字信号，用于检测点数的点检测器 基于比每个子帧的每个点划线信号的长度短的预定信号，由数字FM解调器解调的信号中的至少一个子帧的序列信号，用于确定接收终止的检测装置 点号检测器检测到点号序列信号之后的数字数据帧，并且用于检测数字数据帧后面的数字数据帧; 以及消息处理器装置，用于恢复数字信号帧中与由点号检测器检测到的点划线信号相关的消息字信号。 还公开了一种从数字数据帧中恢复至少一个消息字信号的方法。

公开(公告)号：US20050075098A1

公开(公告)日：2005-04-07

申请号：US10740893

申请日：2003-12-22

Applicant: Sang-Hyuk Lee ,  Kyung-Ha Lee

Inventor： Sang-Hyuk Lee ,  Kyung-Ha Lee

IPC: H04B1/38 ,  H04B1/00 ,  H04B1/40 ,  H04H20/00 ,  H04H20/06 ,  H04H20/08 ,  H04H60/91 ,  H04M1/00 ,  H04M1/725 ,  H04M3/42 ,  H04Q7/20 ,  H04Q7/32

CPC classification number: H04H60/80 ,  H04H20/06 ,  H04H20/08 ,  H04H60/91 ,  H04M1/7255 ,  H04M1/72558 ,  H04M2201/39

Abstract: An apparatus and method for transmitting audio signals in a mobile terminal receiving digital multimedia broadcast signals. The apparatus includes a broadcast reception process part for receiving a digital multimedia broadcast signal having at least an audio signal, separating the audio signal from the received digital multimedia broadcast signal, and outputting the separated audio signal; a Digital-to-Analog Converter for converting the separated audio signal into an analog audio signal; a controller for determining whether a predetermined request for transmitting the audio signal contained in the digital multimedia broadcast signal is entered during a voice call time; a synthesizer for receiving a control signal from the controller, and synthesizing the analog audio signal received from the DAC and a user's voice signal to create a synthesized signal; and a communication part for wirelessly transmitting the synthesized signal.

Abstract translation: 一种用于在接收数字多媒体广播信号的移动终端中发送音频信号的装置和方法。 该装置包括广播接收处理部分，用于接收具有至少音频信号的数字多媒体广播信号，从接收到的数字多媒体广播信号中分离音频信号，并输出分离的音频信号; 数字 - 模拟转换器，用于将分离的音频信号转换成模拟音频信号; 用于确定在语音呼叫时间期间是否输入包含在数字多媒体广播信号中的用于发送音频信号的预定请求的控制器; 合成器，用于从控制器接收控制信号，并且合成从DAC接收的模拟音频信号和用户的语音信号以产生合成信号; 以及用于无线发送合成信号的通信部。

公开(公告)号：US06577674B1

公开(公告)日：2003-06-10

申请号：US09390117

申请日：1999-09-03

Applicant: Seok-Jun Ko ,  Kyung-Ha Lee ,  Hyung-Jin Choi

Inventor： Seok-Jun Ko ,  Kyung-Ha Lee ,  Hyung-Jin Choi

IPC: H04B1500

CPC classification number: H04L25/0214 ,  H04B1/7115 ,  H04L25/0204

Abstract: A channel compensator for estimating and for compensating a phase change and a residual frequency offset of a despreaded signal, prior to synchronous demodulation in a DS-CDMA receiver. In the channel compensator, a first integrator accumulates input signals sampled at a given chip rate for a predetermined period and multiplies the accumulated value by a given gain. A shift register having a plurality of registers shifts the data output from the first integrator. A second integrator integrates the data generated at once from the respective registers of the shift register. A delay means delays the input signal for a predetermined time, and a multiplier multiplies the delayed input signal by an output of the second integrator in order to generate the compensated signal. The delay device delays the input signal by a time required for the input signal to reach a central register of the shift register through the first integrator. The second integrator includes a summer means for summing the values of the respective registers of the shift register at an update period of the first integrator, and a multiplier for multiplying a value output from the summer means by a reciprocal number of the number of the registers to reduce the dispersion of an estimation value due to noises, and for adjusting a bit value for detected information.

Abstract translation: 信道补偿器，用于在DS-CDMA接收机中的同步解调之前估计和补偿解扩信号的相位变化和残余频率偏移。 在信道补偿器中，第一积分器以预定周期累积以给定码片速率采样的输入信号，并将累加值乘以给定增益。 具有多个寄存器的移位寄存器使从第一积分器输出的数据移位。 第二积分器将从移位寄存器的各个寄存器一次产生的数据进行积分。 延迟装置将输入信号延迟预定时间，并且乘法器将延迟的输入信号乘以第二积分器的输出，以产生补偿信号。 延迟装置将输入信号延迟输入信号所需的时间通过第一积分器到达移位寄存器的中心寄存器。 第二积分器包括用于在第一积分器的更新周期处对移位寄存器的各个寄存器的值相加的加法器，以及用于将从加法器装置输出的值乘以寄存器数目的倒数的乘法器 以减少由于噪声引起的估计值的偏差，并且用于调整检测信息的位值。

公开(公告)号：US06449027B2

公开(公告)日：2002-09-10

申请号：US09740558

申请日：2000-12-19

Applicant: Kyung Ha Lee ,  Jeong Geun Kim ,  Seung Yik Park

Inventor： Kyung Ha Lee ,  Jeong Geun Kim ,  Seung Yik Park

IPC: G02F11372

CPC classification number: G02F1/134363

Abstract: Disclosed is an in plane switching (IPS) mode LCD device and method for manufacturing the same. The IPS mode LCD device of the present invention includes a transparent insulating substrate, a gate bus line and a data bus line arranged in a cross fashion on the transparent insulating substrate to define a unit pixel area, a common electrode line disposed in parallel to the gate bus line while being spaced at most apart from the gate bus line in the unit pixel area, the common electrode line having a pair of shields respective disposed at both lateral edges of the unit pixel area, a thin film transistor disposed near an intersection of the gate bus line and the data bus line, a counter electrode arranged in the unit pixel area between the shield of the common electrode line and made of a transparent conductor, the counter electrode including a plurality of branches arranged in parallel to the data bus line, and a bar contacting the common electrode line and connecting respective one-side ends of the branches together, and a pixel electrode formed of a transparent conductor and including a pair of first electrode parts respectively overlapping with the shields of the common electrode line while extending in parallel to the data bus line, second electrode parts interposed each between adjacent ones of the branches included in the counter electrode, and a third electrode part contacting a part of the thin film transistor while connecting together respective one-side ends of the first and second electrode parts.

Abstract translation: 公开了一种平面切换（IPS）模式LCD装置及其制造方法。 本发明的IPS模式LCD装置包括透明绝缘基板，栅极总线和在透明绝缘基板上交叉布置的数据总线，以限定单位像素区域，平行于该平面的公共电极线 栅极总线，同时与单位像素区域中的栅极总线间隔最多，公共电极线具有分别设置在单位像素区域的两个侧边缘处的一对屏蔽层，设置在单元像素区域的交叉点附近的薄膜晶体管 栅极总线和数据总线，对置电极，布置在公共电极线的屏蔽之间并由透明导体构成的单位像素区域中，对置电极包括与数据总线并行设置的多个分支 以及与公共电极线接触并将分支的各个一端连接在一起的条和由透明导体形成的像素电极，并且包括 在平行于数据总线的同时分别与公共电极线的屏蔽部分重叠的一对第一电极部分分别插入在相对电极中包括的相邻的分支之间的第二电极部分和与第二电极部分接触的第三电极部分 薄膜晶体管的一部分，同时将第一和第二电极部分的相应的一个端部连接在一起。

公开(公告)号：US06391693B1

公开(公告)日：2002-05-21

申请号：US09652187

申请日：2000-08-31

Applicant: Dae Han Cho ,  Kyung Ha Lee

Inventor： Dae Han Cho ,  Kyung Ha Lee

IPC: H01L2100

CPC classification number: H01L29/78696 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78645

Abstract: Disclosed is a polysilicon thin film transistor capable of reducing leakage current in the off state and method for manufacturing the same. The polysilicon thin film transistor comprises a substrate; at least two gate electrodes formed on the substrate; an insulating layer coated on the gate electrodes; a channel layer formed on the gate insulating layer to cover the entire gate electrodes and made of polysilicon; an ion stopper formed on the channel layer corresponding to the gate electrode; impurity regions formed on the channel layer at both sides of the ion stopper; and source and drain electrodes contacted with outermost regions among the impurity regions respectively, wherein the outermost impurity regions are source and drain regions and the region between the gate electrodes is an auxiliary junction region for compensating ON current.

Abstract translation: 公开了能够在关闭状态下减少漏电流的多晶硅薄膜晶体管及其制造方法。 多晶硅薄膜晶体管包括衬底; 形成在所述基板上的至少两个栅电极; 涂覆在栅电极上的绝缘层; 形成在所述栅绝缘层上以覆盖整个栅电极并由多晶硅制成的沟道层; 形成在与栅电极对应的沟道层上的离子塞; 形成在离子塞的两侧的沟道层上的杂质区; 源极和漏极分别与杂质区域中的最外部区域接触，其中最外面的杂质区域是源极和漏极区域，并且栅极电极之间的区域是用于补偿导通电流的辅助结区域。

公开(公告)号：US6144042A

公开(公告)日：2000-11-07

申请号：US344179

申请日：1999-06-24

Applicant: Dae Han Cho ,  Kyung Ha Lee

Inventor： Dae Han Cho ,  Kyung Ha Lee

IPC: H01L29/49 ,  H01L21/336 ,  H01L29/786 ,  H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC classification number: H01L29/78696 ,  H01L29/66765 ,  H01L29/78609 ,  H01L29/78645

Abstract: Disclosed is a polysilicon thin film transistor capable of reducing leakage current in the off state and method for manufacturing the same. The polysilicon thin film transistor comprises a substrate; at least two gate electrodes formed on the substrate; an insulating layer coated on the gate electrodes; a channel layer formed on the gate insulating layer to cover the entire gate electrodes and made of polysilicon; an ion stopper formed on the channel layer corresponding to the gate electrode; impurity regions formed on the channel layer at both sides of the ion stopper; and source and drain electrodes contacted with outermost regions among the impurity regions respectively, wherein the outermost impurity regions are source and drain regions and the region between the gate electrodes is an auxiliary junction region for compensating ON current.

Abstract translation: 公开了能够在关闭状态下减少漏电流的多晶硅薄膜晶体管及其制造方法。 多晶硅薄膜晶体管包括衬底; 形成在所述基板上的至少两个栅电极; 涂覆在栅电极上的绝缘层; 形成在栅极绝缘层上以覆盖整个栅电极并由多晶硅制成的沟道层; 形成在与栅电极对应的沟道层上的离子塞; 形成在离子塞的两侧的沟道层上的杂质区; 源极和漏极分别与杂质区域中的最外部区域接触，其中最外面的杂质区域是源极和漏极区域，并且栅极电极之间的区域是用于补偿导通电流的辅助结区域。

公开(公告)号：US6100119A

公开(公告)日：2000-08-08

申请号：US57538

申请日：1998-04-09

Applicant: Jin Jang ,  Kyung-Ha Lee ,  You-Chan Chung

Inventor： Jin Jang ,  Kyung-Ha Lee ,  You-Chan Chung

IPC: H01L29/49 ,  H01L21/336 ,  H01L21/84

CPC classification number: H01L29/4908

Abstract: A thin film transistor includes an insulating substrate; a polysilicon pattern formed on the insulating substrate; a first nitride layer disposed on a channel portion of the polysilicon pattern; heavily doped semiconductor layer regions disposed in upper portions of the polysilicon pattern on sides of the first nitride layer pattern; an interlevel insulating layer disposed on the insulating substrate, the polysilicon pattern, the first nitride layer and the heavily doped semiconductor layer regions, the interlevel insulating layer having a contact hole to expose a portion of the heavily doped semiconductor layer; source and drain electrodes connected to the heavily doped semiconductor layer regions through the contact hole; and a gate electrode formed on the interlevel insulating layer disposed on the first nitride layer.

Abstract translation: 薄膜晶体管包括绝缘基板; 形成在所述绝缘基板上的多晶硅图案; 设置在所述多晶硅图案的沟道部分上的第一氮化物层; 在第一氮化物层图案的侧面上设置在多晶硅图案的上部的重掺杂半导体层区域; 设置在所述绝缘基板上的层间绝缘层，所述多晶硅图案，所述第一氮化物层和所述重掺杂半导体层区域，所述层间绝缘层具有用于暴露所述重掺杂半导体层的一部分的接触孔; 源极和漏极通过接触孔连接到重掺杂半导体层区域; 以及形成在设置在第一氮化物层上的层间绝缘层上的栅电极。

公开(公告)号：US09170963B2

公开(公告)日：2015-10-27

申请号：US13543357

申请日：2012-07-06

Applicant: Dong-Ku Han ,  Kang-Min Lee ,  Kyung-Ha Lee

Inventor： Dong-Ku Han ,  Kang-Min Lee ,  Kyung-Ha Lee

IPC: G06F13/28 ,  G06F13/00 ,  G06F13/24

CPC classification number: G06F13/24 ,  G06F13/28

Abstract: A method for generating an interrupt signal in a memory controller and supporting a multi-processor is provided. Whether an access for a determined memory region occurs is determined. When the access for the determined memory region occurs, whether the access for the determined memory region has a right is determined. When the access for the determined memory region has the right, a core that will generate an interrupt signal is determined. The determined core is requested to generate the interrupt signal.

Abstract translation: 提供了一种用于在存储器控制器中产生中断信号并支持多处理器的方法。 确定是否存在确定的存储区域的访问。 当确定的存储器区域的访问出现时，确定所确定的存储器区域的存取是否具有权利。 当所确定的存储器区域的访问权限为正确时，确定产生中断信号的核心。 请求确定的内核产生中断信号。

公开(公告)号：US08687150B2

公开(公告)日：2014-04-01

申请号：US12878600

申请日：2010-09-09

Applicant: Jong Sin Park ,  Eung Do Kim ,  Se Hong Park ,  Kyung Ha Lee

Inventor： Jong Sin Park ,  Eung Do Kim ,  Se Hong Park ,  Kyung Ha Lee

IPC: G02F1/1335

CPC classification number: G02F1/133514 ,  G02F1/133524 ,  G02F1/133528 ,  G02F2201/52

Abstract: Disclosed is a liquid crystal display module that improves luminance of a liquid crystal panel by enhancing a light transmittance. The liquid crystal display module comprises a liquid crystal panel with plural unit pixels for converting incident light into colored light, wherein each unit pixel includes red (R), green (G), blue (B), and white (W) sub-pixels; a light source for supplying light to the liquid crystal panel; an optical member for guiding light emitted from the light source toward a frontal direction of the liquid crystal panel; and a polarizing means including a polarization area for polarizing the light outgoing from the liquid crystal panel, and a hole for transmitting the light therethrough.

Abstract translation: 公开了一种通过提高透光率来提高液晶面板的亮度的液晶显示模块。 液晶显示模块包括具有用于将入射光转换成有色光的多个单位像素的液晶面板，其中每个单位像素包括红色（R），绿色（G），蓝色（B）和白色（W）子像素 ; 用于向液晶面板供给光的光源; 光学构件，用于将从光源发射的光朝向液晶面板的正面方向引导; 以及偏振装置，其包括用于偏振从液晶面板射出的光的偏振区域和用于透射光的孔。

公开(公告)号：US20120127405A1

公开(公告)日：2012-05-24

申请号：US13296399

申请日：2011-11-15

Applicant: Hwi-Deuk LEE ,  Jae-Seok Park ,  Kyung-Ha Lee ,  Dong-Seok Park

Inventor： Hwi-Deuk LEE ,  Jae-Seok Park ,  Kyung-Ha Lee ,  Dong-Seok Park

IPC: G02F1/1335 ,  H01L33/02

CPC classification number: G09G3/3648 ,  G02F1/13336 ,  G02F1/13452 ,  G09G2300/0426 ,  G09G2310/0232

Abstract: An array substrate for a multi-vision liquid crystal display device includes a display region; and first to fourth non-display regions surrounding the display region, wherein the first and second non-display regions are opposite to each other and each include a data pad portion connected to a data line, and the third and fourth non-display regions are opposite to each other and each include a gate pad portion connected to a gate line, and wherein the display region is divided into two or four active regions with a seam region between the adjacent active regions, and the seam region has a first width.

Abstract translation: 一种用于多视觉液晶显示装置的阵列基板，包括显示区域; 以及围绕所述显示区域的第一至第四非显示区域，其中所述第一和第二非显示区域彼此相对，并且每个包括连接到数据线的数据焊盘部分，并且所述第三和第四非显示区域是 彼此相对并且各自包括连接到栅极线的栅极焊盘部分，并且其中显示区域被分成两个或四个有效区域，其中相邻有效区域之间具有接缝区域，并且接缝区域具有第一宽度。