SOURCE DRIVER INTEGRATED CIRCUIT AND METHOD FOR DRIVING THE SAME

    公开(公告)号:US20240185814A1

    公开(公告)日:2024-06-06

    申请号:US18526004

    申请日:2023-12-01

    IPC分类号: G09G3/36 G09G3/3275

    摘要: Disclosed is a source driver IC including a first latch circuit configured to sample image data, a second latch circuit configured to latch and output the sampled image data at a rising edge of a latch enable signal, a latch enable signal output control circuit configured to output the latch enable signal at a first timing or second timing according to a timing setting signal, a digital-to-analog converter configured to convert the image data into an analog data voltage, an output buffer circuit configured to amplify and output the data voltage in synchronization with the latch enable signal, and a Mux circuit configured to be turned on during a period of a low level of a source output enable signal to output the data voltage to each channel.

    DEVICE AND METHOD FOR MULTI-CHIP CLOCK SYNCHRONIZATION

    公开(公告)号:US20240178848A1

    公开(公告)日:2024-05-30

    申请号:US18518733

    申请日:2023-11-24

    IPC分类号: H03L7/083 H03L7/093 H03L7/107

    摘要: The present disclosure relates to a multi-chip clock synchronization device and a method capable of reducing an operating frequency and power consumption when a plurality of chips share clocks for multi-chip clock synchronization, which may include a reference clock supply unit connected to a plurality of chips and supplying a reference clock of a first frequency to each chip and a target clock generation unit generating a target clock of a second frequency based on the reference clock of the first frequency, wherein the reference clock supply unit may generate the reference clock of the first frequency which is N times lower than the second frequency of the target clock to supply the generated reference clock to each chip, and the target clock generation unit may multiply the first frequency of the reference clock by N times when the reference clock of the first frequency is input to generate the target clock of the second frequency.

    POWER MANAGEMENT DEVICE FOR DRIVING DISPLAY PANEL

    公开(公告)号:US20240144854A1

    公开(公告)日:2024-05-02

    申请号:US18499967

    申请日:2023-11-01

    IPC分类号: G09G3/20

    摘要: Power management device for driving a display panel is disclosed. In order to achieve the above object, a power management device of operating a display panel may include a first buffer circuit configured to generate and output a first gamma reference voltage in a first section of a frame and generate and output a first touch driving voltage in a second section of the frame; and a second buffer circuit configured to generate and output a second gamma reference voltage in the first section and generate and output a second touch driving voltage in the second section.

    Touch sensing device and coordinate correction method

    公开(公告)号:US11960682B2

    公开(公告)日:2024-04-16

    申请号:US18075255

    申请日:2022-12-05

    发明人: Chan Hee Han

    IPC分类号: G06F3/041

    CPC分类号: G06F3/04186

    摘要: The present disclosure relates to a touch sensing device and a coordinate correction method, and more particularly, to a technique of determining a degree, to which a drawn line is curved (a straight line/a curved line), according to gradient values of straight lines that can be generated by touch coordinates and adaptively correcting the coordinates.

    CHIP ON FILM PACKAGE INCLUDING PROTECTIVE LAYER AND DISPLAY DEVICE INCLUDING THE SAME

    公开(公告)号:US20240079418A1

    公开(公告)日:2024-03-07

    申请号:US18461188

    申请日:2023-09-05

    发明人: Min Ho JEON Dam HA

    IPC分类号: H01L27/12

    CPC分类号: H01L27/1244

    摘要: Disclosed herein is a chip on film package including a base film, output wiring disposed on the base film and extending along a first direction, an insulation layer overlapping at least a portion of the output wiring, an output pad portion defined as a region in which the output wiring is exposed without the insulation layer, a semiconductor chip mounted on the base film and electrically connected to the output wiring, and a protective layer disposed between the semiconductor chip and the output pad portion with respect to the first direction.

    MOTOR DRIVER, MOTOR DRIVE SYSTEM, AND METHOD OF DRIVING MOTOR

    公开(公告)号:US20240072706A1

    公开(公告)日:2024-02-29

    申请号:US18240429

    申请日:2023-08-31

    发明人: Jang Hyun YOON

    IPC分类号: H02P23/14 H02P27/08

    CPC分类号: H02P23/14 H02P27/08

    摘要: The present disclosure relates to a motor driver capable of simply estimating an initial position of a rotor, and the motor driver according to one embodiment may include a gate driver for sequentially driving three-phase coils of a motor in first to sixth operation modes through an inverter for driving the three-phase coils and an initial position detector for detecting a maximum peak value among first to sixth currents by sensing the first to sixth currents flowing through two-phase coils among the three-phase coils through the inverter in each of the first to sixth operation modes and determine a starting position of a rotor of the motor based on the detected maximum peak value.