公开(公告)号：US08703510B2

公开(公告)日：2014-04-22

申请号：US13278360

申请日：2011-10-21

申请人： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

发明人： Youngsuk Song ,  Seungjin Choi ,  Seongyeol Yoo

IPC分类号： H01L21/00 ,  H01L21/84 ,  H01L21/331 ,  H01L21/8222

CPC分类号： H01L27/1288 ,  G02F2001/136236

摘要： An embodiment of the invention provides a method for manufacturing an array substrate, wherein the procedure for forming a data line, an active layer with a channel, a source electrode, a drain electrode and a pixel electrode comprises applying a photoresist on a data line metal thin film and performing exposure and development processes by using a multi-tone mask so as to form a photoresist pattern including a third thickness region, a second thickness region and a first thickness region whose thicknesses are successively increased, the third thickness region at least corresponding to the pixel electrode, the second thickness region corresponding to the data line, the active layer, the source electrode and the drain electrode, and the first thickness region corresponding to the other regions.

摘要翻译： 本发明的一个实施例提供了一种用于制造阵列基板的方法，其中用于形成数据线的步骤，具有沟道的有源层，源电极，漏电极和像素电极包括在数据线金属 薄膜，并通过使用多色调掩模进行曝光和显影处理，以形成包括第三厚度区域，第二厚度区域和厚度依次增加的第一厚度区域的光致抗蚀剂图案，第三厚度区域至少相应地 对应于数据线，有源层，源电极和漏电极的第二厚度区域和对应于其它区域的第一厚度区域到像素电极。

公开(公告)号：US08497966B2

公开(公告)日：2013-07-30

申请号：US12836028

申请日：2010-07-14

申请人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

发明人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

IPC分类号： G02F1/1343

CPC分类号： H01L27/1288 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1214

摘要： A manufacturing method for an FFS type TFT-LCD array substrate comprises: depositing a first metal film on a transparent substrate, and form a gate line, a gate electrode and a common electrode line by a first patterning process; depositing a gate insulating layer, an active layer film and a second metal film sequentially and patterning the second metal film and the active layer film by a second patterning process; Step 3 depositing a first transparent conductive film and patterning the first transparent conductive film, the second metal film and the active layer film by a third patterning process; depositing a passivation layer, forming a connection hole by patterning the passivation layer through the fourth patterning process, performing an ashing process on photoresist used in the fourth patterning process, depositing a second transparent conductive layer on the remaining photoresist, and forming a common electrode by a lifting-off process.

摘要翻译： 一种FFS型TFT-LCD阵列基板的制造方法，其特征在于，在第一图案形成工序中，在透明基板上淀积第一金属膜，形成栅极线，栅电极，公共电极线; 依次沉积栅极绝缘层，有源层膜和第二金属膜，并通过第二图案化工艺图案化第二金属膜和有源层膜; 步骤3沉积第一透明导电膜并通过第三图案化工艺图案化第一透明导电膜，第二金属膜和有源层膜; 沉积钝化层，通过第四图案化工艺图案化钝化层形成连接孔，在第四图案化工艺中使用的光致抗蚀剂上进行灰化处理，在剩余光致抗蚀剂上沉积第二透明导电层，并通过 起吊过程。

公开(公告)号：US20120307171A1

公开(公告)日：2012-12-06

申请号：US13478541

申请日：2012-05-23

申请人： Guanbao HUI ,  Seungjin CHOI ,  Weifeng ZHOU ,  Feng ZHANG

发明人： Guanbao HUI ,  Seungjin CHOI ,  Weifeng ZHOU ,  Feng ZHANG

IPC分类号： G02F1/136 ,  H01L33/60

CPC分类号： H01L27/1288 ,  G02F1/133345 ,  G02F1/133555 ,  G02F1/1368 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1262

摘要： An embodiment of the disclosed technology provides a pixel structure, comprising a TFT, a reflective region and a transmissive region, wherein the reflective region comprises a reflective region insulation layer, a reflection layer on the reflective region insulation layer and a reflective region pixel electrode on the reflection layer, and the transmissive region comprises a transmissive region pixel electrode, wherein the reflective region pixel electrode and the transmissive region pixel electrode form an integral structure, and the integral structure of the pixel electrodes is connected with the drain electrode of the TFT, wherein the organic layer in the reflective region is formed on an array substrate prior to a gate electrode of the TFT, and the reflection layer in the reflective region and the gate electrode of the TFT are formed in a same patterning process by using a same metal layer.

摘要翻译： 所公开的技术的一个实施例提供了一种像素结构，包括TFT，反射区域和透射区域，其中反射区域包括反射区域绝缘层，反射区域绝缘层上的反射层和反射区域像素电极 反射层和透射区域包括透射区域像素电极，其中反射区域像素电极和透射区域像素电极形成一体结构，并且像素电极的整体结构与TFT的漏极连接， 其中反射区域中的有机层在TFT的栅电极之前形成在阵列衬底上，并且反射区域中的反射层和TFT的栅极电极通过使用相同的金属在相同的图案化工艺中形成 层。

公开(公告)号：US20120273789A1

公开(公告)日：2012-11-01

申请号：US13457825

申请日：2012-04-27

申请人： Guanboa HUI ,  Seungjin CHOI ,  Feng ZHANG

发明人： Guanboa HUI ,  Seungjin CHOI ,  Feng ZHANG

IPC分类号： H01L29/786

CPC分类号： G02F1/136227 ,  G02F2001/134381 ,  H01L27/124 ,  H01L29/4908

摘要： An embodiment of the disclosed technology discloses an array substrate comprising: a base substrate; a first layer transparent common electrode formed on the base substrate; a gate metal common electrode formed on the first layer transparent common electrode; an insulation layer formed on the gate metal common electrode, with via holes being formed in the insulation layer; and a second layer transparent common electrode formed on the insulation layer. A side portion of via holes is in contact with the gate metal common electrode, another side portion is in contact with the first layer transparent common electrode, such that the second layer transparent common electrode is connected electrically with the first layer transparent common electrode and the gate metal common electrode in the via holes.

摘要翻译： 所公开技术的一个实施例公开了一种阵列基板，包括：基底; 形成在所述基底基板上的第一层透明公共电极; 形成在第一层透明公共电极上的栅极金属共电极; 形成在所述栅极金属公共电极上的绝缘层，在所述绝缘层中形成有通孔; 以及形成在绝缘层上的第二层透明公共电极。 通孔的侧部与栅极金属公共电极接触，另一侧部与第一层透明公共电极接触，使得第二层透明公共电极与第一层透明公共电极电连接， 栅极金属公共电极在通孔中。

公开(公告)号：US08298878B2

公开(公告)日：2012-10-30

申请号：US12784759

申请日：2010-05-21

申请人： Seongyeol Yoo ,  Seungjin Choi ,  Youngsuk Song

发明人： Seongyeol Yoo ,  Seungjin Choi ,  Youngsuk Song

IPC分类号： H01L21/00

CPC分类号： H01L27/1288 ,  H01L27/1214

摘要： The embodiment of the invention provides a manufacturing method for a thin film transistor liquid crystal display (TFT-LCD) array substrate, the manufacturing method comprises: step 1, depositing a transparent conductive film, a source/drain metal film and a doped semiconductor film on a transparent substrate sequentially, forming patterns of a doped semiconductor layer, a source electrode and a drain electrode of a thin film transistor, a data line and a pixel electrode by a first patterning process, wherein the doped semiconductor layer remains on the source electrode and the drain electrode; Step 2, depositing a semiconductor film on the whole transparent substrate after Step 1, forming a pattern of a semiconductor layer which includes a channel of the thin film transistor by a second patterning process; Step 3, depositing an insulating film and a gate metal film on the whole transparent substrate after Step 2, forming patterns of a gate line and a gate electrode of the thin film transistor by a third patterning process, wherein the gate electrode is located above the channel of the thin film transistor.

摘要翻译： 本发明的实施例提供一种薄膜晶体管液晶显示（TFT-LCD）阵列基板的制造方法，其制造方法包括：步骤1，沉积透明导电膜，源/漏金属膜和掺杂半导体膜 在透明基板上顺序地通过第一图案化工艺形成薄膜晶体管，数据线和像素电极的掺杂半导体层，源电极和漏电极的图案，其中掺杂半导体层保留在源极上 和漏电极; 步骤2，在步骤1之后，在整个透明衬底上沉积半导体膜，通过第二图案化工艺形成包括薄膜晶体管的沟道的半导体层的图案; 步骤3，在步骤2之后，在整个透明基板上沉积绝缘膜和栅极金属膜，通过第三图案化工艺形成薄膜晶体管的栅极线和栅电极的图案，其中栅电极位于 通道的薄膜晶体管。

公开(公告)号：US07897300B2

公开(公告)日：2011-03-01

申请号：US12128725

申请日：2008-05-29

申请人： Jing Lv ,  Seungjin Choi

发明人： Jing Lv ,  Seungjin Choi

IPC分类号： G03F1/00 ,  H01L21/00

CPC分类号： H01L27/1288 ,  G03F1/00 ,  G03F1/50 ,  H01L27/1214 ,  H01L29/66742

摘要： A scale mask comprises a U-shaped source mask region, a drain mask region with an end extending into the source mask region, and a U-shaped light-blocking bar arranged between the source mask region and the drain mask region. Slits are formed between the source mask region and the light-blocking bar and between the light-blocking bar and the drain mask region, respectively, and first compensating regions are provided at inner sides of ends of the source mask region.

摘要翻译： 刻度掩模包括U形源极掩模区域，具有延伸到源极掩模区域中的端部的漏极掩模区域和布置在源极掩模区域和漏极掩模区域之间的U形遮光条。 在源极掩模区域和遮光棒之间以及遮光条和漏极掩模区域之间分别形成狭缝，并且在源极掩模区域的端部的内侧设置有第一补偿区域。

公开(公告)号：US20110013130A1

公开(公告)日：2011-01-20

申请号：US12836028

申请日：2010-07-14

申请人： Seungjin CHOI ,  Youngsuk SONG ,  Seongyeol YOO

发明人： Seungjin CHOI ,  Youngsuk SONG ,  Seongyeol YOO

IPC分类号： G02F1/1343 ,  H01L21/336

CPC分类号： H01L27/1288 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1214

摘要： A manufacturing method for an FFS type TFT-LCD array substrate comprises: depositing a first metal film on a transparent substrate, and form a gate line, a gate electrode and a common electrode line by a first patterning process; depositing a gate insulating layer, an active layer film and a second metal film sequentially and patterning the second metal film and the active layer film by a second patterning process; Step 3 depositing a first transparent conductive film and patterning the first transparent conductive film, the second metal film and the active layer film by a third patterning process; depositing a passivation layer, forming a connection hole by patterning the passivation layer through the fourth patterning process, performing an ashing process on photoresist used in the fourth patterning process, depositing a second transparent conductive layer on the remaining photoresist, and forming a common electrode by a lifting-off process.

摘要翻译： 一种FFS型TFT-LCD阵列基板的制造方法，其特征在于，在第一图案形成工序中，在透明基板上淀积第一金属膜，形成栅极线，栅电极，公共电极线; 依次沉积栅极绝缘层，有源层膜和第二金属膜，并通过第二图案化工艺图案化第二金属膜和有源层膜; 步骤3沉积第一透明导电膜并通过第三图案化工艺图案化第一透明导电膜，第二金属膜和有源层膜; 沉积钝化层，通过第四图案化工艺图案化钝化层形成连接孔，在第四图案化工艺中使用的光致抗蚀剂上进行灰化处理，在剩余光致抗蚀剂上沉积第二透明导电层，并通过 起吊过程。

公开(公告)号：US20100075450A1

公开(公告)日：2010-03-25

申请号：US12565953

申请日：2009-09-24

申请人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

发明人： Seungjin Choi ,  Youngsuk Song ,  Seongyeol Yoo

IPC分类号： H01L21/28

CPC分类号： H01L27/1288 ,  G02F1/1368 ,  H01L27/1214

摘要： A method for manufacturing an array substrate of liquid crystal display comprising the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on the substrate; forming a photoresist pattern layer on the source/drain metal layer through a triple-tone mask; performing a wet-etching process on the source/drain metal layer and the first transparent conductive layer exposed from the photoresist pattern layer; performing a first ashing process on the photoresist pattern layer and performing a dry-etching process on the source/drain metal layer, the first transparent conductive layer and the active layer pattern exposed by the first ashing process; performing a second ashing process on the photoresist pattern layer and performing a wet-etching process on the source/drain metal layer exposed by the second ashing process; and removing the remaining photoresist pattern layer. According to the invention, the over-etching on the TFT channel region can be reduced and the display quality of the liquid crystal display can be ensured.

摘要翻译： 一种制造液晶显示器阵列基板的方法，包括以下步骤：依次提供具有栅极线，栅极绝缘层和有源层图案的基板; 在衬底上依次沉积第一透明导电层和源极/漏极金属层; 通过三色调掩模在源极/漏极金属层上形成光致抗蚀剂图案层; 对源极/漏极金属层和从光致抗蚀剂图案层露出的第一透明导电层进行湿法蚀刻工艺; 在所述光致抗蚀剂图案层上进行第一灰化处理，对所述源极/漏极金属层，所述第一透明导电层和所述有源层图案进行第一灰化处理曝光的干蚀刻处理; 在光致抗蚀剂图案层上进行第二灰化处理，并对通过第二灰化处理暴露的源极/漏极金属层进行湿法蚀刻处理; 并除去剩余的光致抗蚀剂图案层。 根据本发明，可以减少TFT沟道区上的过蚀刻，并且可以确保液晶显示器的显示质量。

公开(公告)号：US20090085034A1

公开(公告)日：2009-04-02

申请号：US12126253

申请日：2008-05-23

申请人： Seungjin Choi ,  Youngsuk Song

发明人： Seungjin Choi ,  Youngsuk Song

IPC分类号： H01L27/12

CPC分类号： H01L27/124 ,  G02F1/136259

摘要： The present invention relates to a thin film transistor array substrate comprising a gate line and a data line that are separated by an insulting layer and intersecting each other to define a pixel, wherein a data auxiliary line is disposed adjacent to an intersection portion between the data line and the gate line, and both ends of the data auxiliary line are on two sides of the intersection portion and connected with the data lines, respectively.

摘要翻译： 薄膜晶体管阵列基板技术领域本发明涉及一种薄膜晶体管阵列基板，包括由绝缘层分隔开并彼此相交以限定像素的栅极线和数据线，其中数据辅助线邻近数据之间的相交部分设置 线和栅极线，数据辅助线的两端分别在交叉部分的两侧并与数据线连接。

公开(公告)号：US09460398B2

公开(公告)日：2016-10-04

申请号：US13614546

申请日：2012-09-13

申请人： Jae-Mo Sung ,  Sun-Jae Lee ,  Seungjin Choi

发明人： Jae-Mo Sung ,  Sun-Jae Lee ,  Seungjin Choi

IPC分类号： G06K9/00 ,  G06N99/00

CPC分类号： G06N99/005 ,  G06K9/00342

摘要： A user activity real-time recognition apparatus and method are provided and include a collector configured to collect a frequency-domain signal for each user activity and to generate learning data based on the frequency-domain signal. The apparatus and method also include an extractor configured to extract a user activity feature from the frequency-domain signal based on an activity feature extracting model. The activity feature extracting model is learned based on the learning data from the collector. The apparatus and method further include a classifier configured to analyze the user activity feature to classify a user activity pattern based on an activity pattern classifying model and configured to transmit the classified user activity pattern to an application device.

摘要翻译： 提供了用户活动实时识别装置和方法，并且包括收集器，其被配置为针对每个用户活动收集频域信号，并且基于频域信号生成学习数据。 该装置和方法还包括提取器，其被配置为基于活动特征提取模型从频域信号中提取用户活动特征。 基于收集者的学习数据，学习活动特征提取模型。 所述装置和方法还包括：分类器，被配置为基于活动模式分类模型分析用户活动特征以对用户活动模式进行分类，并且被配置为将分类的用户活动模式发送到应用设备。