公开(公告)号：US20120273789A1

公开(公告)日：2012-11-01

申请号：US13457825

申请日：2012-04-27

申请人： Guanboa HUI ,  Seungjin CHOI ,  Feng ZHANG

发明人： Guanboa HUI ,  Seungjin CHOI ,  Feng ZHANG

IPC分类号： H01L29/786

CPC分类号： G02F1/136227 ,  G02F2001/134381 ,  H01L27/124 ,  H01L29/4908

摘要： An embodiment of the disclosed technology discloses an array substrate comprising: a base substrate; a first layer transparent common electrode formed on the base substrate; a gate metal common electrode formed on the first layer transparent common electrode; an insulation layer formed on the gate metal common electrode, with via holes being formed in the insulation layer; and a second layer transparent common electrode formed on the insulation layer. A side portion of via holes is in contact with the gate metal common electrode, another side portion is in contact with the first layer transparent common electrode, such that the second layer transparent common electrode is connected electrically with the first layer transparent common electrode and the gate metal common electrode in the via holes.

摘要翻译： 所公开技术的一个实施例公开了一种阵列基板，包括：基底; 形成在所述基底基板上的第一层透明公共电极; 形成在第一层透明公共电极上的栅极金属共电极; 形成在所述栅极金属公共电极上的绝缘层，在所述绝缘层中形成有通孔; 以及形成在绝缘层上的第二层透明公共电极。 通孔的侧部与栅极金属公共电极接触，另一侧部与第一层透明公共电极接触，使得第二层透明公共电极与第一层透明公共电极电连接， 栅极金属公共电极在通孔中。

公开(公告)号：US20120307171A1

公开(公告)日：2012-12-06

申请号：US13478541

申请日：2012-05-23

申请人： Guanbao HUI ,  Seungjin CHOI ,  Weifeng ZHOU ,  Feng ZHANG

发明人： Guanbao HUI ,  Seungjin CHOI ,  Weifeng ZHOU ,  Feng ZHANG

IPC分类号： G02F1/136 ,  H01L33/60

CPC分类号： H01L27/1288 ,  G02F1/133345 ,  G02F1/133555 ,  G02F1/1368 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1262

摘要： An embodiment of the disclosed technology provides a pixel structure, comprising a TFT, a reflective region and a transmissive region, wherein the reflective region comprises a reflective region insulation layer, a reflection layer on the reflective region insulation layer and a reflective region pixel electrode on the reflection layer, and the transmissive region comprises a transmissive region pixel electrode, wherein the reflective region pixel electrode and the transmissive region pixel electrode form an integral structure, and the integral structure of the pixel electrodes is connected with the drain electrode of the TFT, wherein the organic layer in the reflective region is formed on an array substrate prior to a gate electrode of the TFT, and the reflection layer in the reflective region and the gate electrode of the TFT are formed in a same patterning process by using a same metal layer.

摘要翻译： 所公开的技术的一个实施例提供了一种像素结构，包括TFT，反射区域和透射区域，其中反射区域包括反射区域绝缘层，反射区域绝缘层上的反射层和反射区域像素电极 反射层和透射区域包括透射区域像素电极，其中反射区域像素电极和透射区域像素电极形成一体结构，并且像素电极的整体结构与TFT的漏极连接， 其中反射区域中的有机层在TFT的栅电极之前形成在阵列衬底上，并且反射区域中的反射层和TFT的栅极电极通过使用相同的金属在相同的图案化工艺中形成 层。

公开(公告)号：US20120190197A1

公开(公告)日：2012-07-26

申请号：US13347865

申请日：2012-01-11

申请人： Guanbao HUI ,  Seungjin CHOI ,  Feng ZHANG ,  Jianshe XUE

发明人： Guanbao HUI ,  Seungjin CHOI ,  Feng ZHANG ,  Jianshe XUE

IPC分类号： H01L21/027 ,  G03F1/38

CPC分类号： G03F1/76 ,  G03F1/50 ,  H01L27/1288

摘要： An embodiment of the disclosed technology provides a mask plate for photolithography process comprising a first pattern region, a second pattern region having a different exposure level from that of the first pattern region, and a redundant pattern provided between the first pattern region and the second pattern region, wherein the redundant pattern is configured for forming a redundant photoresist pattern so as to prevent developer diffusion at different concentrations across the photoresist redundant pattern.

摘要翻译： 所公开技术的实施例提供了一种用于光刻工艺的掩模板，其包括第一图案区域，具有与第一图案区域不同的曝光水平的第二图案区域以及设置在第一图案区域和第二图案之间的冗余图案 区域，其中所述冗余图案被配置用于形成冗余光刻胶图案，以便阻止在所述光致抗蚀剂冗余图案上的不同浓度的显影剂扩散。

公开(公告)号：US20100075451A1

公开(公告)日：2010-03-25

申请号：US12561344

申请日：2009-09-17

申请人： Seongyeol YOO ,  Youngsuk SONG ,  Seungjin CHOI

发明人： Seongyeol YOO ,  Youngsuk SONG ,  Seungjin CHOI

IPC分类号： H01L21/28 ,  H01L21/306

CPC分类号： H01L29/78603 ,  H01L27/1218 ,  H01L29/66765

摘要： The present invention discloses a method for manufacturing thin film structure, which comprises the following steps: providing a substrate having a first recess and a second recess formed therein with the first recess being deeper than the second recess; depositing a first material layer and a second material layer of different thicknesses successively on the substrate; and grinding the substrate so that a flat upper surface is formed and the first material layer and the second material layer are remained in the first recess while only the first material layer is remained in the second recess. The present invention also discloses a method for manufacturing fringe field switching type liquid crystal display array substrate. With the present invention, it is possible to make the upper surface flat while forming patterns on two layers of thin films respectively by using a single mask.

摘要翻译： 本发明公开了一种制造薄膜结构的方法，包括以下步骤：提供具有第一凹部和形成在其中的第二凹部的基板，其中第一凹部比第二凹部更深; 在衬底上依次沉积不同厚度的第一材料层和第二材料层; 并且研磨所述基板，使得形成平坦的上表面，并且所述第一材料层和所述第二材料层保留在所述第一凹部中，同时仅所述第一材料层保留在所述第二凹部中。 本发明还公开了一种用于制造条纹场开关型液晶显示阵列基板的方法。 利用本发明，可以通过使用单个掩模分别在两层薄膜上形成图案而使上表面平坦。

公开(公告)号：US20120292625A1

公开(公告)日：2012-11-22

申请号：US13475622

申请日：2012-05-18

申请人： Youngsuk SONG ,  Seungjin CHOI ,  Seongyeol YOO

发明人： Youngsuk SONG ,  Seungjin CHOI ,  Seongyeol YOO

IPC分类号： H01L33/16 ,  H01L33/60

CPC分类号： G02F1/1362 ,  G02F1/133555 ,  G02F1/134363 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/134372 ,  G02F2001/136231 ,  G02F2001/136236 ,  G02F2201/48 ,  H01L27/1288

摘要： An embodiment of the disclosed technology provides a method of manufacturing an array substrate, comprising: a first mask process of forming an inorganic material protrusion on a base substrate; a second mask process of forming a reflective region pattern, a gate line, a gate electrode branched from the gate line, and a common electrode; a third mask process of forming an active island and a data line formed and forming a source electrode connected to the data line and a drain electrode on the active island and a channel; a fourth mask process of forming an insulation material layer, treating the insulation material layer to form a planarization layer, and forming a through hole above the drain electrode; and a fifth mask process of forming a pixel electrode and connected to the drain electrode via the through hole in a reflective region.

摘要翻译： 所公开的技术的一个实施例提供一种制造阵列基板的方法，包括：在基底基板上形成无机材料突起的第一掩模工艺; 形成反射区域图案的第二掩模工艺，栅极线，从栅极线分支的栅电极和公共电极; 形成有源岛和数据线的第三掩模处理，并且形成连接到有源岛上的数据线和漏电极的源电极和沟道; 形成绝缘材料层的第四掩模工艺，处理绝缘材料层以形成平坦化层，以及在漏电极之上形成通孔; 以及形成像素电极并通过反射区域中的通孔连接到漏电极的第五掩模处理。

公开(公告)号：US20110054848A1

公开(公告)日：2011-03-03

申请号：US12855194

申请日：2010-08-12

申请人： Min Je KIM ,  Seungjin CHOI ,  Jiho YOO ,  Kyeongok KANG ,  Inseon JANG ,  Jin-Woo HONG

发明人： Min Je KIM ,  Seungjin CHOI ,  Jiho YOO ,  Kyeongok KANG ,  Inseon JANG ,  Jin-Woo HONG

IPC分类号： H04B15/00

CPC分类号： G10H1/0008 ,  G10H2210/056 ,  G10H2240/131

摘要： Provided is an apparatus of separating a musical sound source, which may re-construct mixed signals into target sound sources and other sound sources directly using sound source information performed using a predetermined musical instrument when the sound source information is present, thereby more effectively separating sound sources included in the mixed signal. The apparatus may include a Nonnegative Matrix Partial Co-Factorization (NMPCF) analysis unit to perform an NMPCF analysis on a mixed signal and a predetermined sound source signal using a sound source separation model, and to obtain a plurality of entity matrices based on the analysis result, and a target instrument signal separating unit to separate, from the mixed signal, a target instrument signal corresponding to the predetermined sound source signal by calculating an inner product between the plurality of entity matrices.

摘要翻译： 提供了一种分离音乐声源的装置，其可以在存在声源信息时使用预定乐器执行的声源信息直接重新构建混合信号到目标声源和其他声源，从而更有效地分离声音 来源包括在混合信号中。 该装置可以包括使用声源分离模型对混合信号和预定声源信号执行NMPCF分析的非负矩阵部分因子分解（NMPCF）分析单元，并且基于分析获得多个实体矩阵 结果和目标仪器信号分离单元，通过计算多个实体矩阵之间的内积，从混合信号中分离出与预定声源信号对应的目标仪器信号。

公开(公告)号：US20120094472A1

公开(公告)日：2012-04-19

申请号：US13248908

申请日：2011-09-29

申请人： Seongyeol YOO ,  Youngsuk SONG ,  Seungjin CHOI ,  Zhanfeng CAO

发明人： Seongyeol YOO ,  Youngsuk SONG ,  Seungjin CHOI ,  Zhanfeng CAO

IPC分类号： H01L21/20

CPC分类号： G03F7/0035 ,  H01L27/124 ,  H01L27/1288

摘要： A method for fabricating a thin film pattern and a method for fabricating an array substrate are provided. The method for fabricating a thin film pattern comprises: forming a first film and a second film sequentially; applying a layer of photoresist on the second film; forming a photoresist pattern comprising a totally left region, a partially left region and a totally removed region; performing a first wet etching on the second film in the totally removed region; performing a first dry etching on the first film in the totally removed region to form a first pattern, and etching the photoresist layer to remove the photoresist in the partially left region to expose the second film in the partially left region; performing a second wet etching on the second film in the partially left region; performing a second dry etching to form a second pattern; and removing the residual photoresist.

摘要翻译： 提供一种薄膜图案的制造方法和阵列基板的制造方法。 制造薄膜图案的方法包括：依次形成第一膜和第二膜; 在第二膜上施加一层光致抗蚀剂; 形成包括完全左区域，部分左区域和完全去除区域的光致抗蚀剂图案; 在完全去除的区域中对第二膜执行第一湿蚀刻; 在完全去除的区域中对第一膜执行第一干蚀刻以形成第一图案，并蚀刻光致抗蚀剂层以去除部分左侧区域中的光致抗蚀剂，以暴露部分左侧区域中的第二膜; 在部分左侧区域中的第二膜上进行第二湿蚀刻; 执行第二干蚀刻以形成第二图案; 并除去残留的光致抗蚀剂。

公开(公告)号：US20110013130A1

公开(公告)日：2011-01-20

申请号：US12836028

申请日：2010-07-14

申请人： Seungjin CHOI ,  Youngsuk SONG ,  Seongyeol YOO

发明人： Seungjin CHOI ,  Youngsuk SONG ,  Seongyeol YOO

IPC分类号： G02F1/1343 ,  H01L21/336

CPC分类号： H01L27/1288 ,  G02F1/134363 ,  G02F2001/134372 ,  H01L27/1214

摘要： A manufacturing method for an FFS type TFT-LCD array substrate comprises: depositing a first metal film on a transparent substrate, and form a gate line, a gate electrode and a common electrode line by a first patterning process; depositing a gate insulating layer, an active layer film and a second metal film sequentially and patterning the second metal film and the active layer film by a second patterning process; Step 3 depositing a first transparent conductive film and patterning the first transparent conductive film, the second metal film and the active layer film by a third patterning process; depositing a passivation layer, forming a connection hole by patterning the passivation layer through the fourth patterning process, performing an ashing process on photoresist used in the fourth patterning process, depositing a second transparent conductive layer on the remaining photoresist, and forming a common electrode by a lifting-off process.

摘要翻译： 一种FFS型TFT-LCD阵列基板的制造方法，其特征在于，在第一图案形成工序中，在透明基板上淀积第一金属膜，形成栅极线，栅电极，公共电极线; 依次沉积栅极绝缘层，有源层膜和第二金属膜，并通过第二图案化工艺图案化第二金属膜和有源层膜; 步骤3沉积第一透明导电膜并通过第三图案化工艺图案化第一透明导电膜，第二金属膜和有源层膜; 沉积钝化层，通过第四图案化工艺图案化钝化层形成连接孔，在第四图案化工艺中使用的光致抗蚀剂上进行灰化处理，在剩余光致抗蚀剂上沉积第二透明导电层，并通过 起吊过程。

公开(公告)号：US20130262352A1

公开(公告)日：2013-10-03

申请号：US13614546

申请日：2012-09-13

申请人： Jae-Mo SUNG ,  Sun-Jae LEE ,  Seungjin CHOI

发明人： Jae-Mo SUNG ,  Sun-Jae LEE ,  Seungjin CHOI

IPC分类号： G06F15/18

CPC分类号： G06N99/005 ,  G06K9/00342

摘要： A user activity real-time recognition apparatus and method are provided and include a collector configured to collect a frequency-domain signal for each user activity and to generate learning data based on the frequency-domain signal. The apparatus and method also include an extractor configured to extract a user activity feature from the frequency-domain signal based on an activity feature extracting model. The activity feature extracting model is learned based on the learning data from the collector. The apparatus and method further include a classifier configured to analyze the user activity feature to classify a user activity pattern based on an activity pattern classifying model and configured to transmit the classified user activity pattern to an application device.

摘要翻译： 提供了用户活动实时识别装置和方法，并且包括收集器，其被配置为针对每个用户活动收集频域信号，并且基于频域信号生成学习数据。 该装置和方法还包括提取器，其被配置为基于活动特征提取模型从频域信号中提取用户活动特征。 基于收集者的学习数据，学习活动特征提取模型。 所述装置和方法还包括：分类器，被配置为基于活动模式分类模型分析用户活动特征以对用户活动模式进行分类，并且被配置为将分类的用户活动模式发送到应用设备。

公开(公告)号：US20120119232A1

公开(公告)日：2012-05-17

申请号：US13278360

申请日：2011-10-21

申请人： Youngsuk SONG ,  Seungjin CHOI ,  Seongyeol YOO

发明人： Youngsuk SONG ,  Seungjin CHOI ,  Seongyeol YOO

IPC分类号： H01L29/786 ,  H01L21/336

CPC分类号： H01L27/1288 ,  G02F2001/136236

摘要： An embodiment of the invention provides a method for manufacturing an array substrate, wherein the procedure for forming a data line, an active layer with a channel, a source electrode, a drain electrode and a pixel electrode comprises applying a photoresist on a data line metal thin film and performing exposure and development processes by using a multi-tone mask so as to form a photoresist pattern including a third thickness region, a second thickness region and a first thickness region whose thicknesses are successively increased, the third thickness region at least corresponding to the pixel electrode, the second thickness region corresponding to the data line, the active layer, the source electrode and the drain electrode, and the first thickness region corresponding to the other regions.

摘要翻译： 本发明的一个实施例提供了一种用于制造阵列基板的方法，其中用于形成数据线的步骤，具有沟道的有源层，源电极，漏电极和像素电极包括在数据线金属 薄膜，并通过使用多色调掩模进行曝光和显影处理，以形成包括第三厚度区域，第二厚度区域和厚度依次增加的第一厚度区域的光致抗蚀剂图案，第三厚度区域至少相应地 对应于数据线，有源层，源电极和漏电极的第二厚度区域和对应于其它区域的第一厚度区域到像素电极。