Abstract:
A phase frequency detector used in a phase locked loop includes a phase error detecting unit for outputting phase error signals according to a phase error between a first input signal and a second input signal, and a reset unit coupled to the phase error detecting unit. The reset unit outputs reset signals according to the first and second input signals so as to reset the phase error detecting unit without delay time. Thus, it is possible to make the output timing of the phase error signal in a more precisely linear proportion to the phase error value and to enhance the sensitivity of the phase locked loop.
Abstract:
A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.
Abstract:
The invention discloses a display control device and method thereof. The display control device and method thereof utilize the phase deviation and the frequency deviation between the output signal and the input signal caused during channel switching to provide converting time acceptable by a display device and to achieve the objective of balancing the data stream transmission.
Abstract:
The invention relates to an image processing chip and related method. The image processing chip includes a pin for receiving a composite signal; a synchronization signal detecting circuit, coupled to the pin, for extracting a synchronization signal from the composite signal; a clamping circuit, coupled to the pin, for adjusting a voltage level of the composite signal according to the synchronization signal; and an analog to digital converter, coupled to the pin, for generating a video signal by sampling the composite signal.
Abstract:
A noise processing device and its method are provided for a video/audio system having a high definition multimedia interface (HDMI). The noise processing device includes a detecting unit, a signal generating unit, and a decision unit. The noise processing method includes using the detecting unit to monitor a variation related to an audio signal and generate a detecting signal accordingly; using the signal generating unit to produce an adjustment signal according to the detecting signal; and using the decision unit to produce an output audio signal according to the audio signal and the adjustment signal. Another embodiment of the noise processing device includes a compensation tracking unit having a control unit. The compensation tracking unit produces an output audio signal according to a difference between the output audio signal itself and the audio signal and a gain of the control unit.
Abstract:
A method to assess signal transmission quality and the adjust method thereof are proposed. First, different time points of a control signal at a receiving end are acquired and the number of signal transitions in a predetermined time interval is counted. Next, the number of signal transitions is recorded and compared to a reference value to obtain a comparison result. The quality of the control signal is then determined based on the comparison result. The parameter setting of the receiving end is adjusted according to the quality of the control signal received by the receiving end to get a better performance setting.
Abstract:
A frame synchronization method includes: temporarily storing input data of at least one source frame in a frame buffer according to an input time sequence; generating an output time sequence according to the input time sequence and a delay time; generating output data of a destination frame according to the input data of the source frame; and outputting the output data of the destination frame according to an output time sequence; wherein an average frame rate of the source frame is substantially the same as that of the destination frame.
Abstract:
A method for adjusting a phase of a sampling frequency of ADC is disclosed. The method includes converting an analog signal into a first digital signal according to a first phase of the sampling frequency during a first time interval; calculating a first value according to the first digital signal; converting the analog signal into a second digital signal according to a second phase of the sampling frequency during a second time interval; calculating a second value according to the second digital signal; and adjusting the phase of the sampling frequency according to the first value and the second value.
Abstract:
The invention discloses a apparatus and related method. The apparatus comprises a front-end circuit, a back-end circuit and a determining unit. The front-end circuit is for measuring an image signal, determining the mode of the image signal according to the data of the image signal, and fetching image signal of the image signal. The back-end circuit is for processing the image signal according to the above-mentioned mode, and generating a feedback signal according to the status of the image signal after fetching there-to-fore. The determining unit is for generating a control signal to the front-end circuit according to the feedback signal for adjusting the setting of the mode.
Abstract:
The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.