Differential signal generating device with low power consumption
    1.
    发明授权
    Differential signal generating device with low power consumption 有权
    差分信号发生装置,功耗低

    公开(公告)号:US08362804B2

    公开(公告)日:2013-01-29

    申请号:US12726931

    申请日:2010-03-18

    IPC分类号: H03K19/0175

    CPC分类号: H03K5/151 H03K19/0008

    摘要: A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.

    摘要翻译: 差分信号发生装置包括控制电路和接收单端信号的差分信号驱动器。 当源信号符合第一预定义状态时,控制电路接收源信号并产生对应于第一模式的控制信号,并且当源信号符合第二预定义状态时,控制电路对应于第二模式。 源信号的变化与单端信号的信号内容有关。 差分信号驱动器耦合到控制单元以从其接收控制信号。 当控制信号对应于第一模式时,差分信号驱动器根据单端信号输出差分信号。 当控制信号对应于第二模式时,差分信号驱动器输出非差分信号输出。

    Apparatus and method for reducing output rate of video data
    2.
    发明申请
    Apparatus and method for reducing output rate of video data 有权
    降低视频数据输出速率的装置和方法

    公开(公告)号:US20080211821A1

    公开(公告)日:2008-09-04

    申请号:US12010374

    申请日:2008-01-24

    IPC分类号: G09G5/00 G06F3/033

    CPC分类号: G09G5/006

    摘要: A method for reducing output rate of video data for DisplayPort sink device is disclosed. By reducing the size of a blank area in a video frame, the invention reduces a pixel rate to become compatible with more types of back-end circuits having lower processing rates.

    摘要翻译: 公开了一种用于降低DisplayPort宿设备的视频数据输出速率的方法。 通过减小视频帧中的空白区域的大小,本发明降低像素速率以与具有较低处理速率的更多类型的后端电路相兼容。

    VIDEO SINK DEVICE
    3.
    发明申请
    VIDEO SINK DEVICE 有权
    视频SINK设备

    公开(公告)号:US20080266454A1

    公开(公告)日:2008-10-30

    申请号:US12109868

    申请日:2008-04-25

    IPC分类号: H03L7/00 H04N5/04

    CPC分类号: H04N5/04 H03L7/06

    摘要: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

    摘要翻译: 本发明公开了一种信宿设备。 宿设备包括缓冲单元和时钟发生单元。 缓冲单元根据符号时钟信号接收解码数据,根据像素时钟信号读取解码数据,并产生水位值。 时钟发生单元接收符号时钟信号以产生像素时钟信号,并根据水位值和/或相位差信号调整像素时钟信号的速率。

    Video sink device
    4.
    发明授权
    Video sink device 有权
    视频接收设备

    公开(公告)号:US08331460B2

    公开(公告)日:2012-12-11

    申请号:US12109868

    申请日:2008-04-25

    IPC分类号: H04N7/12 H04N11/02 H04N11/04

    CPC分类号: H04N5/04 H03L7/06

    摘要: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

    摘要翻译: 本发明公开了一种信宿设备。 宿设备包括缓冲单元和时钟发生单元。 缓冲单元根据符号时钟信号接收解码数据,根据像素时钟信号读取解码数据,并产生水位值。 时钟发生单元接收符号时钟信号以产生像素时钟信号,并根据水位值和/或相位差信号调整像素时钟信号的速率。

    Apparatus and method for reducing output rate of video data
    5.
    发明授权
    Apparatus and method for reducing output rate of video data 有权
    降低视频数据输出速率的装置和方法

    公开(公告)号:US08330761B2

    公开(公告)日:2012-12-11

    申请号:US12010374

    申请日:2008-01-24

    IPC分类号: G06F15/00

    CPC分类号: G09G5/006

    摘要: A method for reducing output rate of video data for DisplayPort sink device is disclosed. By reducing the size of a blank area in a video frame, the invention reduces a pixel rate to become compatible with more types of back-end circuits having lower processing rates.

    摘要翻译: 公开了一种用于降低DisplayPort宿设备的视频数据输出速率的方法。 通过减小视频帧中的空白区域的大小,本发明降低像素速率以与具有较低处理速率的更多类型的后端电路相兼容。

    DEVICE AND METHOD FOR 3-D DISPLAY CONTROL
    7.
    发明申请
    DEVICE AND METHOD FOR 3-D DISPLAY CONTROL 有权
    3-D显示控制的装置和方法

    公开(公告)号:US20120007861A1

    公开(公告)日:2012-01-12

    申请号:US13179810

    申请日:2011-07-11

    IPC分类号: G06T15/00

    CPC分类号: H04N13/341

    摘要: A representative Device and Method for 3-D Display Control is disclosed. The method for controlling stereo image display is disclosed. That is, to receive an image input signal wherein the image input signal includes a first refresh rate; to convert a frame rate of the image input signal to generate an image output signal, wherein the image output signal includes a second refresh rate which is higher than the first refresh rate, and includes a first image signal, a first VBI (Vertical Blanking Interval), a second image signal, a second VBI, a third image signal and a third VBI; to output a control signal for a left eye shutter of shutter glasses during a duration between the first VBI and a part of the second image signal; and to output a control signal for a right eye shutter of the shutter glasses during a duration between a part of the third image signal and the third VBI.

    摘要翻译: 公开了一种用于3D显示控制的代表性装置和方法。 公开了用于控制立体图像显示的方法。 也就是说,接收图像输入信号,其中图像输入信号包括第一刷新率; 转换图像输入信号的帧速率以产生图像输出信号,其中图像输出信号包括高于第一刷新率的第二刷新率,并且包括第一图像信号,第一VBI(垂直消隐间隔 ),第二图像信号,第二VBI,第三图像信号和第三VBI; 在第一VBI和第二图像信号的一部分之间的持续时间期间输出用于快门眼镜的左眼快门的控制信号; 并且在第三图像信号的一部分和第三VBI之间的持续时间期间输出用于快门眼镜的右眼快门的控制信号。

    DEVICE AND METHOD FOR 3-D DISPLAY CONTROL
    8.
    发明申请
    DEVICE AND METHOD FOR 3-D DISPLAY CONTROL 有权
    3-D显示控制的装置和方法

    公开(公告)号:US20130016195A1

    公开(公告)日:2013-01-17

    申请号:US13560590

    申请日:2012-07-27

    IPC分类号: H04N13/04

    CPC分类号: H04N13/341

    摘要: A control device for three dimensional display has an image processor and a timing signal generator. The image processor is used for receiving a first and a second input image signals to generate a first, a second, and a third output image signals. The first output image signal comprises part of the first input image signal. The second output image signal comprises part of the first input image signal and part of the second input image signal. The third output image signal comprises part of the second input image signal. The timing signal generator is used for generating a first lens control signal for configuring a first lens to be non-opaque when the second output image signal is displayed on a display device, and generating a second lens control signal for configuring a second lens to be non-opaque when the third output image signal is displayed on the display device.

    摘要翻译: 用于三维显示的控制装置具有图像处理器和定时信号发生器。 图像处理器用于接收第一和第二输入图像信号以产生第一,第二和第三输出图像信号。 第一输出图像信号包括第一输入图像信号的一部分。 第二输出图像信号包括第一输入图像信号的一部分和第二输入图像信号的一部分。 第三输出图像信号包括第二输入图像信号的一部分。 定时信号发生器用于产生第一透镜控制信号,用于在第二输出图像信号显示在显示装置上时将第一透镜配置为不透明,并且产生用于将第二透镜配置为第二透镜控制信号 当第三输出图像信号显示在显示装置上时,不透明。

    Level shifter with body-biased circuit
    9.
    发明授权
    Level shifter with body-biased circuit 有权
    电平移位器带有主体偏置电路

    公开(公告)号:US07123236B2

    公开(公告)日:2006-10-17

    申请号:US10691530

    申请日:2003-10-24

    IPC分类号: G09G3/36

    摘要: A level shifter, with body-biased circuits, is provided for applying in a thin film transistor liquid crystal display (TFT-LCD). The body-biased circuits are configured to bias the bodies of the input terminal transistors of the level shifter so that the threshold voltages of the input terminal transistors are adjustable. This level shifter is capable of operating at a high frequency with low power consumption while a low-level signal is inputting.

    摘要翻译: 提供具有体偏置电路的电平移位器用于施加在薄膜晶体管液晶显示器(TFT-LCD)中。 主体偏置电路被配置为偏置电平移位器的输入端子晶体管的主体,使得输入端子晶体管的阈值电压是可调节的。 该电平移位器能够在低电平信号输入时以低功耗高频工作。

    Over-drive controller applied to a display panel and method for over-drive control therein
    10.
    发明授权
    Over-drive controller applied to a display panel and method for over-drive control therein 有权
    应用于显示面板的过驱动控制器及其中的过驱动控制方法

    公开(公告)号:US08665194B2

    公开(公告)日:2014-03-04

    申请号:US13045549

    申请日:2011-03-11

    IPC分类号: G09G3/36

    摘要: An over-drive controller applied to a display panel and a method for over-drive control are provided. The over-drive controller includes an analyzing unit and an over-drive delta value determining unit. The analyzing unit is arranged for analyzing information of a current pixel in order to generate an over-drive information. The over-drive delta value determining unit is coupled to the analyzing unit, and is arranged for determining an over-drive delta value according to the over-drive information. Herein the over-drive information includes a position information or a field information of the current pixel.

    摘要翻译: 提供了应用于显示面板的过驱动控制器和用于过驱动控制的方法。 过驱动控制器包括分析单元和过驱动器增量值确定单元。 该分析单元用于分析当前像素的信息以产生过驱动信息。 过驱动增量值确定单元耦合到分析单元,并且被布置用于根据过驱动信息来确定过驱动增量值。 这里,过驱动信息包括当前像素的位置信息或场信息。