Flexible remote direct memory access

    公开(公告)号:US11436183B2

    公开(公告)日:2022-09-06

    申请号:US17139621

    申请日:2020-12-31

    Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

    Changing hardware capabilities of a device

    公开(公告)号:US10708129B1

    公开(公告)日:2020-07-07

    申请号:US15298208

    申请日:2016-10-19

    Abstract: A technology is provided for changing a hardware capability of an internet capable device. A hardware capability of an internet capable device is restrained to a first limit based on a first configuration definition. A second configuration definition is requested to change the first limit set by the first configuration definition from a service provider environment. A second configuration definition is received from the service provider environment at the internet capable device. The hardware capability of the internet capable device are changed to a second limit based on the second configuration definition.

    FLEXIBLE REMOTE DIRECT MEMORY ACCESS
    25.
    发明申请

    公开(公告)号:US20200151137A1

    公开(公告)日:2020-05-14

    申请号:US16702187

    申请日:2019-12-03

    Abstract: Apparatus and methods are disclosed herein for remote, direct memory access (RDMA) technology that enables direct memory access from one host computer memory to another host computer memory over a physical or virtual computer network according to a number of different RDMA protocols. In one example, a method includes receiving remote direct memory access (RDMA) packets via a network adapter, deriving a protocol index identifying an RDMA protocol used to encode data for an RDMA transaction associated with the RDMA packets, applying the protocol index to a generate RDMA commands from header information in at least one of the received RDMA packets, and performing an RDMA operation using the RDMA commands.

    Storage adapter device for communicating with network storage

    公开(公告)号:US10162793B1

    公开(公告)日:2018-12-25

    申请号:US14869700

    申请日:2015-09-29

    Abstract: Provided are systems and methods for a storage adapter device for communicating with network storage. In some implementations, the storage adapter device comprises a host interface. In these implementations, the host interface may be configured to communicate with a host device using a local bus protocol. In some implementations, the storage adapter device also includes a network interface. In these implementations, the network interface may communicate with a network using a network protocol. In some implementations, the storage adapter device may be configured to communicate with a remote storage device. In some implementations, the storage adapter device may also be configured to translate a request from the host interface from the local bus protocol to the network protocol. The storage adapter device may further be configured to transmit the translated request to the remote storage device.

    Reducing input/output latency using a direct memory access (DMA) engine

    公开(公告)号:US09959227B1

    公开(公告)日:2018-05-01

    申请号:US14971759

    申请日:2015-12-16

    CPC classification number: G06F13/28 G06F12/0862 G06F2212/6028

    Abstract: Apparatus and methods are disclosed herein for reducing I/O latency when accessing data using a direct memory access (DMA) engine with a parser. A DMA descriptor indicating memory buffer location can be stored in cache. A DMA descriptor read command is generated and can include a prefetch command. A descriptor with the indicator can be communicated to the DMA engine in response to the read. A second parser can detect the descriptor communication, parse the descriptor, and can prefetch data from memory to cache while the descriptor is being communicated to the DMA engine and/or parsed by the DMA engine parser. When the DMA engine parses the descriptor, data can be accessed from cache rather than memory, to decrease latency.

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