公开(公告)号：US10319714B2

公开(公告)日：2019-06-11

申请号：US15413825

申请日：2017-01-24

Applicant: ANALOG DEVICES, INC.

Inventor： Sirui Luo ,  Javier Alejandro Salcedo

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/78

Abstract: High voltage drain-extended metal-oxide-semiconductor (DEMOS) bipolar switches for electrical overstress protection are provided. In certain configurations herein, an electrical overstress switch embodiment for providing electrical overstress protection, such as electrostatic discharge/electrical overstress (ESD/EOS) protection includes both a DEMOS device and an embedded bipolar device. The switch is implemented to achieve the advantages provided by the combined conduction of DEMOS and bipolar devices. For example, the DEMOS device provides surface conduction at the gate region for relatively fast switch device turn on and low voltage overshoot, while the bipolar device provides high current conduction during stress condition and a high holding voltage characteristics to prevent latch-up in mission critical integrated circuit applications.

公开(公告)号：US20190131787A1

公开(公告)日：2019-05-02

申请号：US15794394

申请日：2017-10-26

Applicant: ANALOG DEVICES, INC.

Inventor： Linfeng He ,  Javier Alejandro Salcedo ,  Srivatsan Parthasarathy

IPC: H02H9/04 ,  H01L27/02 ,  H01L29/74 ,  H01L23/528

Abstract: Electrical overstress protection via silicon controlled rectifier (SCR) trigger amplification control is provided. In certain configurations, an overstress protection circuit includes a control circuit for detecting presence of an overstress event between a first pad and a second pad of an interface, and a discharge circuit electrically connected between the first pad and the second pad and selectively activated by the control circuit. The interface corresponds to an electronic interface of an integrated circuit (IC), a System on a Chip (SoC), or System in-a-Package (SiP). The discharge circuit includes a first smaller SCR and a second larger SCR. In response to detecting an overstress event, the control circuit activates the smaller SCR, which in turn activates the larger SCR to provide clamping between the first pad and the second pad.

公开(公告)号：US10199369B2

公开(公告)日：2019-02-05

申请号：US15060932

申请日：2016-03-04

Applicant: ANALOG DEVICES, INC.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo

IPC: H01L27/02 ,  H02H9/04 ,  H03K17/30

Abstract: Apparatus and methods for transient overstress protection with false condition shutdown are provided herein. In certain configurations, a high-voltage tolerant actively-controlled protection circuit includes a transient overstress detection circuit, a clamp circuit electrically connected between a first node and a second node, a bias circuit that biases the clamp circuit, and a false condition shutdown circuit. The transient overstress detection circuit generates a detection signal indicating whether or not a transient overstress event is detected between the first and second nodes. Additionally, the false condition shutdown circuit generates a false condition shutdown signal based on low pass filtering a voltage difference between the first and second nodes, thereby determining independently whether or not power is present. The bias circuit controls operation of the clamp circuit in an on state or an off state based on the detection signal and the false condition shutdown signal.

公开(公告)号：US09929142B2

公开(公告)日：2018-03-27

申请号：US14638880

申请日：2015-03-04

Applicant: Analog Devices, Inc.

Inventor： Evgueni Ivanov ,  Javier Alejandro Salcedo

IPC: H02H9/04 ,  H01L27/02 ,  H01L29/735 ,  H01L29/06

CPC classification number: H01L27/0262 ,  H01L29/0692 ,  H01L29/735

Abstract: Apparatus and methods for overvoltage switches with active leakage current compensation are provided. In certain configurations, an IC includes an input node and a protection device or overvoltage switch electrically connected to the input node. The protection device includes a first well and a second well. The second well is positioned adjacent to the first well and has a conductivity type opposite that of the first well. Additionally, a first terminal of the protection device is electrically connected to the first well and to the input node of the IC. The protection device further includes a leakage current compensation circuit that is used to control a voltage level of the second well based on a voltage level of the first terminal to inhibit a leakage current of the first terminal of the protection device.

公开(公告)号：US20180026440A1

公开(公告)日：2018-01-25

申请号：US15215938

申请日：2016-07-21

Applicant: ANALOG DEVICES, INC.

Inventor： James Zhao ,  Javier Alejandro Salcedo ,  Srivatsan Parthasarathy

IPC: H02H9/04

Abstract: High voltage clamps with active activation and activation-release control are provided herein. In certain configurations, a clamp can have scalable operating clamping voltage level and can be used to protect the electrical circuit connected to a power supply of a semiconductor chip from damage from an overstress event, such as electrostatic discharge (ESD) events. The pins of the power supply are actively monitored to detect when an overstress event is present, and the clamp is turned-on in response to detecting the overstress event. A timer is used to shut down the clamp after a time delay from detecting the overstress event, thereby providing a false detection shutdown mechanism that prevents the protection clamp from getting falsely activated and remain in the on-state during normal circuit operation.

公开(公告)号：US20170256534A1

公开(公告)日：2017-09-07

申请号：US15060932

申请日：2016-03-04

Applicant: ANALOG DEVICES, INC.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo

IPC: H01L27/02

CPC classification number: H01L27/0285 ,  H01L27/0259 ,  H02H9/04 ,  H02H9/046 ,  H03K17/305

Abstract: Apparatus and methods for transient overstress protection with false condition shutdown are provided herein. In certain configurations, a high-voltage tolerant actively-controlled protection circuit includes a transient overstress detection circuit, a clamp circuit electrically connected between a first node and a second node, a bias circuit that biases the clamp circuit, and a false condition shutdown circuit. The transient overstress detection circuit generates a detection signal indicating whether or not a transient overstress event is detected between the first and second nodes. Additionally, the false condition shutdown circuit generates a false condition shutdown signal based on low pass filtering a voltage difference between the first and second nodes, thereby determining independently whether or not power is present. The bias circuit controls operation of the clamp circuit in an on state or an off state based on the detection signal and the false condition shutdown signal.

公开(公告)号：US09673187B2

公开(公告)日：2017-06-06

申请号：US14796731

申请日：2015-07-10

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Jonathan Pfeifer

IPC: H01L27/02

CPC classification number: H01L27/0259 ,  H01L27/0207 ,  H01L27/0262

Abstract: The disclosed technology relates to electronics, and more particularly, to protection devices that protect circuits from transient electrical events such as electrical overstress/electrostatic discharge. A protection device includes a semiconductor substrate having formed therein at least two wells and a deep well underlying and contacting the at least two wells. The device additionally includes a first PN diode formed in one of the at least two wells and having a first heavily doped region of a first conductivity type and a first heavily doped region of a second conductivity type, and includes a second PN diode formed in one of the at least two wells and having a second heavily doped region of the first conductivity type and a second heavily doped region of the second conductivity type. The device additionally includes a first PN diode and the second PN diode are electrically shorted by an electrical shorting structure to form a first plurality of serially connected diodes having a threshold voltage. The device further includes a PNPN silicon-controlled rectifier (SCR) having a trigger voltage and comprising the first heavily doped region of the first conductivity type, the at least two wells, the deep well, and the second heavily doped region of the second conductivity type.

公开(公告)号：US09362265B2

公开(公告)日：2016-06-07

申请号：US14593477

申请日：2015-01-09

Applicant: Analog Devices, Inc.

Inventor： Javier Alejandro Salcedo ,  Srivatsan Parthasarathy

IPC: H01L23/62 ,  H01L27/02 ,  H01L21/8222

CPC classification number: H01L27/0262 ,  H01L21/8222 ,  H01L27/0259

Abstract: Apparatus and methods for precision mixed-signal electronic circuit protection are provided. In one embodiment, an apparatus includes a p-well, an n-well, a poly-active diode structure, a p-type active region, and an n-type active region. The poly-active diode structure is formed over the n-well, the p-type active region is formed in the n-well on a first side of the poly-active diode structure, and the n-type active region is formed along a boundary of the p-well and the n-well on a second side of the poly-active diode structure. During a transient electrical event the apparatus is configured to provide conduction paths through and underneath the poly-active diode structure to facilitate injection of carriers in the n-type active region. The protection device can further include another poly-active diode structure formed over the p-well to further enhance carrier injection into the n-type active region.

Abstract translation: 提供了精密混合信号电子电路保护的装置和方法。 在一个实施例中，一种装置包括p阱，n阱，多有源二极管结构，p型有源区和n型有源区。 多极二极管结构形成在n阱上，p型有源区形成在多功能二极管结构的第一侧上的n阱中，并且n型有源区沿着 在多活性二极管结构的第二侧上的p阱和n阱的边界。 在瞬态电气事件期间，该装置被配置为提供穿过多功能二极管结构之间和之下的导电路径，以便于在n型有源区域中注入载流子。 保护装置还可以包括在p阱上形成的另一个多有源二极管结构，以进一步增强对n型有源区的载流子注入。

公开(公告)号：US09293912B2

公开(公告)日：2016-03-22

申请号：US14024426

申请日：2013-09-11

Applicant: ANALOG DEVICES, INC.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo

IPC: H02H9/00 ,  H02H9/04

CPC classification number: H02H9/04 ,  H02H9/046

Abstract: Apparatus and methods for active detection, timing, and protection related to transient electrical events are disclosed. A detection circuit generates a detection signal in response to a transient electrical stress. First and second driver circuits of an integrated circuit, each driver having one or more bipolar junction transistors, activate based on the detection signal and generate activation signals. The one or more bipolar junction transistors of the first and second driver circuits are configured to conduct current substantially laterally across respective base regions. A discharge circuit, having an upper discharge element and a lower discharge element, receives the activation signals and activates to attenuate the transient electrical event.

Abstract translation: 公开了与瞬时电气事件相关的主动检测，定时和保护的装置和方法。 检测电路响应瞬时电应力产生检测信号。 集成电路的第一和第二驱动器电路，具有一个或多个双极结型晶体管的每个驱动器基于检测信号而激活并产生激活信号。 第一和第二驱动器电路的一个或多个双极结型晶体管被配置为基本横向地跨过相应的基极区域传导电流。 具有上放电元件和下放电元件的放电电路接收激活信号并激活以衰减瞬时电事件。

公开(公告)号：US08958187B2

公开(公告)日：2015-02-17

申请号：US13673896

申请日：2012-11-09

Applicant: Analog Devices, Inc.

Inventor： Srivatsan Parthasarathy ,  Javier Alejandro Salcedo

IPC: H02H9/00 ,  H02H9/04

CPC classification number: H02H9/041 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Apparatus and methods for active detection, timing, and protection related to transient electrical events are disclosed. A detection circuit can generate a first activation signal in response to a transient electrical stress event across a first node and a second node. A blocking circuit is configured to bias the base of a first driver bipolar transistor to slow down discharge of accumulated base charge of a first driver bipolar transistor, which permits the first driver bipolar transistor to remain activated for a longer period of time than had the base of the first driver bipolar transistor been biased to the same voltage as the emitter of the first bipolar transistor. Shut-off circuitry can be included in some embodiments to prevent a discharge circuit from activating during normal operating conditions.

Abstract translation: 公开了与瞬时电气事件相关的主动检测，定时和保护的装置和方法。 检测电路可以响应于穿过第一节点和第二节点的瞬时电应力事件而产生第一激活信号。 阻塞电路被配置为偏置第一驱动器双极晶体管的基极以减慢第一驱动器双极晶体管的累积基极电荷的放电，这允许第一驱动器双极晶体管保持激活更长的时间段，而不是基极 的第一驱动器双极晶体管被偏置到与第一双极晶体管的发射极相同的电压。 在一些实施例中可以包括关断电路以防止放电电路在正常操作条件下激活。